baud.vhd

波特率发生器

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity baud is
    Port (clk,resetb:in std_logic;
	     bclk:out std_logic);
end baud;
architecture Behavioral of baud is
signal cnt:std_logic_vector(7 downto 0);
begin
process(clk,resetb)
begin
  if resetb='1' then cnt<=(others=>'0'); bclk<='0';                           
  elsif rising_edge(clk) then
     if cnt="11010000" then cnt<=(others=>'0'); bclk<='1';                        
	 else cnt<=cnt+1; bclk<='0';
	 end if;
  end if;
end process;
end Behavioral;