ncr53c8xx.txt

linux 内核源代码

10.2 Available arguments

10.2.1  Master parity checking
        mpar:y     enabled
        mpar:n     disabled

10.2.2  Scsi parity checking
        spar:y     enabled
        spar:n     disabled

10.2.3  Scsi disconnections
        disc:y     enabled
        disc:n     disabled
 
10.2.4  Special features
   Only apply to 810A, 825A, 860, 875 and 895 controllers.
   Have no effect with other ones.
        specf:y    (or 1) enabled
        specf:n    (or 0) disabled
        specf:3           enabled except Memory Write And Invalidate
   The default driver setup is 'specf:3'. As a consequence, option 'specf:y' 
   must be specified in the boot setup command to enable Memory Write And 
   Invalidate.

10.2.5  Ultra SCSI support
   Only apply to 860, 875, 895, 895a, 896, 1010 and 1010_66 controllers.
   Have no effect with other ones.
        ultra:n    All ultra speeds enabled
        ultra:2    Ultra2 enabled
        ultra:1    Ultra enabled
        ultra:0    Ultra speeds disabled

10.2.6  Default number of tagged commands
        tags:0     (or tags:1 ) tagged command queuing disabled
        tags:#tags (#tags  > 1) tagged command queuing enabled
  #tags will be truncated to the max queued commands configuration parameter.
  This option also allows to specify a command queue depth for each device 
  that support tagged command queueing.
  Example:
      ncr53c8xx=tags:10/t2t3q16-t5q24/t1u2q32
               will set devices queue depth as follow:
      - controller #0 target #2 and target #3                  -> 16 commands,
      - controller #0 target #5                                -> 24 commands,
      - controller #1 target #1 logical unit #2                -> 32 commands,
      - all other logical units (all targets, all controllers) -> 10 commands.

10.2.7  Default synchronous period factor
        sync:255     disabled (asynchronous transfer mode)
        sync:#factor
  #factor = 10     Ultra-2 SCSI 40 Mega-transfers / second
  #factor = 11     Ultra-2 SCSI 33 Mega-transfers / second
  #factor < 25     Ultra   SCSI 20 Mega-transfers / second
  #factor < 50     Fast    SCSI-2

  In all cases, the driver will use the minimum transfer period supported by 
  controllers according to NCR53C8XX chip type.

10.2.8  Negotiate synchronous with all devices
        (force sync nego)
        fsn:y      enabled
        fsn:n      disabled

10.2.9  Verbosity level
        verb:0     minimal
        verb:1     normal
        verb:2     too much

10.2.10 Debug mode
        debug:0	 clear debug flags
        debug:#x   set debug flags
  #x is an integer value combining the following power-of-2 values:
  DEBUG_ALLOC       0x1
  DEBUG_PHASE       0x2
  DEBUG_POLL        0x4
  DEBUG_QUEUE       0x8
  DEBUG_RESULT     0x10
  DEBUG_SCATTER    0x20
  DEBUG_SCRIPT     0x40
  DEBUG_TINY       0x80
  DEBUG_TIMING    0x100
  DEBUG_NEGO      0x200
  DEBUG_TAGS      0x400
  DEBUG_FREEZE    0x800
  DEBUG_RESTART  0x1000

  You can play safely with DEBUG_NEGO. However, some of these flags may 
  generate bunches of syslog messages. 

10.2.11 Burst max
        burst:0    burst disabled
        burst:255  get burst length from initial IO register settings.
        burst:#x   burst enabled (1<<#x burst transfers max)
  #x is an integer value which is log base 2 of the burst transfers max.
  The NCR53C875 and NCR53C825A support up to 128 burst transfers (#x = 7).
  Other chips only support up to 16 (#x = 4).
  This is a maximum value. The driver set the burst length according to chip 
  and revision ids. By default the driver uses the maximum value supported 
  by the chip.

10.2.12 LED support
        led:1      enable  LED support
        led:0      disable LED support
  Donnot enable LED support if your scsi board does not use SDMS BIOS.
  (See 'Configuration parameters')

10.2.13 Max wide
        wide:1      wide scsi enabled
        wide:0      wide scsi disabled
  Some scsi boards use a 875 (ultra wide) and only supply narrow connectors.
  If you have connected a wide device with a 50 pins to 68 pins cable 
  converter, any accepted wide negotiation will break further data transfers.
  In such a case, using "wide:0" in the bootup command will be helpful. 

10.2.14 Differential mode
        diff:0	never set up diff mode
        diff:1	set up diff mode if BIOS set it
        diff:2	always set up diff mode
        diff:3	set diff mode if GPIO3 is not set

10.2.15 IRQ mode
        irqm:0     always open drain
        irqm:1     same as initial settings (assumed BIOS settings)
        irqm:2     always totem pole
        irqm:0x10  driver will not use IRQF_SHARED flag when requesting irq
        irqm:0x20  driver will not use IRQF_DISABLED flag when requesting irq

    (Bits 0x10 and 0x20 can be combined with hardware irq mode option)

10.2.16 Reverse probe
        revprob:n   probe chip ids from the PCI configuration in this order:
                    810, 815, 820, 860, 875, 885, 895, 896
        revprob:y   probe chip ids in the reverse order.

10.2.17 Fix up PCI configuration space
        pcifix:<option bits>

    Available option bits:
        0x0:   No attempt to fix PCI configuration space registers values.
        0x1:   Set PCI cache-line size register if not set.
        0x2:   Set write and invalidate bit in PCI command register.
        0x4:   Increase if necessary PCI latency timer according to burst max.

    Use 'pcifix:7' in order to allow the driver to fix up all PCI features.

10.2.18 Serial NVRAM
        nvram:n     do not look for serial NVRAM
        nvram:y     test controllers for onboard serial NVRAM
        (alternate binary form)
        mvram=<bits options>
        0x01   look for NVRAM  (equivalent to nvram=y)
        0x02   ignore NVRAM "Synchronous negotiation" parameters for all devices
        0x04   ignore NVRAM "Wide negotiation"  parameter for all devices
        0x08   ignore NVRAM "Scan at boot time" parameter for all devices
        0x80   also attach controllers set to OFF in the NVRAM (sym53c8xx only)

10.2.19 Check SCSI BUS 
        buschk:<option bits>

    Available option bits:
        0x0:   No check.
        0x1:   Check and do not attach the controller on error.  
        0x2:   Check and just warn on error.
        0x4:   Disable SCSI bus integrity checking.

10.2.20 Exclude a host from being attached
        excl=<io_address>

    Prevent host at a given io address from being attached.
    For example 'ncr53c8xx=excl:0xb400,excl:0xc000' indicate to the 
    ncr53c8xx driver not to attach hosts at address 0xb400 and 0xc000.

10.2.21 Suggest a default SCSI id for hosts
        hostid:255	no id suggested.
        hostid:#x   (0 < x < 7) x suggested for hosts SCSI id.

    If a host SCSI id is available from the NVRAM, the driver will ignore 
    any value suggested as boot option. Otherwise, if a suggested value 
    different from 255 has been supplied, it will use it. Otherwise, it will 
    try to deduce the value previously set in the hardware and use value 
    7 if the hardware value is zero.

10.2.22 Enable use of IMMEDIATE ARBITRATION
        (only supported by the sym53c8xx driver. See 10.7 for more details)
        iarb:0    do not use this feature.
        iarb:#x   use this feature according to bit fields as follow:

    bit 0 (1) : enable IARB each time the initiator has been reselected 
                when it arbitrated for the SCSI BUS.
    (#x >> 4) : maximum number of successive settings of IARB if the initiator 
                win arbitration and it has other commands to send to a device.

Boot fail safe
    safe:y	load the following assumed fail safe initial setup

  master parity			disabled		mpar:n
  scsi parity			enabled			spar:y
  disconnections		not allowed		disc:n
  special features		disabled		specf:n
  ultra scsi			disabled		ultra:n
  force sync negotiation	disabled		fsn:n
  reverse probe			disabled		revprob:n
  PCI fix up                    disabled                pcifix:0
  serial NVRAM                  enabled                 nvram:y
  verbosity level		2			verb:2
  tagged command queuing	disabled		tags:0
  synchronous negotiation	disabled		sync:255
  debug flags			none			debug:0
  burst length			from BIOS settings	burst:255
  LED support			disabled		led:0
  wide support			disabled		wide:0
  settle time			10 seconds		settle:10
  differential support		from BIOS settings	diff:1
  irq mode			from BIOS settings	irqm:1
  SCSI BUS check		do not attach on error	buschk:1
  immediate arbitration		disabled		iarb:0

10.3 Advised boot setup commands

If the driver has been configured with default options, the equivalent 
boot setup is:

   ncr53c8xx=mpar:y,spar:y,disc:y,specf:3,fsn:n,ultra:2,fsn:n,revprob:n,verb:1\
             tags:0,sync:50,debug:0,burst:7,led:0,wide:1,settle:2,diff:0,irqm:0

For an installation diskette or a safe but not fast system,
boot setup can be:

    ncr53c8xx=safe:y,mpar:y,disc:y
    ncr53c8xx=safe:y,disc:y
    ncr53c8xx=safe:y,mpar:y
    ncr53c8xx=safe:y

My personal system works flawlessly with the following equivalent setup:

   ncr53c8xx=mpar:y,spar:y,disc:y,specf:1,fsn:n,ultra:2,fsn:n,revprob:n,verb:1\
             tags:32,sync:12,debug:0,burst:7,led:1,wide:1,settle:2,diff:0,irqm:0

The driver prints its actual setup when verbosity level is 2. You can try 
"ncr53c8xx=verb:2" to get the "static" setup of the driver, or add "verb:2" 
to your boot setup command in order to check the actual setup the driver is 
using.

10.4 PCI configuration fix-up boot option

pcifix:<option bits>

Available option bits:
    0x1:     Set PCI cache-line size register if not set.
    0x2:     Set write and invalidate bit in PCI command register.

Use 'pcifix:3' in order to allow the driver to fix both PCI features.

These options only apply to new SYMBIOS chips 810A, 825A, 860, 875 
and 895 and are only supported for Pentium and 486 class processors.
Recent SYMBIOS 53C8XX scsi processors are able to use PCI read multiple 
and PCI write and invalidate commands. These features require the 
cache line size register to be properly set in the PCI configuration 
space of the chips. On the other hand, chips will use PCI write and 
invalidate commands only if the corresponding bit is set to 1 in the 
PCI command register.

Not all PCI bioses set the PCI cache line register and the PCI write and 
invalidate bit in the PCI configuration space of 53C8XX chips.
Optimized PCI accesses may be broken for some PCI/memory controllers or 
make problems with some PCI boards.

This fix-up worked flawlessly on my previous system.
(MB Triton HX / 53C875 / 53C810A)
I use these options at my own risks as you will do if you decide to 
use them too.


10.5 Serial NVRAM support boot option

nvram:n     do not look for serial NVRAM
nvram:y     test controllers for onboard serial NVRAM

This option can also been entered as an hexadecimal value that allows 
to control what information the driver will get from the NVRAM and what 
information it will ignore.
For details see '17. Serial NVRAM support'.

When this option is enabled, the driver tries to detect all boards using 
a Serial NVRAM. This memory is used to hold user set up parameters.

The parameters the driver is able to get from the NVRAM depend on the 
data format used, as follow:

                                 Tekram format      Symbios format
General and host parameters
    Boot order                         N                   Y
    Host SCSI ID                       Y                   Y
    SCSI parity checking               Y                   Y
    Verbose boot messages              N                   Y
SCSI devices parameters
    Synchronous transfer speed         Y                   Y
    Wide 16 / Narrow                   Y                   Y
    Tagged Command Queuing enabled     Y                   Y
    Disconnections enabled             Y                   Y
    Scan at boot time                  N                   Y

In order to speed up the system boot, for each device configured without 
the "scan at boot time" option, the driver forces an error on the 
first TEST UNIT READY command received for this device.

Some SDMS BIOS revisions seem to be unable to boot cleanly with very fast 
hard disks. In such a situation you cannot configure the NVRAM with 
optimized parameters value.

The 'nvram' boot option can be entered in hexadecimal form in order 
to ignore some options configured in the NVRAM, as follow:

mvram=<bits options>
      0x01   look for NVRAM  (equivalent to nvram=y)
      0x02   ignore NVRAM "Synchronous negotiation" parameters for all devices
      0x04   ignore NVRAM "Wide negotiation"  parameter for all devices
      0x08   ignore NVRAM "Scan at boot time" parameter for all devices
      0x80   also attach controllers set to OFF in the NVRAM (sym53c8xx only)

Option 0x80 is only supported by the sym53c8xx driver and is disabled by 
default. Result is that, by default (option not set), the sym53c8xx driver 
will not attach controllers set to OFF in the NVRAM.

The ncr53c8xx always tries to attach all the controllers. Option 0x80 has 
not been added to the ncr53c8xx driver, since it has been reported to 
confuse users who use this driver since a long time. If you desire a 
controller not to be attached by the ncr53c8xx driver at Linux boot, you 
must use the 'excl' driver boot option.