changelog.sym53c8xx

linux 内核源代码

	  message to a logical UNIT (for test purpose).

Tue May 25  23:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.5a
	- Add support for task abort and bus device reset SCSI message 
	  and implement proper synchonisation with SCRIPTS to handle 
          correctly task abortion without races.
	- Send an ABORT message (if untagged) or ABORT TAG message (if tagged)
	  when the driver is told to abort a command that is disconnected and 
	  complete the command with appropriate error.
	  If the aborted command is not yet started, remove it from the start 
	  queue and complete it with error.
	- Add the control command 'resetdev' that allows to send a BUS 
	  DEVICE RESET message to a target (for test purpose).
	- Clean-up some unused or useless code.

Fri May 21  23:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.5
	- Add support for CHMOV with Wide controllers.
	- Handling of the SWIDE (low byte residue at the end of a CHMOV 
	  in DATA IN phase with WIDE transfer when the byte count gets odd).
	- Handling of the IGNORE WIDE RESIDUE message.
	  Handled from SCRIPTS as possible with some optimizations when both 
	  a wide device and the controller are odd at the same time (SWIDE 
	  present and IGNORE WIDE RESIDUE message on the BUS at the same time).
	- Check against data OVERRUN/UNDERRUN condition at the end of a data 
	  transfer, whatever a SWIDE is present (OVERRUN in DATA IN phase) 
	  or the SODL is full (UNDERRUN in DATA out phase).
	- Handling of the MODIFY DATA POINTER message.
	  This one cannot be handled from SCRIPTS, but hopefully it will not
	  happen very often. :)
	- Large rewrite of the SCSI MESSAGE handling.

Sun May 9  11:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.4
	- Support for IMMEDIATE ARBITRATION.
	  See the README file for detailed information about this feature.
	  Requires both a compile option and a boot option.
	- Minor SCRIPTS optimization in reselection pattern for LUN 0.
	- Simpler algorithm to deal with SCSI command starvation.
	  Just use 2 tag counters in flip/flop and switch to the other 
	  one every 3 seconds.
	- Do some work in SCRIPTS after the SELECT instruction and prior 
	  to testing for a PHASE. SYMBIOS say this feature is working fine. 
	  (Btw, only problems with Toshiba 3401B had been reported).
	- Measure the PCI clock speed and do not attach controllers if 
	  result is greater than 37 MHz. Since the precision of the 
	  algorithm (from Stefan Esser) is better than 2%, this should 
	  be fine.
	- Fix the misdetection of SYM53C875E (was detected as a 876).
	- Fix the misdetection of SYM53C810 not A (was detected as a 810A).
	- Support for up to 256 TAGS per LUN (CMD_PER_LUN).
	  Currently limited to 255 due to Linux limitation. :)
	- Support for up to 508 active commands (CAN_QUEUE).
	- Support for the 53C895A by Pamela Delaney <[e-mail]>
	  The 53C895A contains all of the features of the 896 but has only 
	  one channel and has a 32 bit PCI bus. It does 64 bit PCI addressing 
	  using dual cycle PCI data transfers.
	- Miscellaneous minor fixes.
	- Some additions to the README.ncr53c8xx file.

Tue Apr 15  10:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.3e
	- Support for any number of LUNs (64) (SPI2-compliant).
	  (Btw, this may only be ever useful under linux-2.2 ;-))

Sun Apr 11  10:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.3d
	- Add 'hostid:#id' boot option. This option allows to change the 
	  default SCSI id the driver uses for controllers.
	- Make SCRIPTS not use self-mastering for PCI.
	  There were still 2 places the driver used this feature of the 
	  53C8XX family.
	- Move some data structures (nvram layouts and driver set-up) to 
	  the sym53c8xx_defs.h file. So, the both drivers will share them.
	- Set MAX LUNS to 16 (instead of 8).

Sat Mar 20  21:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.3b
	- Add support for NCR PQS PDS.
	  James Bottomley <[e-mail]>
	- Allow value 0 for host ID.
	- Support more than 8 controllers (> 40 in fact :-) )
	- Add 'excl=#ioaddr' boot option: exclude controller.
	  (Version 1.3a driver)

Thu Mar 11  23:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.3   (8xx-896 driver bundle)
	- Equivalent changes as ncr53c8xx-3.2 due to the driver bundle.
	  (See Changelog.ncr53c8xx)
	- Do a normal soft reset as first chip reset, since aborting current 
	  operation may raise an interrupt we are not able to handle since 
	  the interrupt handler is not yet established.

Sat Mar 6  11:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.2b
	- Fix some oooold bug that hangs the bus if a device rejects a 
	  negotiation. Btw, the corresponding stuff also needed some cleanup 
	  and thus the change is a bit larger than it could have been.
	- Still some typo that made compilation fail for 64 bit (trivial fix).

Sun Feb 21  20:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.2a
	- The rewrite of the interrupt handling broke the SBMC interrupt 
	  handling due to a 1 bit mask tiny error. Hopefully fixed.
	- If INQUIRY came from a scatter list, the driver looked into 
	  the scatterlist instead of the data.:) Since this should never
	  happen, we just discard the data if use_sg is not zero.

Fri Feb 12  23:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.2
	- Major rewrite of the interrupt handling and recovery stuff for 
	  the support of non compliant SCSI removal, insertion and all 
	  kinds of screw-up that may happen on the SCSI BUS.
	  Hopefully, the driver is now unbreakable or may-be, it is just 
	  quite brocken. :-)
	  Many thanks to Johnson Russel (Symbios) for having responded to 
	  my questions and for his interesting advices and comments about 
	  support of SCSI hot-plug.
	- Add 'recovery' option to driver set-up.
	- Negotiate SYNC data transfers with CCS devices.
	- Deal correctly with 64 bit PCI address registers on Linux 2.2.
	  Pointed out by Leonard Zubkoff.

Sun Jan 31  18:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.1a
	- Some 896 chip revisions (all for now :-)), may hang-up if the 
	  soft reset bit is set at the wrong time while SCRIPTS are running.
	  We need to first abort the current SCRIPTS operation prior to 
	  resetting the chip. This fix has been sent to me by SYMBIOS/LSI 
	  and I just translated it into ncr53c8xx syntax.
	  Must be considered 100 % trustable, unless I did some mistake 
	  when translating it. :-)

Sun Jan 24  18:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.1
	- Major rewrite of the SCSI parity error handling.
	  The informations contained in the data manuals are incomplete about 
	  this feature.
	  I asked SYMBIOS about and got in reply the explanations that are 
	  _indeed_ missing in the data manuals.
	- Allow to tune request_irq() flags from the boot command line using 
	  ncr53c8xx=irqm:??, as follows:
	  a) If bit 0x10 is set in irqm, SA_SHIRQ flag is not used.
	  b) If bit 0x20 is set in irqm, SA_INTERRUPT flag is not used.
	  By default the driver uses both SA_SHIRQ and SA_INTERRUPT.
	  Option 'ncr53c8xx=irqm:0x20' may be used when an IRQ is shared by 
	  a 53C8XX adapter and a network board.
	- Fix for 64 bit PCI address register calculation. (Lance Robinson)
	- Fix for big-endian in phase mismatch handling. (Michal Jaegermann)

Fri Jan  1  20:00 1999 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.0a
	- Waiting list look-up didn't work for the first command of the list.
	  Hopefully fixed, but tested on paper only. ;)
	- Remove the most part of PPC specific code for Linux-2.2.
	  Thanks to Cort.
	- Some other minors changes.

Sat Dec 19  21:00 1998 Gerard Roudier ([e-mail])
	* version sym53c8xx-1.0
	- Define some new IO registers for the 896 (istat1, mbox0, mbox1)
	- Revamp slighly the Symbios NVRAM lay-out based on the excerpt of 
	  the header file I received from Symbios.
	- Check the PCI bus number for the boot order (Using a fast 
	  PCI controller behing a PCI-PCI bridge seems sub-optimal).
	- Disable overlapped PCI arbitration for the 896 revision 1.
	- Reduce a bit the number of IO register reads for phase mismatch 
	  by reading DWORDS at a time instead of BYTES.

Thu Dec  3  24:00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.18
	- I received this afternoon a 896 from SYMBIOS and started testing  
	  the driver with this beast. After having fixed 3 buglets, it worked  
	  with all features enabled including the phase mismatch handling 
	  from SCRIPTS. Since this feature is not yet tested enough, the 
	  boot option 'ncr53c8xx=specf:1' is still required to enable the 
	  driver to handle PM from SCRIPTS. 

Sun Nov 29  18:00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.17
	- The SISL RAID change requires now remap_pci_mem() stuff to be 
	  compiled for __i386__ when normal IOs are used.
	- The PCI memory read from SCRIPTS that should ensure ordering 
	  was in fact misplaced. BTW, this may explain why broken PCI 
	  device drivers regarding ordering are working so well. ;-)
	- Rewrite ncr53c8xx_setup (boot command line options) since the  
	  binary code was a bit too bloated in my opinion.
	- Make the code simpler in the wakeup_done routine.

Tue Nov 24  23:00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.16
	- Add SCSI_NCR_OPTIMIZE_896_1 compile option and 'optim' boot option.
	  When set, the driver unconditionnaly assumes that the interrupt 
	  handler is called for command completion, then clears INTF, scans 
	  the done queue and returns if some completed CCB is found. If no 
	  completed CCB are found, interrupt handling will proceed normally.
	  With a 896 that handles MA from SCRIPTS, this can be a great win, 
	  since the driver will never performs PCI read transactions, but 
	  only PCI write transactions that may be posted.
	  If the driver haven't to also raise the SIGP this would be perfect.
	  Even with this penalty, I think that this will work great.
	  Obviously this optimization makes sense only if the IRQ is not 
	  shared with another device.
	- Still a buglet in the tags initial settings that needed to be fixed.
	  It was not possible to disable TGQ at system startup for devices 
	  that claim TGQ support. The driver used at least 2 for the queue 
	  depth but did'nt keep track of user settings for tags depth lower 
	  than 2.

Thu Nov 19  23:00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.15
	- Add support for hardware LED control of the 896.
	- Ignore chips that are driven by SISL RAID (DAC 960).
	  Change sent by Leonard Zubkoff and slightly reworked.
	- Prevent 810A rev 11 and 860 rev 1 from using cache line based 
	  transactions since those early chip revisions may use such on 
	  LOAD/STORE instructions (work-around).
	- Remove some useless and bloat code from the pci init stuff.
	- Do not use the readX()/writeX() kernel functions for __i386__, 
	  since they perform useless masking operations in order to deal 
	  with broken driver in 2.1.X kernel.

Wed Nov 11  10:00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.14
	- The driver was unhappy when configured with default_tags > MAX_TAGS
	  Hopefully doubly-fixed.
	- Set PCI_PARITY in PCI_COMMAND register in not set (PCI fix-up).
	- Print out some message if phase mismatch is handled from SCRIPTS.

Sun Nov 1  14H00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.13
	- Some rewrite of the device detection code. This code had been 
	  patched too much and needed to be face-lifted a bit.
	  Remove all platform dependent fix-ups that was not needed or
	  conflicted with some other driver code as work-arounds.
	  Reread the NVRAM before the calling of ncr_attach(). This spares 
	  stack space and so allows to handle more boards.
	  Handle 64 bit base addresses under linux-2.0.X.
	  Set MASTER bit in PCI COMMAND register if not set.

Wed Oct 30 22H00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.12
	- Damned! I just broke the driver for Alpha by leaving a stale 
	  instruction in the source code. Hopefully fixed.
	- Do not set PFEN when it is useless. Doing so we are sure that BOF 
	  will be active, since the manual appears to be very unclear on what 
	  feature is actually used by the chip when both PFEN and BOF are 
	  set.

Sat Oct 24 16H00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.11
	- LOAD/STORE instructions were miscompiled for register offsets 
	  beyond 0x7f. This broke accesses to 896' new registers.
	- Disable by default Phase Mismatch handling from SCRIPTS, since 
	  current 896 rev.1 seems not to operate safely with the driver
	  when this feature is enabled (and above LOAD/STORE fix applied).
	  I will change the default to 'enabled' when this problem will be 
	  solved.
	  Using boot option 'ncr53c8xx=specf:1' enables this feature.
	- Implement a work-around (DEL 472 - ITEM 5) that should allow the 
	  driver to safely enable hardware phase mismatch with 896 rev. 1.

Tue Oct 20 22H00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.10
	- Add the 53c876 description to the chip table. This is only useful 
	  for printing the right name of the controller.
	- Add additional checking of INQUIRY data:
	  Check INQUIRY data received length is at least 7. Byte 7 of 
	  inquiry data contains device features bits and the driver might 
	  be confused by garbage. Also check peripheral qualifier.
	- Use a 1,3,5,...MAXTAGS*2+1 tag numbering. Previous driver could  
	  use any tag number from 1 to 253 and some non conformant devices  
	  might have problems with large tag numbers.
	- Use NAME53C and NAME53C8XX for chip name prefix chip family name.
	  Just give a try using "sym53c" and "sym53c8xx" instead of "ncr53c" 
	  and "ncr53c8xx". :-)

Sun Oct 11 17H00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.9
	- DEL-441 Item 2 work-around for the 53c876 rev <= 5 (0x15).
	- Break ncr_scatter() into 2 functions in order to guarantee best 
	  possible code optimization for the case we get a scatter list.
	- Add the code intended to support up to 1 tera-byte for 64 bit systems.
	  It is probably too early, but I wanted to complete the thing.

Sat Oct 3 14H00 1998 Gerard Roudier ([e-mail])
	* version pre-sym53c8xx-0.8
	- Do some testing with io_mapped and fix what needed to be so.
	- Wait for SCSI selection to complete or time-out immediately after 
	  the chip won arbitration, since executing SCRIPTS while the SCSI 
	  core is performing SCSI selection breaks the selection procedure 
	  at least for some chip revisions.
	- Interrupt the SCRIPTS if a device does not go to MSG OUT phase after 
	  having been selected with ATN. Such a situation is not recoverable, 
	  better to fail when we are stuck.