📄 maestro3.c
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#define AC97_DAC_READY 0x0002#define AC97_ANALOG_READY 0x0004#define AC97_VREF_ON 0x0008#define AC97_PR0 0x0100#define AC97_PR1 0x0200#define AC97_PR2 0x0400#define AC97_PR3 0x0800#define AC97_PR4 0x1000#define AC97_RESERVED1 0x28#define AC97_VENDOR_TEST 0x5A#define AC97_CLOCK_DELAY 0x5C#define AC97_LINEOUT_MUX_SEL 0x0001#define AC97_MONO_MUX_SEL 0x0002#define AC97_CLOCK_DELAY_SEL 0x1F#define AC97_DAC_CDS_SHIFT 6#define AC97_ADC_CDS_SHIFT 11#define AC97_MULTI_CHANNEL_SEL 0x74/*#define AC97_VENDOR_ID1 0x7C#define AC97_VENDOR_ID2 0x7E*//* * ASSP control regs */#define DSP_PORT_TIMER_COUNT 0x06#define DSP_PORT_MEMORY_INDEX 0x80#define DSP_PORT_MEMORY_TYPE 0x82#define MEMTYPE_INTERNAL_CODE 0x0002#define MEMTYPE_INTERNAL_DATA 0x0003#define MEMTYPE_MASK 0x0003#define DSP_PORT_MEMORY_DATA 0x84#define DSP_PORT_CONTROL_REG_A 0xA2#define DSP_PORT_CONTROL_REG_B 0xA4#define DSP_PORT_CONTROL_REG_C 0xA6#define REV_A_CODE_MEMORY_BEGIN 0x0000#define REV_A_CODE_MEMORY_END 0x0FFF#define REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040#define REV_A_CODE_MEMORY_LENGTH (REV_A_CODE_MEMORY_END - REV_A_CODE_MEMORY_BEGIN + 1)#define REV_B_CODE_MEMORY_BEGIN 0x0000#define REV_B_CODE_MEMORY_END 0x0BFF#define REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040#define REV_B_CODE_MEMORY_LENGTH (REV_B_CODE_MEMORY_END - REV_B_CODE_MEMORY_BEGIN + 1)#define REV_A_DATA_MEMORY_BEGIN 0x1000#define REV_A_DATA_MEMORY_END 0x2FFF#define REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080#define REV_A_DATA_MEMORY_LENGTH (REV_A_DATA_MEMORY_END - REV_A_DATA_MEMORY_BEGIN + 1)#define REV_B_DATA_MEMORY_BEGIN 0x1000#define REV_B_DATA_MEMORY_END 0x2BFF#define REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080#define REV_B_DATA_MEMORY_LENGTH (REV_B_DATA_MEMORY_END - REV_B_DATA_MEMORY_BEGIN + 1)#define NUM_UNITS_KERNEL_CODE 16#define NUM_UNITS_KERNEL_DATA 2#define NUM_UNITS_KERNEL_CODE_WITH_HSP 16#define NUM_UNITS_KERNEL_DATA_WITH_HSP 5/* * Kernel data layout */#define DP_SHIFT_COUNT 7#define KDATA_BASE_ADDR 0x1000#define KDATA_BASE_ADDR2 0x1080#define KDATA_TASK0 (KDATA_BASE_ADDR + 0x0000)#define KDATA_TASK1 (KDATA_BASE_ADDR + 0x0001)#define KDATA_TASK2 (KDATA_BASE_ADDR + 0x0002)#define KDATA_TASK3 (KDATA_BASE_ADDR + 0x0003)#define KDATA_TASK4 (KDATA_BASE_ADDR + 0x0004)#define KDATA_TASK5 (KDATA_BASE_ADDR + 0x0005)#define KDATA_TASK6 (KDATA_BASE_ADDR + 0x0006)#define KDATA_TASK7 (KDATA_BASE_ADDR + 0x0007)#define KDATA_TASK_ENDMARK (KDATA_BASE_ADDR + 0x0008)#define KDATA_CURRENT_TASK (KDATA_BASE_ADDR + 0x0009)#define KDATA_TASK_SWITCH (KDATA_BASE_ADDR + 0x000A)#define KDATA_INSTANCE0_POS3D (KDATA_BASE_ADDR + 0x000B)#define KDATA_INSTANCE1_POS3D (KDATA_BASE_ADDR + 0x000C)#define KDATA_INSTANCE2_POS3D (KDATA_BASE_ADDR + 0x000D)#define KDATA_INSTANCE3_POS3D (KDATA_BASE_ADDR + 0x000E)#define KDATA_INSTANCE4_POS3D (KDATA_BASE_ADDR + 0x000F)#define KDATA_INSTANCE5_POS3D (KDATA_BASE_ADDR + 0x0010)#define KDATA_INSTANCE6_POS3D (KDATA_BASE_ADDR + 0x0011)#define KDATA_INSTANCE7_POS3D (KDATA_BASE_ADDR + 0x0012)#define KDATA_INSTANCE8_POS3D (KDATA_BASE_ADDR + 0x0013)#define KDATA_INSTANCE_POS3D_ENDMARK (KDATA_BASE_ADDR + 0x0014)#define KDATA_INSTANCE0_SPKVIRT (KDATA_BASE_ADDR + 0x0015)#define KDATA_INSTANCE_SPKVIRT_ENDMARK (KDATA_BASE_ADDR + 0x0016)#define KDATA_INSTANCE0_SPDIF (KDATA_BASE_ADDR + 0x0017)#define KDATA_INSTANCE_SPDIF_ENDMARK (KDATA_BASE_ADDR + 0x0018)#define KDATA_INSTANCE0_MODEM (KDATA_BASE_ADDR + 0x0019)#define KDATA_INSTANCE_MODEM_ENDMARK (KDATA_BASE_ADDR + 0x001A)#define KDATA_INSTANCE0_SRC (KDATA_BASE_ADDR + 0x001B)#define KDATA_INSTANCE1_SRC (KDATA_BASE_ADDR + 0x001C)#define KDATA_INSTANCE_SRC_ENDMARK (KDATA_BASE_ADDR + 0x001D)#define KDATA_INSTANCE0_MINISRC (KDATA_BASE_ADDR + 0x001E)#define KDATA_INSTANCE1_MINISRC (KDATA_BASE_ADDR + 0x001F)#define KDATA_INSTANCE2_MINISRC (KDATA_BASE_ADDR + 0x0020)#define KDATA_INSTANCE3_MINISRC (KDATA_BASE_ADDR + 0x0021)#define KDATA_INSTANCE_MINISRC_ENDMARK (KDATA_BASE_ADDR + 0x0022)#define KDATA_INSTANCE0_CPYTHRU (KDATA_BASE_ADDR + 0x0023)#define KDATA_INSTANCE1_CPYTHRU (KDATA_BASE_ADDR + 0x0024)#define KDATA_INSTANCE_CPYTHRU_ENDMARK (KDATA_BASE_ADDR + 0x0025)#define KDATA_CURRENT_DMA (KDATA_BASE_ADDR + 0x0026)#define KDATA_DMA_SWITCH (KDATA_BASE_ADDR + 0x0027)#define KDATA_DMA_ACTIVE (KDATA_BASE_ADDR + 0x0028)#define KDATA_DMA_XFER0 (KDATA_BASE_ADDR + 0x0029)#define KDATA_DMA_XFER1 (KDATA_BASE_ADDR + 0x002A)#define KDATA_DMA_XFER2 (KDATA_BASE_ADDR + 0x002B)#define KDATA_DMA_XFER3 (KDATA_BASE_ADDR + 0x002C)#define KDATA_DMA_XFER4 (KDATA_BASE_ADDR + 0x002D)#define KDATA_DMA_XFER5 (KDATA_BASE_ADDR + 0x002E)#define KDATA_DMA_XFER6 (KDATA_BASE_ADDR + 0x002F)#define KDATA_DMA_XFER7 (KDATA_BASE_ADDR + 0x0030)#define KDATA_DMA_XFER8 (KDATA_BASE_ADDR + 0x0031)#define KDATA_DMA_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0032)#define KDATA_I2S_SAMPLE_COUNT (KDATA_BASE_ADDR + 0x0033)#define KDATA_I2S_INT_METER (KDATA_BASE_ADDR + 0x0034)#define KDATA_I2S_ACTIVE (KDATA_BASE_ADDR + 0x0035)#define KDATA_TIMER_COUNT_RELOAD (KDATA_BASE_ADDR + 0x0036)#define KDATA_TIMER_COUNT_CURRENT (KDATA_BASE_ADDR + 0x0037)#define KDATA_HALT_SYNCH_CLIENT (KDATA_BASE_ADDR + 0x0038)#define KDATA_HALT_SYNCH_DMA (KDATA_BASE_ADDR + 0x0039)#define KDATA_HALT_ACKNOWLEDGE (KDATA_BASE_ADDR + 0x003A)#define KDATA_ADC1_XFER0 (KDATA_BASE_ADDR + 0x003B)#define KDATA_ADC1_XFER_ENDMARK (KDATA_BASE_ADDR + 0x003C)#define KDATA_ADC1_LEFT_VOLUME (KDATA_BASE_ADDR + 0x003D)#define KDATA_ADC1_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x003E)#define KDATA_ADC1_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x003F)#define KDATA_ADC1_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0040)#define KDATA_ADC2_XFER0 (KDATA_BASE_ADDR + 0x0041)#define KDATA_ADC2_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0042)#define KDATA_ADC2_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0043)#define KDATA_ADC2_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x0044)#define KDATA_ADC2_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x0045)#define KDATA_ADC2_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0046)#define KDATA_CD_XFER0 (KDATA_BASE_ADDR + 0x0047) #define KDATA_CD_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0048)#define KDATA_CD_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0049)#define KDATA_CD_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x004A)#define KDATA_CD_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x004B)#define KDATA_CD_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x004C)#define KDATA_MIC_XFER0 (KDATA_BASE_ADDR + 0x004D)#define KDATA_MIC_XFER_ENDMARK (KDATA_BASE_ADDR + 0x004E)#define KDATA_MIC_VOLUME (KDATA_BASE_ADDR + 0x004F)#define KDATA_MIC_SUR_VOL (KDATA_BASE_ADDR + 0x0050)#define KDATA_I2S_XFER0 (KDATA_BASE_ADDR + 0x0051)#define KDATA_I2S_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0052)#define KDATA_CHI_XFER0 (KDATA_BASE_ADDR + 0x0053)#define KDATA_CHI_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0054)#define KDATA_SPDIF_XFER (KDATA_BASE_ADDR + 0x0055)#define KDATA_SPDIF_CURRENT_FRAME (KDATA_BASE_ADDR + 0x0056)#define KDATA_SPDIF_FRAME0 (KDATA_BASE_ADDR + 0x0057)#define KDATA_SPDIF_FRAME1 (KDATA_BASE_ADDR + 0x0058)#define KDATA_SPDIF_FRAME2 (KDATA_BASE_ADDR + 0x0059)#define KDATA_SPDIF_REQUEST (KDATA_BASE_ADDR + 0x005A)#define KDATA_SPDIF_TEMP (KDATA_BASE_ADDR + 0x005B)#define KDATA_SPDIFIN_XFER0 (KDATA_BASE_ADDR + 0x005C)#define KDATA_SPDIFIN_XFER_ENDMARK (KDATA_BASE_ADDR + 0x005D)#define KDATA_SPDIFIN_INT_METER (KDATA_BASE_ADDR + 0x005E)#define KDATA_DSP_RESET_COUNT (KDATA_BASE_ADDR + 0x005F)#define KDATA_DEBUG_OUTPUT (KDATA_BASE_ADDR + 0x0060)#define KDATA_KERNEL_ISR_LIST (KDATA_BASE_ADDR + 0x0061)#define KDATA_KERNEL_ISR_CBSR1 (KDATA_BASE_ADDR + 0x0062)#define KDATA_KERNEL_ISR_CBER1 (KDATA_BASE_ADDR + 0x0063)#define KDATA_KERNEL_ISR_CBCR (KDATA_BASE_ADDR + 0x0064)#define KDATA_KERNEL_ISR_AR0 (KDATA_BASE_ADDR + 0x0065)#define KDATA_KERNEL_ISR_AR1 (KDATA_BASE_ADDR + 0x0066)#define KDATA_KERNEL_ISR_AR2 (KDATA_BASE_ADDR + 0x0067)#define KDATA_KERNEL_ISR_AR3 (KDATA_BASE_ADDR + 0x0068)#define KDATA_KERNEL_ISR_AR4 (KDATA_BASE_ADDR + 0x0069)#define KDATA_KERNEL_ISR_AR5 (KDATA_BASE_ADDR + 0x006A)#define KDATA_KERNEL_ISR_BRCR (KDATA_BASE_ADDR + 0x006B)#define KDATA_KERNEL_ISR_PASR (KDATA_BASE_ADDR + 0x006C)#define KDATA_KERNEL_ISR_PAER (KDATA_BASE_ADDR + 0x006D)#define KDATA_CLIENT_SCRATCH0 (KDATA_BASE_ADDR + 0x006E)#define KDATA_CLIENT_SCRATCH1 (KDATA_BASE_ADDR + 0x006F)#define KDATA_KERNEL_SCRATCH (KDATA_BASE_ADDR + 0x0070)#define KDATA_KERNEL_ISR_SCRATCH (KDATA_BASE_ADDR + 0x0071)#define KDATA_OUEUE_LEFT (KDATA_BASE_ADDR + 0x0072)#define KDATA_QUEUE_RIGHT (KDATA_BASE_ADDR + 0x0073)#define KDATA_ADC1_REQUEST (KDATA_BASE_ADDR + 0x0074)#define KDATA_ADC2_REQUEST (KDATA_BASE_ADDR + 0x0075)#define KDATA_CD_REQUEST (KDATA_BASE_ADDR + 0x0076)#define KDATA_MIC_REQUEST (KDATA_BASE_ADDR + 0x0077)#define KDATA_ADC1_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0078)#define KDATA_ADC2_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0079)#define KDATA_CD_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007A)#define KDATA_MIC_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007B)#define KDATA_MIC_SYNC_COUNTER (KDATA_BASE_ADDR + 0x007C)/* * second 'segment' (?) reserved for mixer * buffers.. */#define KDATA_MIXER_WORD0 (KDATA_BASE_ADDR2 + 0x0000)#define KDATA_MIXER_WORD1 (KDATA_BASE_ADDR2 + 0x0001)#define KDATA_MIXER_WORD2 (KDATA_BASE_ADDR2 + 0x0002)#define KDATA_MIXER_WORD3 (KDATA_BASE_ADDR2 + 0x0003)#define KDATA_MIXER_WORD4 (KDATA_BASE_ADDR2 + 0x0004)#define KDATA_MIXER_WORD5 (KDATA_BASE_ADDR2 + 0x0005)#define KDATA_MIXER_WORD6 (KDATA_BASE_ADDR2 + 0x0006)#define KDATA_MIXER_WORD7 (KDATA_BASE_ADDR2 + 0x0007)#define KDATA_MIXER_WORD8 (KDATA_BASE_ADDR2 + 0x0008)#define KDATA_MIXER_WORD9 (KDATA_BASE_ADDR2 + 0x0009)#define KDATA_MIXER_WORDA (KDATA_BASE_ADDR2 + 0x000A)#define KDATA_MIXER_WORDB (KDATA_BASE_ADDR2 + 0x000B)#define KDATA_MIXER_WORDC (KDATA_BASE_ADDR2 + 0x000C)#define KDATA_MIXER_WORDD (KDATA_BASE_ADDR2 + 0x000D)#define KDATA_MIXER_WORDE (KDATA_BASE_ADDR2 + 0x000E)#define KDATA_MIXER_WORDF (KDATA_BASE_ADDR2 + 0x000F)#define KDATA_MIXER_XFER0 (KDATA_BASE_ADDR2 + 0x0010)#define KDATA_MIXER_XFER1 (KDATA_BASE_ADDR2 + 0x0011)#define KDATA_MIXER_XFER2 (KDATA_BASE_ADDR2 + 0x0012)#define KDATA_MIXER_XFER3 (KDATA_BASE_ADDR2 + 0x0013)#define KDATA_MIXER_XFER4 (KDATA_BASE_ADDR2 + 0x0014)#define KDATA_MIXER_XFER5 (KDATA_BASE_ADDR2 + 0x0015)#define KDATA_MIXER_XFER6 (KDATA_BASE_ADDR2 + 0x0016)#define KDATA_MIXER_XFER7 (KDATA_BASE_ADDR2 + 0x0017)#define KDATA_MIXER_XFER8 (KDATA_BASE_ADDR2 + 0x0018)#define KDATA_MIXER_XFER9 (KDATA_BASE_ADDR2 + 0x0019)#define KDATA_MIXER_XFER_ENDMARK (KDATA_BASE_ADDR2 + 0x001A)#define KDATA_MIXER_TASK_NUMBER (KDATA_BASE_ADDR2 + 0x001B)#define KDATA_CURRENT_MIXER (KDATA_BASE_ADDR2 + 0x001C)#define KDATA_MIXER_ACTIVE (KDATA_BASE_ADDR2 + 0x001D)#define KDATA_MIXER_BANK_STATUS (KDATA_BASE_ADDR2 + 0x001E)#define KDATA_DAC_LEFT_VOLUME (KDATA_BASE_ADDR2 + 0x001F)#define KDATA_DAC_RIGHT_VOLUME (KDATA_BASE_ADDR2 + 0x0020)#define MAX_INSTANCE_MINISRC (KDATA_INSTANCE_MINISRC_ENDMARK - KDATA_INSTANCE0_MINISRC)#define MAX_VIRTUAL_DMA_CHANNELS (KDATA_DMA_XFER_ENDMARK - KDATA_DMA_XFER0)#define MAX_VIRTUAL_MIXER_CHANNELS (KDATA_MIXER_XFER_ENDMARK - KDATA_MIXER_XFER0)#define MAX_VIRTUAL_ADC1_CHANNELS (KDATA_ADC1_XFER_ENDMARK - KDATA_ADC1_XFER0)/* * client data area offsets */#define CDATA_INSTANCE_READY 0x00#define CDATA_HOST_SRC_ADDRL 0x01#define CDATA_HOST_SRC_ADDRH 0x02#define CDATA_HOST_SRC_END_PLUS_1L 0x03#define CDATA_HOST_SRC_END_PLUS_1H 0x04#define CDATA_HOST_SRC_CURRENTL 0x05#define CDATA_HOST_SRC_CURRENTH 0x06#define CDATA_IN_BUF_CONNECT 0x07#define CDATA_OUT_BUF_CONNECT 0x08#define CDATA_IN_BUF_BEGIN 0x09#define CDATA_IN_BUF_END_PLUS_1 0x0A#define CDATA_IN_BUF_HEAD 0x0B#define CDATA_IN_BUF_TAIL 0x0C#define CDATA_OUT_BUF_BEGIN 0x0D#define CDATA_OUT_BUF_END_PLUS_1 0x0E#define CDATA_OUT_BUF_HEAD 0x0F#define CDATA_OUT_BUF_TAIL 0x10#define CDATA_DMA_CONTROL 0x11#define CDATA_RESERVED 0x12#define CDATA_FREQUENCY 0x13#define CDATA_LEFT_VOLUME 0x14#define CDATA_RIGHT_VOLUME 0x15#define CDATA_LEFT_SUR_VOL 0x16#define CDATA_RIGHT_SUR_VOL 0x17#define CDATA_HEADER_LEN 0x18#define SRC3_DIRECTION_OFFSET CDATA_HEADER_LEN#define SRC3_MODE_OFFSET (CDATA_HEADER_LEN + 1)#define SRC3_WORD_LENGTH_OFFSET (CDATA_HEADER_LEN + 2)#define SRC3_PARAMETER_OFFSET (CDATA_HEADER_LEN + 3)#define SRC3_COEFF_ADDR_OFFSET (CDATA_HEADER_LEN + 8)#define SRC3_FILTAP_ADDR_OFFSET (CDATA_HEADER_LEN + 10)#define SRC3_TEMP_INBUF_ADDR_OFFSET (CDATA_HEADER_LEN + 16)#define SRC3_TEMP_OUTBUF_ADDR_OFFSET (CDATA_HEADER_LEN + 17)#define MINISRC_IN_BUFFER_SIZE ( 0x50 * 2 )#define MINISRC_OUT_BUFFER_SIZE ( 0x50 * 2 * 2)#define MINISRC_OUT_BUFFER_SIZE ( 0x50 * 2 * 2)#define MINISRC_TMP_BUFFER_SIZE ( 112 + ( MINISRC_BIQUAD_STAGE * 3 + 4 ) * 2 * 2 )#define MINISRC_BIQUAD_STAGE 2#define MINISRC_COEF_LOC 0x175#define DMACONTROL_BLOCK_MASK 0x000F#define DMAC_BLOCK0_SELECTOR 0x0000#define DMAC_BLOCK1_SELECTOR 0x0001#define DMAC_BLOCK2_SELECTOR 0x0002#define DMAC_BLOCK3_SELECTOR 0x0003#define DMAC_BLOCK4_SELECTOR 0x0004#define DMAC_BLOCK5_SELECTOR 0x0005#define DMAC_BLOCK6_SELECTOR 0x0006#define DMAC_BLOCK7_SELECTOR 0x0007#define DMAC_BLOCK8_SELECTOR 0x0008#define DMAC_BLOCK9_SELECTOR 0x0009#define DMAC_BLOCKA_SELECTOR 0x000A#define DMAC_BLOCKB_SELECTOR 0x000B#define DMAC_BLOCKC_SELECTOR 0x000C#define DMAC_BLOCKD_SELECTOR 0x000D#define DMAC_BLOCKE_SELECTOR 0x000E#define DMAC_BLOCKF_SELECTOR 0x000F#define DMACONTROL_PAGE_MASK 0x00F0#define DMAC_PAGE0_SELECTOR 0x0030#define DMAC_PAGE1_SELECTOR 0x0020#define DMAC_PAGE2_SELECTOR 0x0010#define DMAC_PAGE3_SELECTOR 0x0000#define DMACONTROL_AUTOREPEAT 0x1000#define DMACONTROL_STOPPED 0x2000#define DMACONTROL_DIRECTION 0x0100/* * an arbitrary volume we set the internal * volume settings to so that the ac97 volume * range is a little less insane. 0x7fff is * max. */#define ARB_VOLUME ( 0x6800 )/* */struct m3_list { int curlen; int mem_addr; int max;};struct m3_dma { int number; struct snd_pcm_substream *substream; struct assp_instance { unsigned short code, data; } inst; int running; int opened; unsigned long buffer_addr; int dma_size; int period_size; unsigned int hwptr; int count; int index[3]; struct m3_list *index_list[3]; int in_lists; struct list_head list;}; struct snd_m3 { struct snd_card *card; unsigned long iobase; int irq;⌨️ 快捷键说明
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