mach64.h

来自「linux 内核源代码」· C头文件 代码 · 共 1,379 行 · 第 1/4 页

H
1,379
字号
#define MACH64_ET		4#define MACH64_VT		5#define MACH64_GT		6/* DST_CNTL register constants */#define DST_X_RIGHT_TO_LEFT	0#define DST_X_LEFT_TO_RIGHT	1#define DST_Y_BOTTOM_TO_TOP	0#define DST_Y_TOP_TO_BOTTOM	2#define DST_X_MAJOR		0#define DST_Y_MAJOR		4#define DST_X_TILE		8#define DST_Y_TILE		0x10#define DST_LAST_PEL		0x20#define DST_POLYGON_ENABLE	0x40#define DST_24_ROTATION_ENABLE	0x80/* SRC_CNTL register constants */#define SRC_PATTERN_ENABLE		1#define SRC_ROTATION_ENABLE		2#define SRC_LINEAR_ENABLE		4#define SRC_BYTE_ALIGN			8#define SRC_LINE_X_RIGHT_TO_LEFT	0#define SRC_LINE_X_LEFT_TO_RIGHT	0x10/* HOST_CNTL register constants */#define HOST_BYTE_ALIGN		1/* GUI_TRAJ_CNTL register constants */#define PAT_MONO_8x8_ENABLE	0x01000000#define PAT_CLR_4x2_ENABLE	0x02000000#define PAT_CLR_8x1_ENABLE	0x04000000/* DP_CHAIN_MASK register constants */#define DP_CHAIN_4BPP		0x8888#define DP_CHAIN_7BPP		0xD2D2#define DP_CHAIN_8BPP		0x8080#define DP_CHAIN_8BPP_RGB	0x9292#define DP_CHAIN_15BPP		0x4210#define DP_CHAIN_16BPP		0x8410#define DP_CHAIN_24BPP		0x8080#define DP_CHAIN_32BPP		0x8080/* DP_PIX_WIDTH register constants */#define DST_1BPP		0x0#define DST_4BPP		0x1#define DST_8BPP		0x2#define DST_15BPP		0x3#define DST_16BPP		0x4#define DST_24BPP		0x5#define DST_32BPP		0x6#define DST_MASK		0xF#define SRC_1BPP		0x000#define SRC_4BPP		0x100#define SRC_8BPP		0x200#define SRC_15BPP		0x300#define SRC_16BPP		0x400#define SRC_24BPP		0x500#define SRC_32BPP		0x600#define SRC_MASK		0xF00#define DP_HOST_TRIPLE_EN	0x2000#define HOST_1BPP		0x00000#define HOST_4BPP		0x10000#define HOST_8BPP		0x20000#define HOST_15BPP		0x30000#define HOST_16BPP		0x40000#define HOST_24BPP		0x50000#define HOST_32BPP		0x60000#define HOST_MASK		0xF0000#define BYTE_ORDER_MSB_TO_LSB	0#define BYTE_ORDER_LSB_TO_MSB	0x1000000#define BYTE_ORDER_MASK		0x1000000/* DP_MIX register constants */#define BKGD_MIX_NOT_D			0#define BKGD_MIX_ZERO			1#define BKGD_MIX_ONE			2#define BKGD_MIX_D			3#define BKGD_MIX_NOT_S			4#define BKGD_MIX_D_XOR_S		5#define BKGD_MIX_NOT_D_XOR_S		6#define BKGD_MIX_S			7#define BKGD_MIX_NOT_D_OR_NOT_S		8#define BKGD_MIX_D_OR_NOT_S		9#define BKGD_MIX_NOT_D_OR_S		10#define BKGD_MIX_D_OR_S			11#define BKGD_MIX_D_AND_S		12#define BKGD_MIX_NOT_D_AND_S		13#define BKGD_MIX_D_AND_NOT_S		14#define BKGD_MIX_NOT_D_AND_NOT_S	15#define BKGD_MIX_D_PLUS_S_DIV2		0x17#define FRGD_MIX_NOT_D			0#define FRGD_MIX_ZERO			0x10000#define FRGD_MIX_ONE			0x20000#define FRGD_MIX_D			0x30000#define FRGD_MIX_NOT_S			0x40000#define FRGD_MIX_D_XOR_S		0x50000#define FRGD_MIX_NOT_D_XOR_S		0x60000#define FRGD_MIX_S			0x70000#define FRGD_MIX_NOT_D_OR_NOT_S		0x80000#define FRGD_MIX_D_OR_NOT_S		0x90000#define FRGD_MIX_NOT_D_OR_S		0xa0000#define FRGD_MIX_D_OR_S			0xb0000#define FRGD_MIX_D_AND_S		0xc0000#define FRGD_MIX_NOT_D_AND_S		0xd0000#define FRGD_MIX_D_AND_NOT_S		0xe0000#define FRGD_MIX_NOT_D_AND_NOT_S	0xf0000#define FRGD_MIX_D_PLUS_S_DIV2		0x170000/* DP_SRC register constants */#define BKGD_SRC_BKGD_CLR	0#define BKGD_SRC_FRGD_CLR	1#define BKGD_SRC_HOST		2#define BKGD_SRC_BLIT		3#define BKGD_SRC_PATTERN	4#define FRGD_SRC_BKGD_CLR	0#define FRGD_SRC_FRGD_CLR	0x100#define FRGD_SRC_HOST		0x200#define FRGD_SRC_BLIT		0x300#define FRGD_SRC_PATTERN	0x400#define MONO_SRC_ONE		0#define MONO_SRC_PATTERN	0x10000#define MONO_SRC_HOST		0x20000#define MONO_SRC_BLIT		0x30000/* CLR_CMP_CNTL register constants */#define COMPARE_FALSE		0#define COMPARE_TRUE		1#define COMPARE_NOT_EQUAL	4#define COMPARE_EQUAL		5#define COMPARE_DESTINATION	0#define COMPARE_SOURCE		0x1000000/* FIFO_STAT register constants */#define FIFO_ERR		0x80000000/* CONTEXT_LOAD_CNTL constants */#define CONTEXT_NO_LOAD			0#define CONTEXT_LOAD			0x10000#define CONTEXT_LOAD_AND_DO_FILL	0x20000#define CONTEXT_LOAD_AND_DO_LINE	0x30000#define CONTEXT_EXECUTE			0#define CONTEXT_CMD_DISABLE		0x80000000/* GUI_STAT register constants */#define ENGINE_IDLE			0#define ENGINE_BUSY			1#define SCISSOR_LEFT_FLAG		0x10#define SCISSOR_RIGHT_FLAG		0x20#define SCISSOR_TOP_FLAG		0x40#define SCISSOR_BOTTOM_FLAG		0x80/* ATI VGA Extended Regsiters */#define sioATIEXT		0x1ce#define bioATIEXT		0x3ce#define ATI2E			0xae#define ATI32			0xb2#define ATI36			0xb6/* VGA Graphics Controller Registers */#define R_GENMO			0x3cc#define VGAGRA			0x3ce#define GRA06			0x06/* VGA Seququencer Registers */#define VGASEQ			0x3c4#define SEQ02			0x02#define SEQ04			0x04#define MACH64_MAX_X		ENGINE_MAX_X#define MACH64_MAX_Y		ENGINE_MAX_Y#define INC_X			0x0020#define INC_Y			0x0080#define RGB16_555		0x0000#define RGB16_565		0x0040#define RGB16_655		0x0080#define RGB16_664		0x00c0#define POLY_TEXT_TYPE		0x0001#define IMAGE_TEXT_TYPE		0x0002#define TEXT_TYPE_8_BIT		0x0004#define TEXT_TYPE_16_BIT	0x0008#define POLY_TEXT_TYPE_8	(POLY_TEXT_TYPE | TEXT_TYPE_8_BIT)#define IMAGE_TEXT_TYPE_8	(IMAGE_TEXT_TYPE | TEXT_TYPE_8_BIT)#define POLY_TEXT_TYPE_16	(POLY_TEXT_TYPE | TEXT_TYPE_16_BIT)#define IMAGE_TEXT_TYPE_16	(IMAGE_TEXT_TYPE | TEXT_TYPE_16_BIT)#define MACH64_NUM_CLOCKS	16#define MACH64_NUM_FREQS	50/* Power Management register constants (LT & LT Pro) */#define PWR_MGT_ON		0x00000001#define PWR_MGT_MODE_MASK	0x00000006#define AUTO_PWR_UP		0x00000008#define USE_F32KHZ		0x00000400#define TRISTATE_MEM_EN		0x00000800#define SELF_REFRESH		0x00000080#define PWR_BLON		0x02000000#define STANDBY_NOW		0x10000000#define SUSPEND_NOW		0x20000000#define PWR_MGT_STATUS_MASK	0xC0000000#define PWR_MGT_STATUS_SUSPEND	0x80000000/* PM Mode constants  */#define PWR_MGT_MODE_PIN	0x00000000#define PWR_MGT_MODE_REG	0x00000002#define PWR_MGT_MODE_TIMER	0x00000004#define PWR_MGT_MODE_PCI	0x00000006/* LCD registers (LT Pro) *//* LCD Index register */#define LCD_INDEX_MASK		0x0000003F#define LCD_DISPLAY_DIS		0x00000100#define LCD_SRC_SEL		0x00000200#define CRTC2_DISPLAY_DIS	0x00000400/* LCD register indices */#define CONFIG_PANEL		0x00#define LCD_GEN_CNTL		0x01#define DSTN_CONTROL		0x02#define HFB_PITCH_ADDR		0x03#define HORZ_STRETCHING		0x04#define VERT_STRETCHING		0x05#define EXT_VERT_STRETCH	0x06#define LT_GIO			0x07#define POWER_MANAGEMENT	0x08#define ZVGPIO			0x09#define ICON_CLR0		0x0A#define ICON_CLR1		0x0B#define ICON_OFFSET		0x0C#define ICON_HORZ_VERT_POSN	0x0D#define ICON_HORZ_VERT_OFF	0x0E#define ICON2_CLR0		0x0F#define ICON2_CLR1		0x10#define ICON2_OFFSET		0x11#define ICON2_HORZ_VERT_POSN	0x12#define ICON2_HORZ_VERT_OFF	0x13#define LCD_MISC_CNTL		0x14#define APC_CNTL		0x1C#define POWER_MANAGEMENT_2	0x1D#define ALPHA_BLENDING		0x25#define PORTRAIT_GEN_CNTL	0x26#define APC_CTRL_IO		0x27#define TEST_IO			0x28#define TEST_OUTPUTS		0x29#define DP1_MEM_ACCESS		0x2A#define DP0_MEM_ACCESS		0x2B#define DP0_DEBUG_A		0x2C#define DP0_DEBUG_B		0x2D#define DP1_DEBUG_A		0x2E#define DP1_DEBUG_B		0x2F#define DPCTRL_DEBUG_A		0x30#define DPCTRL_DEBUG_B		0x31#define MEMBLK_DEBUG		0x32#define APC_LUT_AB		0x33#define APC_LUT_CD		0x34#define APC_LUT_EF		0x35#define APC_LUT_GH		0x36#define APC_LUT_IJ		0x37#define APC_LUT_KL		0x38#define APC_LUT_MN		0x39#define APC_LUT_OP		0x3A/* Values in LCD_GEN_CTRL */#define CRT_ON                          0x00000001ul#define LCD_ON                          0x00000002ul#define HORZ_DIVBY2_EN                  0x00000004ul#define DONT_DS_ICON                    0x00000008ul#define LOCK_8DOT                       0x00000010ul#define ICON_ENABLE                     0x00000020ul#define DONT_SHADOW_VPAR                0x00000040ul#define V2CLK_PM_EN                     0x00000080ul#define RST_FM                          0x00000100ul#define DISABLE_PCLK_RESET              0x00000200ul	/* XC/XL */#define DIS_HOR_CRT_DIVBY2              0x00000400ul#define SCLK_SEL                        0x00000800ul#define SCLK_DELAY                      0x0000f000ul#define TVCLK_PM_EN                     0x00010000ul#define VCLK_DAC_PM_EN                  0x00020000ul#define VCLK_LCD_OFF                    0x00040000ul#define SELECT_WAIT_4MS                 0x00080000ul#define XTALIN_PM_EN                    0x00080000ul	/* XC/XL */#define V2CLK_DAC_PM_EN                 0x00100000ul#define LVDS_EN                         0x00200000ul#define LVDS_PLL_EN                     0x00400000ul#define LVDS_PLL_RESET                  0x00800000ul#define LVDS_RESERVED_BITS              0x07000000ul#define CRTC_RW_SELECT                  0x08000000ul	/* LTPro */#define USE_SHADOWED_VEND               0x10000000ul#define USE_SHADOWED_ROWCUR             0x20000000ul#define SHADOW_EN                       0x40000000ul#define SHADOW_RW_EN                  	0x80000000ul#define LCD_SET_PRIMARY_MASK            0x07FFFBFBul/* Values in HORZ_STRETCHING */#define HORZ_STRETCH_BLEND		0x00000ffful#define HORZ_STRETCH_RATIO		0x0000fffful#define HORZ_STRETCH_LOOP		0x00070000ul#define HORZ_STRETCH_LOOP09		0x00000000ul#define HORZ_STRETCH_LOOP11		0x00010000ul#define HORZ_STRETCH_LOOP12		0x00020000ul#define HORZ_STRETCH_LOOP14		0x00030000ul#define HORZ_STRETCH_LOOP15		0x00040000ul/*	?				0x00050000ul *//*	?				0x00060000ul *//*	?				0x00070000ul *//*	?				0x00080000ul */#define HORZ_PANEL_SIZE			0x0ff00000ul	/* XC/XL *//*	?				0x10000000ul */#define AUTO_HORZ_RATIO			0x20000000ul	/* XC/XL */#define HORZ_STRETCH_MODE		0x40000000ul#define HORZ_STRETCH_EN			0x80000000ul/* Values in VERT_STRETCHING */#define VERT_STRETCH_RATIO0		0x000003fful#define VERT_STRETCH_RATIO1		0x000ffc00ul#define VERT_STRETCH_RATIO2		0x3ff00000ul#define VERT_STRETCH_USE0		0x40000000ul#define VERT_STRETCH_EN			0x80000000ul/* Values in EXT_VERT_STRETCH */#define VERT_STRETCH_RATIO3		0x000003fful#define FORCE_DAC_DATA			0x000000fful#define FORCE_DAC_DATA_SEL		0x00000300ul#define VERT_STRETCH_MODE		0x00000400ul#define VERT_PANEL_SIZE			0x003ff800ul#define AUTO_VERT_RATIO			0x00400000ul#define USE_AUTO_FP_POS			0x00800000ul#define USE_AUTO_LCD_VSYNC		0x01000000ul/*	?				0xfe000000ul *//* Values in LCD_MISC_CNTL */#define BIAS_MOD_LEVEL_MASK		0x0000ff00#define BIAS_MOD_LEVEL_SHIFT		8#define BLMOD_EN			0x00010000#define BIASMOD_EN			0x00020000#endif				/* REGMACH64_H */

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?