cdefbf532.h

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/*
 * File:         include/asm-blackfin/mach-bf533/cdefBF532.h
 * Based on:
 * Author:
 *
 * Created:
 * Description:
 *
 * Rev:
 *
 * Modified:
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; see the file COPYING.
 * If not, write to the Free Software Foundation,
 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */

#ifndef _CDEF_BF532_H
#define _CDEF_BF532_H

#include <asm/blackfin.h>

/*include all Core registers and bit definitions*/
#include "defBF532.h"

/*include core specific register pointer definitions*/
#include <asm/mach-common/cdef_LPBlackfin.h>

#include <asm/system.h>

/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
#define bfin_read_PLL_CTL()                  bfin_read16(PLL_CTL)
#define bfin_write_PLL_CTL(val)              bfin_write16(PLL_CTL,val)
#define bfin_read_PLL_STAT()                 bfin_read16(PLL_STAT)
#define bfin_write_PLL_STAT(val)             bfin_write16(PLL_STAT,val)
#define bfin_read_PLL_LOCKCNT()              bfin_read16(PLL_LOCKCNT)
#define bfin_write_PLL_LOCKCNT(val)          bfin_write16(PLL_LOCKCNT,val)
#define bfin_read_CHIPID()                   bfin_read32(CHIPID)
#define bfin_read_PLL_DIV()                  bfin_read16(PLL_DIV)
#define bfin_write_PLL_DIV(val)              bfin_write16(PLL_DIV,val)
#define bfin_read_VR_CTL()                   bfin_read16(VR_CTL)
/* Writing to VR_CTL initiates a PLL relock sequence. */
static __inline__ void bfin_write_VR_CTL(unsigned int val)
{
	unsigned long flags, iwr;

	/* Enable the PLL Wakeup bit in SIC IWR */
	iwr = bfin_read32(SIC_IWR);
	/* Only allow PPL Wakeup) */
	bfin_write32(SIC_IWR, IWR_ENABLE(0));

	bfin_write16(VR_CTL, val);
	SSYNC();

	local_irq_save(flags);
	asm("IDLE;");
	local_irq_restore(flags);
	bfin_write32(SIC_IWR, iwr);
}

/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
#define bfin_read_SWRST()                    bfin_read16(SWRST)
#define bfin_write_SWRST(val)                bfin_write16(SWRST,val)
#define bfin_read_SYSCR()                    bfin_read16(SYSCR)
#define bfin_write_SYSCR(val)                bfin_write16(SYSCR,val)
#define bfin_read_SIC_IAR0()                 bfin_read32(SIC_IAR0)
#define bfin_write_SIC_IAR0(val)             bfin_write32(SIC_IAR0,val)
#define bfin_read_SIC_IAR1()                 bfin_read32(SIC_IAR1)
#define bfin_write_SIC_IAR1(val)             bfin_write32(SIC_IAR1,val)
#define bfin_read_SIC_IAR2()                 bfin_read32(SIC_IAR2)
#define bfin_write_SIC_IAR2(val)             bfin_write32(SIC_IAR2,val)
#define bfin_read_SIC_IAR3()                 bfin_read32(SIC_IAR3)
#define bfin_write_SIC_IAR3(val)             bfin_write32(SIC_IAR3,val)
#define bfin_read_SIC_IMASK()                bfin_read32(SIC_IMASK)
#define bfin_write_SIC_IMASK(val)            bfin_write32(SIC_IMASK,val)
#define bfin_read_SIC_ISR()                  bfin_read32(SIC_ISR)
#define bfin_write_SIC_ISR(val)              bfin_write32(SIC_ISR,val)
#define bfin_read_SIC_IWR()                  bfin_read32(SIC_IWR)
#define bfin_write_SIC_IWR(val)              bfin_write32(SIC_IWR,val)

/* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */
#define bfin_read_WDOG_CTL()                 bfin_read16(WDOG_CTL)
#define bfin_write_WDOG_CTL(val)             bfin_write16(WDOG_CTL,val)
#define bfin_read_WDOG_CNT()                 bfin_read32(WDOG_CNT)
#define bfin_write_WDOG_CNT(val)             bfin_write32(WDOG_CNT,val)
#define bfin_read_WDOG_STAT()                bfin_read32(WDOG_STAT)
#define bfin_write_WDOG_STAT(val)            bfin_write32(WDOG_STAT,val)

/* Real Time Clock (0xFFC0 1400-0xFFC0 17FF) */
#define bfin_read_RTC_STAT()                 bfin_read32(RTC_STAT)
#define bfin_write_RTC_STAT(val)             bfin_write32(RTC_STAT,val)
#define bfin_read_RTC_ICTL()                 bfin_read16(RTC_ICTL)
#define bfin_write_RTC_ICTL(val)             bfin_write16(RTC_ICTL,val)
#define bfin_read_RTC_ISTAT()                bfin_read16(RTC_ISTAT)
#define bfin_write_RTC_ISTAT(val)            bfin_write16(RTC_ISTAT,val)
#define bfin_read_RTC_SWCNT()                bfin_read16(RTC_SWCNT)
#define bfin_write_RTC_SWCNT(val)            bfin_write16(RTC_SWCNT,val)
#define bfin_read_RTC_ALARM()                bfin_read32(RTC_ALARM)
#define bfin_write_RTC_ALARM(val)            bfin_write32(RTC_ALARM,val)
#define bfin_read_RTC_FAST()                 bfin_read16(RTC_FAST)
#define bfin_write_RTC_FAST(val)             bfin_write16(RTC_FAST,val)
#define bfin_read_RTC_PREN()                 bfin_read16(RTC_PREN)
#define bfin_write_RTC_PREN(val)             bfin_write16(RTC_PREN,val)

/* DMA Traffic controls */
#define bfin_read_DMA_TCPER()                bfin_read16(DMA_TCPER)
#define bfin_write_DMA_TCPER(val)            bfin_write16(DMA_TCPER,val)
#define bfin_read_DMA_TCCNT()                bfin_read16(DMA_TCCNT)
#define bfin_write_DMA_TCCNT(val)            bfin_write16(DMA_TCCNT,val)

/* Alternate deprecated register names (below) provided for backwards code compatibility */
#define bfin_read_DMA_TC_PER()               bfin_read16(DMA_TC_PER)
#define bfin_write_DMA_TC_PER(val)           bfin_write16(DMA_TC_PER,val)
#define bfin_read_DMA_TC_CNT()               bfin_read16(DMA_TC_CNT)
#define bfin_write_DMA_TC_CNT(val)           bfin_write16(DMA_TC_CNT,val)

/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
#define bfin_read_FIO_DIR()                  bfin_read16(FIO_DIR)
#define bfin_write_FIO_DIR(val)              bfin_write16(FIO_DIR,val)
#define bfin_read_FIO_MASKA_C()              bfin_read16(FIO_MASKA_C)
#define bfin_write_FIO_MASKA_C(val)          bfin_write16(FIO_MASKA_C,val)
#define bfin_read_FIO_MASKA_S()              bfin_read16(FIO_MASKA_S)
#define bfin_write_FIO_MASKA_S(val)          bfin_write16(FIO_MASKA_S,val)
#define bfin_read_FIO_MASKB_C()              bfin_read16(FIO_MASKB_C)
#define bfin_write_FIO_MASKB_C(val)          bfin_write16(FIO_MASKB_C,val)
#define bfin_read_FIO_MASKB_S()              bfin_read16(FIO_MASKB_S)
#define bfin_write_FIO_MASKB_S(val)          bfin_write16(FIO_MASKB_S,val)
#define bfin_read_FIO_POLAR()                bfin_read16(FIO_POLAR)
#define bfin_write_FIO_POLAR(val)            bfin_write16(FIO_POLAR,val)
#define bfin_read_FIO_EDGE()                 bfin_read16(FIO_EDGE)
#define bfin_write_FIO_EDGE(val)             bfin_write16(FIO_EDGE,val)
#define bfin_read_FIO_BOTH()                 bfin_read16(FIO_BOTH)
#define bfin_write_FIO_BOTH(val)             bfin_write16(FIO_BOTH,val)
#define bfin_read_FIO_INEN()                 bfin_read16(FIO_INEN)
#define bfin_write_FIO_INEN(val)             bfin_write16(FIO_INEN,val)
#define bfin_read_FIO_MASKA_D()              bfin_read16(FIO_MASKA_D)
#define bfin_write_FIO_MASKA_D(val)          bfin_write16(FIO_MASKA_D,val)
#define bfin_read_FIO_MASKA_T()              bfin_read16(FIO_MASKA_T)
#define bfin_write_FIO_MASKA_T(val)          bfin_write16(FIO_MASKA_T,val)
#define bfin_read_FIO_MASKB_D()              bfin_read16(FIO_MASKB_D)
#define bfin_write_FIO_MASKB_D(val)          bfin_write16(FIO_MASKB_D,val)
#define bfin_read_FIO_MASKB_T()              bfin_read16(FIO_MASKB_T)
#define bfin_write_FIO_MASKB_T(val)          bfin_write16(FIO_MASKB_T,val)


#if ANOMALY_05000311
#define BFIN_WRITE_FIO_FLAG(name) \
static __inline__ void bfin_write_FIO_FLAG_ ## name (unsigned short val)\
{\
	unsigned long flags;\
	local_irq_save(flags);\
	bfin_write16(FIO_FLAG_ ## name,val);\
	bfin_read_CHIPID();\
	local_irq_restore(flags);\
}
BFIN_WRITE_FIO_FLAG(D)
BFIN_WRITE_FIO_FLAG(C)
BFIN_WRITE_FIO_FLAG(S)
BFIN_WRITE_FIO_FLAG(T)

#define BFIN_READ_FIO_FLAG(name) \
static __inline__ unsigned short bfin_read_FIO_FLAG_ ## name (void)\
{\
	unsigned long flags;\
	unsigned short ret;\
	local_irq_save(flags);\
	ret = bfin_read16(FIO_FLAG_ ## name);\
	bfin_read_CHIPID();\
	local_irq_restore(flags);\
	return ret;\
}
BFIN_READ_FIO_FLAG(D)
BFIN_READ_FIO_FLAG(C)
BFIN_READ_FIO_FLAG(S)