📄 cdefbf561.h
字号:
#define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL,val)#define bfin_read_PPI0_STATUS() bfin_read16(PPI0_STATUS)#define bfin_write_PPI0_STATUS(val) bfin_write16(PPI0_STATUS,val)#define bfin_read_PPI0_COUNT() bfin_read16(PPI0_COUNT)#define bfin_write_PPI0_COUNT(val) bfin_write16(PPI0_COUNT,val)#define bfin_read_PPI0_DELAY() bfin_read16(PPI0_DELAY)#define bfin_write_PPI0_DELAY(val) bfin_write16(PPI0_DELAY,val)#define bfin_read_PPI0_FRAME() bfin_read16(PPI0_FRAME)#define bfin_write_PPI0_FRAME(val) bfin_write16(PPI0_FRAME,val)/* Parallel Peripheral Interface (PPI) 1 registers (0xFFC0 1300-0xFFC0 13FF) */#define bfin_read_PPI1_CONTROL() bfin_read16(PPI1_CONTROL)#define bfin_write_PPI1_CONTROL(val) bfin_write16(PPI1_CONTROL,val)#define bfin_read_PPI1_STATUS() bfin_read16(PPI1_STATUS)#define bfin_write_PPI1_STATUS(val) bfin_write16(PPI1_STATUS,val)#define bfin_read_PPI1_COUNT() bfin_read16(PPI1_COUNT)#define bfin_write_PPI1_COUNT(val) bfin_write16(PPI1_COUNT,val)#define bfin_read_PPI1_DELAY() bfin_read16(PPI1_DELAY)#define bfin_write_PPI1_DELAY(val) bfin_write16(PPI1_DELAY,val)#define bfin_read_PPI1_FRAME() bfin_read16(PPI1_FRAME)#define bfin_write_PPI1_FRAME(val) bfin_write16(PPI1_FRAME,val)/*DMA traffic control registers */#define bfin_read_DMA1_TC_PER() bfin_read16(DMA1_TC_PER)#define bfin_write_DMA1_TC_PER(val) bfin_write16(DMA1_TC_PER,val)#define bfin_read_DMA1_TC_CNT() bfin_read16(DMA1_TC_CNT)#define bfin_write_DMA1_TC_CNT(val) bfin_write16(DMA1_TC_CNT,val)#define bfin_read_DMA2_TC_PER() bfin_read16(DMA2_TC_PER)#define bfin_write_DMA2_TC_PER(val) bfin_write16(DMA2_TC_PER,val)#define bfin_read_DMA2_TC_CNT() bfin_read16(DMA2_TC_CNT)#define bfin_write_DMA2_TC_CNT(val) bfin_write16(DMA2_TC_CNT,val)/* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */#define bfin_read_DMA1_0_CONFIG() bfin_read16(DMA1_0_CONFIG)#define bfin_write_DMA1_0_CONFIG(val) bfin_write16(DMA1_0_CONFIG,val)#define bfin_read_DMA1_0_NEXT_DESC_PTR() bfin_read32(DMA1_0_NEXT_DESC_PTR)#define bfin_write_DMA1_0_NEXT_DESC_PTR(val) bfin_write32(DMA1_0_NEXT_DESC_PTR,val)#define bfin_read_DMA1_0_START_ADDR() bfin_read32(DMA1_0_START_ADDR)#define bfin_write_DMA1_0_START_ADDR(val) bfin_write32(DMA1_0_START_ADDR,val)#define bfin_read_DMA1_0_X_COUNT() bfin_read16(DMA1_0_X_COUNT)#define bfin_write_DMA1_0_X_COUNT(val) bfin_write16(DMA1_0_X_COUNT,val)#define bfin_read_DMA1_0_Y_COUNT() bfin_read16(DMA1_0_Y_COUNT)#define bfin_write_DMA1_0_Y_COUNT(val) bfin_write16(DMA1_0_Y_COUNT,val)#define bfin_read_DMA1_0_X_MODIFY() bfin_read16(DMA1_0_X_MODIFY)#define bfin_write_DMA1_0_X_MODIFY(val) bfin_write16(DMA1_0_X_MODIFY,val)#define bfin_read_DMA1_0_Y_MODIFY() bfin_read16(DMA1_0_Y_MODIFY)#define bfin_write_DMA1_0_Y_MODIFY(val) bfin_write16(DMA1_0_Y_MODIFY,val)#define bfin_read_DMA1_0_CURR_DESC_PTR() bfin_read32(DMA1_0_CURR_DESC_PTR)#define bfin_write_DMA1_0_CURR_DESC_PTR(val) bfin_write32(DMA1_0_CURR_DESC_PTR,val)#define bfin_read_DMA1_0_CURR_ADDR() bfin_read32(DMA1_0_CURR_ADDR)#define bfin_write_DMA1_0_CURR_ADDR(val) bfin_write32(DMA1_0_CURR_ADDR,val)#define bfin_read_DMA1_0_CURR_X_COUNT() bfin_read16(DMA1_0_CURR_X_COUNT)#define bfin_write_DMA1_0_CURR_X_COUNT(val) bfin_write16(DMA1_0_CURR_X_COUNT,val)#define bfin_read_DMA1_0_CURR_Y_COUNT() bfin_read16(DMA1_0_CURR_Y_COUNT)#define bfin_write_DMA1_0_CURR_Y_COUNT(val) bfin_write16(DMA1_0_CURR_Y_COUNT,val)#define bfin_read_DMA1_0_IRQ_STATUS() bfin_read16(DMA1_0_IRQ_STATUS)#define bfin_write_DMA1_0_IRQ_STATUS(val) bfin_write16(DMA1_0_IRQ_STATUS,val)#define bfin_read_DMA1_0_PERIPHERAL_MAP() bfin_read16(DMA1_0_PERIPHERAL_MAP)#define bfin_write_DMA1_0_PERIPHERAL_MAP(val) bfin_write16(DMA1_0_PERIPHERAL_MAP,val)#define bfin_read_DMA1_1_CONFIG() bfin_read16(DMA1_1_CONFIG)#define bfin_write_DMA1_1_CONFIG(val) bfin_write16(DMA1_1_CONFIG,val)#define bfin_read_DMA1_1_NEXT_DESC_PTR() bfin_read32(DMA1_1_NEXT_DESC_PTR)#define bfin_write_DMA1_1_NEXT_DESC_PTR(val) bfin_write32(DMA1_1_NEXT_DESC_PTR,val)#define bfin_read_DMA1_1_START_ADDR() bfin_read32(DMA1_1_START_ADDR)#define bfin_write_DMA1_1_START_ADDR(val) bfin_write32(DMA1_1_START_ADDR,val)#define bfin_read_DMA1_1_X_COUNT() bfin_read16(DMA1_1_X_COUNT)#define bfin_write_DMA1_1_X_COUNT(val) bfin_write16(DMA1_1_X_COUNT,val)#define bfin_read_DMA1_1_Y_COUNT() bfin_read16(DMA1_1_Y_COUNT)#define bfin_write_DMA1_1_Y_COUNT(val) bfin_write16(DMA1_1_Y_COUNT,val)#define bfin_read_DMA1_1_X_MODIFY() bfin_read16(DMA1_1_X_MODIFY)#define bfin_write_DMA1_1_X_MODIFY(val) bfin_write16(DMA1_1_X_MODIFY,val)#define bfin_read_DMA1_1_Y_MODIFY() bfin_read16(DMA1_1_Y_MODIFY)#define bfin_write_DMA1_1_Y_MODIFY(val) bfin_write16(DMA1_1_Y_MODIFY,val)#define bfin_read_DMA1_1_CURR_DESC_PTR() bfin_read32(DMA1_1_CURR_DESC_PTR)#define bfin_write_DMA1_1_CURR_DESC_PTR(val) bfin_write32(DMA1_1_CURR_DESC_PTR,val)#define bfin_read_DMA1_1_CURR_ADDR() bfin_read32(DMA1_1_CURR_ADDR)#define bfin_write_DMA1_1_CURR_ADDR(val) bfin_write32(DMA1_1_CURR_ADDR,val)#define bfin_read_DMA1_1_CURR_X_COUNT() bfin_read16(DMA1_1_CURR_X_COUNT)#define bfin_write_DMA1_1_CURR_X_COUNT(val) bfin_write16(DMA1_1_CURR_X_COUNT,val)#define bfin_read_DMA1_1_CURR_Y_COUNT() bfin_read16(DMA1_1_CURR_Y_COUNT)#define bfin_write_DMA1_1_CURR_Y_COUNT(val) bfin_write16(DMA1_1_CURR_Y_COUNT,val)#define bfin_read_DMA1_1_IRQ_STATUS() bfin_read16(DMA1_1_IRQ_STATUS)#define bfin_write_DMA1_1_IRQ_STATUS(val) bfin_write16(DMA1_1_IRQ_STATUS,val)#define bfin_read_DMA1_1_PERIPHERAL_MAP() bfin_read16(DMA1_1_PERIPHERAL_MAP)#define bfin_write_DMA1_1_PERIPHERAL_MAP(val) bfin_write16(DMA1_1_PERIPHERAL_MAP,val)#define bfin_read_DMA1_2_CONFIG() bfin_read16(DMA1_2_CONFIG)#define bfin_write_DMA1_2_CONFIG(val) bfin_write16(DMA1_2_CONFIG,val)#define bfin_read_DMA1_2_NEXT_DESC_PTR() bfin_read32(DMA1_2_NEXT_DESC_PTR)#define bfin_write_DMA1_2_NEXT_DESC_PTR(val) bfin_write32(DMA1_2_NEXT_DESC_PTR,val)#define bfin_read_DMA1_2_START_ADDR() bfin_read32(DMA1_2_START_ADDR)#define bfin_write_DMA1_2_START_ADDR(val) bfin_write32(DMA1_2_START_ADDR,val)#define bfin_read_DMA1_2_X_COUNT() bfin_read16(DMA1_2_X_COUNT)#define bfin_write_DMA1_2_X_COUNT(val) bfin_write16(DMA1_2_X_COUNT,val)#define bfin_read_DMA1_2_Y_COUNT() bfin_read16(DMA1_2_Y_COUNT)#define bfin_write_DMA1_2_Y_COUNT(val) bfin_write16(DMA1_2_Y_COUNT,val)#define bfin_read_DMA1_2_X_MODIFY() bfin_read16(DMA1_2_X_MODIFY)#define bfin_write_DMA1_2_X_MODIFY(val) bfin_write16(DMA1_2_X_MODIFY,val)#define bfin_read_DMA1_2_Y_MODIFY() bfin_read16(DMA1_2_Y_MODIFY)#define bfin_write_DMA1_2_Y_MODIFY(val) bfin_write16(DMA1_2_Y_MODIFY,val)#define bfin_read_DMA1_2_CURR_DESC_PTR() bfin_read32(DMA1_2_CURR_DESC_PTR)#define bfin_write_DMA1_2_CURR_DESC_PTR(val) bfin_write32(DMA1_2_CURR_DESC_PTR,val)#define bfin_read_DMA1_2_CURR_ADDR() bfin_read32(DMA1_2_CURR_ADDR)#define bfin_write_DMA1_2_CURR_ADDR(val) bfin_write32(DMA1_2_CURR_ADDR,val)#define bfin_read_DMA1_2_CURR_X_COUNT() bfin_read16(DMA1_2_CURR_X_COUNT)#define bfin_write_DMA1_2_CURR_X_COUNT(val) bfin_write16(DMA1_2_CURR_X_COUNT,val)#define bfin_read_DMA1_2_CURR_Y_COUNT() bfin_read16(DMA1_2_CURR_Y_COUNT)#define bfin_write_DMA1_2_CURR_Y_COUNT(val) bfin_write16(DMA1_2_CURR_Y_COUNT,val)#define bfin_read_DMA1_2_IRQ_STATUS() bfin_read16(DMA1_2_IRQ_STATUS)#define bfin_write_DMA1_2_IRQ_STATUS(val) bfin_write16(DMA1_2_IRQ_STATUS,val)#define bfin_read_DMA1_2_PERIPHERAL_MAP() bfin_read16(DMA1_2_PERIPHERAL_MAP)#define bfin_write_DMA1_2_PERIPHERAL_MAP(val) bfin_write16(DMA1_2_PERIPHERAL_MAP,val)#define bfin_read_DMA1_3_CONFIG() bfin_read16(DMA1_3_CONFIG)#define bfin_write_DMA1_3_CONFIG(val) bfin_write16(DMA1_3_CONFIG,val)#define bfin_read_DMA1_3_NEXT_DESC_PTR() bfin_read32(DMA1_3_NEXT_DESC_PTR)#define bfin_write_DMA1_3_NEXT_DESC_PTR(val) bfin_write32(DMA1_3_NEXT_DESC_PTR,val)#define bfin_read_DMA1_3_START_ADDR() bfin_read32(DMA1_3_START_ADDR)#define bfin_write_DMA1_3_START_ADDR(val) bfin_write32(DMA1_3_START_ADDR,val)#define bfin_read_DMA1_3_X_COUNT() bfin_read16(DMA1_3_X_COUNT)#define bfin_write_DMA1_3_X_COUNT(val) bfin_write16(DMA1_3_X_COUNT,val)#define bfin_read_DMA1_3_Y_COUNT() bfin_read16(DMA1_3_Y_COUNT)#define bfin_write_DMA1_3_Y_COUNT(val) bfin_write16(DMA1_3_Y_COUNT,val)#define bfin_read_DMA1_3_X_MODIFY() bfin_read16(DMA1_3_X_MODIFY)#define bfin_write_DMA1_3_X_MODIFY(val) bfin_write16(DMA1_3_X_MODIFY,val)#define bfin_read_DMA1_3_Y_MODIFY() bfin_read16(DMA1_3_Y_MODIFY)#define bfin_write_DMA1_3_Y_MODIFY(val) bfin_write16(DMA1_3_Y_MODIFY,val)#define bfin_read_DMA1_3_CURR_DESC_PTR() bfin_read32(DMA1_3_CURR_DESC_PTR)#define bfin_write_DMA1_3_CURR_DESC_PTR(val) bfin_write32(DMA1_3_CURR_DESC_PTR,val)#define bfin_read_DMA1_3_CURR_ADDR() bfin_read32(DMA1_3_CURR_ADDR)#define bfin_write_DMA1_3_CURR_ADDR(val) bfin_write32(DMA1_3_CURR_ADDR,val)#define bfin_read_DMA1_3_CURR_X_COUNT() bfin_read16(DMA1_3_CURR_X_COUNT)#define bfin_write_DMA1_3_CURR_X_COUNT(val) bfin_write16(DMA1_3_CURR_X_COUNT,val)#define bfin_read_DMA1_3_CURR_Y_COUNT() bfin_read16(DMA1_3_CURR_Y_COUNT)#define bfin_write_DMA1_3_CURR_Y_COUNT(val) bfin_write16(DMA1_3_CURR_Y_COUNT,val)#define bfin_read_DMA1_3_IRQ_STATUS() bfin_read16(DMA1_3_IRQ_STATUS)#define bfin_write_DMA1_3_IRQ_STATUS(val) bfin_write16(DMA1_3_IRQ_STATUS,val)#define bfin_read_DMA1_3_PERIPHERAL_MAP() bfin_read16(DMA1_3_PERIPHERAL_MAP)#define bfin_write_DMA1_3_PERIPHERAL_MAP(val) bfin_write16(DMA1_3_PERIPHERAL_MAP,val)#define bfin_read_DMA1_4_CONFIG() bfin_read16(DMA1_4_CONFIG)#define bfin_write_DMA1_4_CONFIG(val) bfin_write16(DMA1_4_CONFIG,val)#define bfin_read_DMA1_4_NEXT_DESC_PTR() bfin_read32(DMA1_4_NEXT_DESC_PTR)#define bfin_write_DMA1_4_NEXT_DESC_PTR(val) bfin_write32(DMA1_4_NEXT_DESC_PTR,val)#define bfin_read_DMA1_4_START_ADDR() bfin_read32(DMA1_4_START_ADDR)#define bfin_write_DMA1_4_START_ADDR(val) bfin_write32(DMA1_4_START_ADDR,val)#define bfin_read_DMA1_4_X_COUNT() bfin_read16(DMA1_4_X_COUNT)#define bfin_write_DMA1_4_X_COUNT(val) bfin_write16(DMA1_4_X_COUNT,val)#define bfin_read_DMA1_4_Y_COUNT() bfin_read16(DMA1_4_Y_COUNT)#define bfin_write_DMA1_4_Y_COUNT(val) bfin_write16(DMA1_4_Y_COUNT,val)#define bfin_read_DMA1_4_X_MODIFY() bfin_read16(DMA1_4_X_MODIFY)#define bfin_write_DMA1_4_X_MODIFY(val) bfin_write16(DMA1_4_X_MODIFY,val)#define bfin_read_DMA1_4_Y_MODIFY() bfin_read16(DMA1_4_Y_MODIFY)#define bfin_write_DMA1_4_Y_MODIFY(val) bfin_write16(DMA1_4_Y_MODIFY,val)#define bfin_read_DMA1_4_CURR_DESC_PTR() bfin_read32(DMA1_4_CURR_DESC_PTR)#define bfin_write_DMA1_4_CURR_DESC_PTR(val) bfin_write32(DMA1_4_CURR_DESC_PTR,val)#define bfin_read_DMA1_4_CURR_ADDR() bfin_read32(DMA1_4_CURR_ADDR)#define bfin_write_DMA1_4_CURR_ADDR(val) bfin_write32(DMA1_4_CURR_ADDR,val)#define bfin_read_DMA1_4_CURR_X_COUNT() bfin_read16(DMA1_4_CURR_X_COUNT)#define bfin_write_DMA1_4_CURR_X_COUNT(val) bfin_write16(DMA1_4_CURR_X_COUNT,val)#define bfin_read_DMA1_4_CURR_Y_COUNT() bfin_read16(DMA1_4_CURR_Y_COUNT)#define bfin_write_DMA1_4_CURR_Y_COUNT(val) bfin_write16(DMA1_4_CURR_Y_COUNT,val)#define bfin_read_DMA1_4_IRQ_STATUS() bfin_read16(DMA1_4_IRQ_STATUS)#define bfin_write_DMA1_4_IRQ_STATUS(val) bfin_write16(DMA1_4_IRQ_STATUS,val)#define bfin_read_DMA1_4_PERIPHERAL_MAP() bfin_read16(DMA1_4_PERIPHERAL_MAP)#define bfin_write_DMA1_4_PERIPHERAL_MAP(val) bfin_write16(DMA1_4_PERIPHERAL_MAP,val)#define bfin_read_DMA1_5_CONFIG() bfin_read16(DMA1_5_CONFIG)#define bfin_write_DMA1_5_CONFIG(val) bfin_write16(DMA1_5_CONFIG,val)#define bfin_read_DMA1_5_NEXT_DESC_PTR() bfin_read32(DMA1_5_NEXT_DESC_PTR)#define bfin_write_DMA1_5_NEXT_DESC_PTR(val) bfin_write32(DMA1_5_NEXT_DESC_PTR,val)#define bfin_read_DMA1_5_START_ADDR() bfin_read32(DMA1_5_START_ADDR)#define bfin_write_DMA1_5_START_ADDR(val) bfin_write32(DMA1_5_START_ADDR,val)#define bfin_read_DMA1_5_X_COUNT() bfin_read16(DMA1_5_X_COUNT)#define bfin_write_DMA1_5_X_COUNT(val) bfin_write16(DMA1_5_X_COUNT,val)#define bfin_read_DMA1_5_Y_COUNT() bfin_read16(DMA1_5_Y_COUNT)#define bfin_write_DMA1_5_Y_COUNT(val) bfin_write16(DMA1_5_Y_COUNT,val)#define bfin_read_DMA1_5_X_MODIFY() bfin_read16(DMA1_5_X_MODIFY)#define bfin_write_DMA1_5_X_MODIFY(val) bfin_write16(DMA1_5_X_MODIFY,val)#define bfin_read_DMA1_5_Y_MODIFY() bfin_read16(DMA1_5_Y_MODIFY)#define bfin_write_DMA1_5_Y_MODIFY(val) bfin_write16(DMA1_5_Y_MODIFY,val)#define bfin_read_DMA1_5_CURR_DESC_PTR() bfin_read32(DMA1_5_CURR_DESC_PTR)#define bfin_write_DMA1_5_CURR_DESC_PTR(val) bfin_write32(DMA1_5_CURR_DESC_PTR,val)#define bfin_read_DMA1_5_CURR_ADDR() bfin_read32(DMA1_5_CURR_ADDR)#define bfin_write_DMA1_5_CURR_ADDR(val) bfin_write32(DMA1_5_CURR_ADDR,val)#define bfin_read_DMA1_5_CURR_X_COUNT() bfin_read16(DMA1_5_CURR_X_COUNT)#define bfin_write_DMA1_5_CURR_X_COUNT(val) bfin_write16(DMA1_5_CURR_X_COUNT,val)#define bfin_read_DMA1_5_CURR_Y_COUNT() bfin_read16(DMA1_5_CURR_Y_COUNT)#define bfin_write_DMA1_5_CURR_Y_COUNT(val) bfin_write16(DMA1_5_CURR_Y_COUNT,val)#define bfin_read_DMA1_5_IRQ_STATUS() bfin_read16(DMA1_5_IRQ_STATUS)#define bfin_write_DMA1_5_IRQ_STATUS(val) bfin_write16(DMA1_5_IRQ_STATUS,val)#define bfin_read_DMA1_5_PERIPHERAL_MAP() bfin_read16(DMA1_5_PERIPHERAL_MAP)#define bfin_write_DMA1_5_PERIPHERAL_MAP(val) bfin_write16(DMA1_5_PERIPHERAL_MAP,val)⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -