📄 cdefbf561.h
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#define bfin_read_UART_IIR() bfin_read16(UART_IIR)#define bfin_write_UART_IIR(val) bfin_write16(UART_IIR,val)#define bfin_read_UART_LCR() bfin_read16(UART_LCR)#define bfin_write_UART_LCR(val) bfin_write16(UART_LCR,val)#define bfin_read_UART_MCR() bfin_read16(UART_MCR)#define bfin_write_UART_MCR(val) bfin_write16(UART_MCR,val)#define bfin_read_UART_LSR() bfin_read16(UART_LSR)#define bfin_write_UART_LSR(val) bfin_write16(UART_LSR,val)#define bfin_read_UART_MSR() bfin_read16(UART_MSR)#define bfin_write_UART_MSR(val) bfin_write16(UART_MSR,val)#define bfin_read_UART_SCR() bfin_read16(UART_SCR)#define bfin_write_UART_SCR(val) bfin_write16(UART_SCR,val)#define bfin_read_UART_GCTL() bfin_read16(UART_GCTL)#define bfin_write_UART_GCTL(val) bfin_write16(UART_GCTL,val)/* SPI Controller (0xFFC00500 - 0xFFC005FF) */#define bfin_read_SPI_CTL() bfin_read16(SPI_CTL)#define bfin_write_SPI_CTL(val) bfin_write16(SPI_CTL,val)#define bfin_read_SPI_FLG() bfin_read16(SPI_FLG)#define bfin_write_SPI_FLG(val) bfin_write16(SPI_FLG,val)#define bfin_read_SPI_STAT() bfin_read16(SPI_STAT)#define bfin_write_SPI_STAT(val) bfin_write16(SPI_STAT,val)#define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)#define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR,val)#define bfin_read_SPI_RDBR() bfin_read16(SPI_RDBR)#define bfin_write_SPI_RDBR(val) bfin_write16(SPI_RDBR,val)#define bfin_read_SPI_BAUD() bfin_read16(SPI_BAUD)#define bfin_write_SPI_BAUD(val) bfin_write16(SPI_BAUD,val)#define bfin_read_SPI_SHADOW() bfin_read16(SPI_SHADOW)#define bfin_write_SPI_SHADOW(val) bfin_write16(SPI_SHADOW,val)/* Timer 0-7 registers (0xFFC0 0600-0xFFC0 06FF) */#define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)#define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG,val)#define bfin_read_TIMER0_COUNTER() bfin_read32(TIMER0_COUNTER)#define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER,val)#define bfin_read_TIMER0_PERIOD() bfin_read32(TIMER0_PERIOD)#define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD,val)#define bfin_read_TIMER0_WIDTH() bfin_read32(TIMER0_WIDTH)#define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH,val)#define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)#define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG,val)#define bfin_read_TIMER1_COUNTER() bfin_read32(TIMER1_COUNTER)#define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER,val)#define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)#define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)#define bfin_read_TIMER1_WIDTH() bfin_read32(TIMER1_WIDTH)#define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH,val)#define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)#define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG,val)#define bfin_read_TIMER2_COUNTER() bfin_read32(TIMER2_COUNTER)#define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER,val)#define bfin_read_TIMER2_PERIOD() bfin_read32(TIMER2_PERIOD)#define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD,val)#define bfin_read_TIMER2_WIDTH() bfin_read32(TIMER2_WIDTH)#define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH,val)#define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)#define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG,val)#define bfin_read_TIMER3_COUNTER() bfin_read32(TIMER3_COUNTER)#define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER,val)#define bfin_read_TIMER3_PERIOD() bfin_read32(TIMER3_PERIOD)#define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD,val)#define bfin_read_TIMER3_WIDTH() bfin_read32(TIMER3_WIDTH)#define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH,val)#define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)#define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG,val)#define bfin_read_TIMER4_COUNTER() bfin_read32(TIMER4_COUNTER)#define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER,val)#define bfin_read_TIMER4_PERIOD() bfin_read32(TIMER4_PERIOD)#define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD,val)#define bfin_read_TIMER4_WIDTH() bfin_read32(TIMER4_WIDTH)#define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH,val)#define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)#define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG,val)#define bfin_read_TIMER5_COUNTER() bfin_read32(TIMER5_COUNTER)#define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER,val)#define bfin_read_TIMER5_PERIOD() bfin_read32(TIMER5_PERIOD)#define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD,val)#define bfin_read_TIMER5_WIDTH() bfin_read32(TIMER5_WIDTH)#define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH,val)#define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)#define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG,val)#define bfin_read_TIMER6_COUNTER() bfin_read32(TIMER6_COUNTER)#define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER,val)#define bfin_read_TIMER6_PERIOD() bfin_read32(TIMER6_PERIOD)#define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD,val)#define bfin_read_TIMER6_WIDTH() bfin_read32(TIMER6_WIDTH)#define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH,val)#define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)#define bfin_write_TIMER7_CONFIG(val) bfin_write16(TIMER7_CONFIG,val)#define bfin_read_TIMER7_COUNTER() bfin_read32(TIMER7_COUNTER)#define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER,val)#define bfin_read_TIMER7_PERIOD() bfin_read32(TIMER7_PERIOD)#define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD,val)#define bfin_read_TIMER7_WIDTH() bfin_read32(TIMER7_WIDTH)#define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH,val)/* Timer registers 8-11 (0xFFC0 1600-0xFFC0 16FF) */#define bfin_read_TMRS8_ENABLE() bfin_read16(TMRS8_ENABLE)#define bfin_write_TMRS8_ENABLE(val) bfin_write16(TMRS8_ENABLE,val)#define bfin_read_TMRS8_DISABLE() bfin_read16(TMRS8_DISABLE)#define bfin_write_TMRS8_DISABLE(val) bfin_write16(TMRS8_DISABLE,val)#define bfin_read_TMRS8_STATUS() bfin_read32(TMRS8_STATUS)#define bfin_write_TMRS8_STATUS(val) bfin_write32(TMRS8_STATUS,val)#define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)#define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG,val)#define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER)#define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER,val)#define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD)#define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD,val)#define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH)#define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH,val)#define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)#define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG,val)#define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER)#define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER,val)#define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD)#define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD,val)#define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH)#define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH,val)#define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)#define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG,val)#define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER)#define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER,val)#define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD)#define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD,val)#define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH)#define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH,val)#define bfin_read_TIMER11_CONFIG() bfin_read16(TIMER11_CONFIG)#define bfin_write_TIMER11_CONFIG(val) bfin_write16(TIMER11_CONFIG,val)#define bfin_read_TIMER11_COUNTER() bfin_read32(TIMER11_COUNTER)#define bfin_write_TIMER11_COUNTER(val) bfin_write32(TIMER11_COUNTER,val)#define bfin_read_TIMER11_PERIOD() bfin_read32(TIMER11_PERIOD)#define bfin_write_TIMER11_PERIOD(val) bfin_write32(TIMER11_PERIOD,val)#define bfin_read_TIMER11_WIDTH() bfin_read32(TIMER11_WIDTH)#define bfin_write_TIMER11_WIDTH(val) bfin_write32(TIMER11_WIDTH,val)#define bfin_read_TMRS4_ENABLE() bfin_read16(TMRS4_ENABLE)#define bfin_write_TMRS4_ENABLE(val) bfin_write16(TMRS4_ENABLE,val)#define bfin_read_TMRS4_DISABLE() bfin_read16(TMRS4_DISABLE)#define bfin_write_TMRS4_DISABLE(val) bfin_write16(TMRS4_DISABLE,val)#define bfin_read_TMRS4_STATUS() bfin_read32(TMRS4_STATUS)#define bfin_write_TMRS4_STATUS(val) bfin_write32(TMRS4_STATUS,val)/* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */#define bfin_read_FIO0_FLAG_D() bfin_read16(FIO0_FLAG_D)#define bfin_write_FIO0_FLAG_D(val) bfin_write16(FIO0_FLAG_D,val)#define bfin_read_FIO0_FLAG_C() bfin_read16(FIO0_FLAG_C)#define bfin_write_FIO0_FLAG_C(val) bfin_write16(FIO0_FLAG_C,val)#define bfin_read_FIO0_FLAG_S() bfin_read16(FIO0_FLAG_S)#define bfin_write_FIO0_FLAG_S(val) bfin_write16(FIO0_FLAG_S,val)#define bfin_read_FIO0_FLAG_T() bfin_read16(FIO0_FLAG_T)#define bfin_write_FIO0_FLAG_T(val) bfin_write16(FIO0_FLAG_T,val)#define bfin_read_FIO0_MASKA_D() bfin_read16(FIO0_MASKA_D)#define bfin_write_FIO0_MASKA_D(val) bfin_write16(FIO0_MASKA_D,val)#define bfin_read_FIO0_MASKA_C() bfin_read16(FIO0_MASKA_C)#define bfin_write_FIO0_MASKA_C(val) bfin_write16(FIO0_MASKA_C,val)#define bfin_read_FIO0_MASKA_S() bfin_read16(FIO0_MASKA_S)#define bfin_write_FIO0_MASKA_S(val) bfin_write16(FIO0_MASKA_S,val)#define bfin_read_FIO0_MASKA_T() bfin_read16(FIO0_MASKA_T)#define bfin_write_FIO0_MASKA_T(val) bfin_write16(FIO0_MASKA_T,val)#define bfin_read_FIO0_MASKB_D() bfin_read16(FIO0_MASKB_D)#define bfin_write_FIO0_MASKB_D(val) bfin_write16(FIO0_MASKB_D,val)#define bfin_read_FIO0_MASKB_C() bfin_read16(FIO0_MASKB_C)#define bfin_write_FIO0_MASKB_C(val) bfin_write16(FIO0_MASKB_C,val)#define bfin_read_FIO0_MASKB_S() bfin_read16(FIO0_MASKB_S)#define bfin_write_FIO0_MASKB_S(val) bfin_write16(FIO0_MASKB_S,val)#define bfin_read_FIO0_MASKB_T() bfin_read16(FIO0_MASKB_T)#define bfin_write_FIO0_MASKB_T(val) bfin_write16(FIO0_MASKB_T,val)#define bfin_read_FIO0_DIR() bfin_read16(FIO0_DIR)#define bfin_write_FIO0_DIR(val) bfin_write16(FIO0_DIR,val)#define bfin_read_FIO0_POLAR() bfin_read16(FIO0_POLAR)#define bfin_write_FIO0_POLAR(val) bfin_write16(FIO0_POLAR,val)#define bfin_read_FIO0_EDGE() bfin_read16(FIO0_EDGE)#define bfin_write_FIO0_EDGE(val) bfin_write16(FIO0_EDGE,val)#define bfin_read_FIO0_BOTH() bfin_read16(FIO0_BOTH)#define bfin_write_FIO0_BOTH(val) bfin_write16(FIO0_BOTH,val)#define bfin_read_FIO0_INEN() bfin_read16(FIO0_INEN)#define bfin_write_FIO0_INEN(val) bfin_write16(FIO0_INEN,val)/* Programmable Flag 1 registers (0xFFC0 1500-0xFFC0 15FF) */#define bfin_read_FIO1_FLAG_D() bfin_read16(FIO1_FLAG_D)#define bfin_write_FIO1_FLAG_D(val) bfin_write16(FIO1_FLAG_D,val)#define bfin_read_FIO1_FLAG_C() bfin_read16(FIO1_FLAG_C)#define bfin_write_FIO1_FLAG_C(val) bfin_write16(FIO1_FLAG_C,val)#define bfin_read_FIO1_FLAG_S() bfin_read16(FIO1_FLAG_S)#define bfin_write_FIO1_FLAG_S(val) bfin_write16(FIO1_FLAG_S,val)#define bfin_read_FIO1_FLAG_T() bfin_read16(FIO1_FLAG_T)⌨️ 快捷键说明
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