defbf537.h
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#define UnicastFramesReceivedOK EMAC_RXC_UNICST /* Unicast RX Frame Count */#define MulticastFramesReceivedOK EMAC_RXC_MULTI /* Multicast RX Frame Count */#define BroadcastFramesReceivedOK EMAC_RXC_BROAD /* Broadcast RX Frame Count */#define InRangeLengthErrors EMAC_RXC_LNERRI /* RX Frame In Range Error Count */#define OutOfRangeLengthField EMAC_RXC_LNERRO /* RX Frame Out Of Range Error Count */#define FrameTooLongErrors EMAC_RXC_LONG /* RX Frame Too Long Count */#define MACControlFramesReceived EMAC_RXC_MACCTL /* MAC Control RX Frame Count */#define UnsupportedOpcodesReceived EMAC_RXC_OPCODE /* Unsupported Op-Code RX Frame Count */#define PAUSEMACCtrlFramesReceived EMAC_RXC_PAUSE /* MAC Control Pause RX Frame Count */#define FramesReceivedAll EMAC_RXC_ALLFRM /* Overall RX Frame Count */#define OctetsReceivedAll EMAC_RXC_ALLOCT /* Overall RX Octet Count */#define TypedFramesReceived EMAC_RXC_TYPED /* Type/Length Consistent RX Frame Count */#define FramesLenLt64Received EMAC_RXC_SHORT /* RX Frame Fragment Count - Byte Count x < 64 */#define FramesLenEq64Received EMAC_RXC_EQ64 /* Good RX Frame Count - Byte Count x = 64 */#define FramesLen65_127Received EMAC_RXC_LT128 /* Good RX Frame Count - Byte Count 64 <= x < 128 */#define FramesLen128_255Received EMAC_RXC_LT256 /* Good RX Frame Count - Byte Count 128 <= x < 256 */#define FramesLen256_511Received EMAC_RXC_LT512 /* Good RX Frame Count - Byte Count 256 <= x < 512 */#define FramesLen512_1023Received EMAC_RXC_LT1024 /* Good RX Frame Count - Byte Count 512 <= x < 1024 */#define FramesLen1024_MaxReceived EMAC_RXC_GE1024 /* Good RX Frame Count - Byte Count x >= 1024 */#define FramesTransmittedOK EMAC_TXC_OK /* TX Frame Successful Count */#define SingleCollisionFrames EMAC_TXC_1COL /* TX Frames Successful After Single Collision Count */#define MultipleCollisionFrames EMAC_TXC_GT1COL /* TX Frames Successful After Multiple Collisions Count */#define OctetsTransmittedOK EMAC_TXC_OCTET /* TX Octets Successfully Received Count */#define FramesWithDeferredXmissions EMAC_TXC_DEFER /* TX Frame Delayed Due To Busy Count */#define LateCollisions EMAC_TXC_LATECL /* Late TX Collisions Count */#define FramesAbortedDueToXSColls EMAC_TXC_XS_COL /* TX Frame Failed Due To Excessive Collisions Count */#define FramesLostDueToIntMacXmitError EMAC_TXC_DMAUND /* Internal MAC Sublayer Error TX Frame Count */#define CarrierSenseErrors EMAC_TXC_CRSERR /* Carrier Sense Deasserted During TX Frame Count */#define UnicastFramesXmittedOK EMAC_TXC_UNICST /* Unicast TX Frame Count */#define MulticastFramesXmittedOK EMAC_TXC_MULTI /* Multicast TX Frame Count */#define BroadcastFramesXmittedOK EMAC_TXC_BROAD /* Broadcast TX Frame Count */#define FramesWithExcessiveDeferral EMAC_TXC_XS_DFR /* TX Frames With Excessive Deferral Count */#define MACControlFramesTransmitted EMAC_TXC_MACCTL /* MAC Control TX Frame Count */#define FramesTransmittedAll EMAC_TXC_ALLFRM /* Overall TX Frame Count */#define OctetsTransmittedAll EMAC_TXC_ALLOCT /* Overall TX Octet Count */#define FramesLenEq64Transmitted EMAC_TXC_EQ64 /* Good TX Frame Count - Byte Count x = 64 */#define FramesLen65_127Transmitted EMAC_TXC_LT128 /* Good TX Frame Count - Byte Count 64 <= x < 128 */#define FramesLen128_255Transmitted EMAC_TXC_LT256 /* Good TX Frame Count - Byte Count 128 <= x < 256 */#define FramesLen256_511Transmitted EMAC_TXC_LT512 /* Good TX Frame Count - Byte Count 256 <= x < 512 */#define FramesLen512_1023Transmitted EMAC_TXC_LT1024 /* Good TX Frame Count - Byte Count 512 <= x < 1024 */#define FramesLen1024_MaxTransmitted EMAC_TXC_GE1024 /* Good TX Frame Count - Byte Count x >= 1024 */#define TxAbortedFrames EMAC_TXC_ABORT /* Total TX Frames Aborted Count *//************************************************************************************* System MMR Register Bits And Macros**** Disclaimer: All macros are intended to make C and Assembly code more readable.** Use these macros carefully, as any that do left shifts for field** depositing will result in the lower order bits being destroyed. Any** macro that shifts left to properly position the bit-field should be** used as part of an OR to initialize a register and NOT as a dynamic** modifier UNLESS the lower order bits are saved and ORed back in when** the macro is used.*************************************************************************************//************************ ETHERNET 10/100 CONTROLLER MASKS ************************//* EMAC_OPMODE Masks */#define RE 0x00000001 /* Receiver Enable */#define ASTP 0x00000002 /* Enable Automatic Pad Stripping On RX Frames */#define HU 0x00000010 /* Hash Filter Unicast Address */#define HM 0x00000020 /* Hash Filter Multicast Address */#define PAM 0x00000040 /* Pass-All-Multicast Mode Enable */#define PR 0x00000080 /* Promiscuous Mode Enable */#define IFE 0x00000100 /* Inverse Filtering Enable */#define DBF 0x00000200 /* Disable Broadcast Frame Reception */#define PBF 0x00000400 /* Pass Bad Frames Enable */#define PSF 0x00000800 /* Pass Short Frames Enable */#define RAF 0x00001000 /* Receive-All Mode */#define TE 0x00010000 /* Transmitter Enable */#define DTXPAD 0x00020000 /* Disable Automatic TX Padding */#define DTXCRC 0x00040000 /* Disable Automatic TX CRC Generation */#define DC 0x00080000 /* Deferral Check */#define BOLMT 0x00300000 /* Back-Off Limit */#define BOLMT_10 0x00000000 /* 10-bit range */#define BOLMT_8 0x00100000 /* 8-bit range */#define BOLMT_4 0x00200000 /* 4-bit range */#define BOLMT_1 0x00300000 /* 1-bit range */#define DRTY 0x00400000 /* Disable TX Retry On Collision */#define LCTRE 0x00800000 /* Enable TX Retry On Late Collision */#define RMII 0x01000000 /* RMII/MII* Mode */#define RMII_10 0x02000000 /* Speed Select for RMII Port (10MBit/100MBit*) */#define FDMODE 0x04000000 /* Duplex Mode Enable (Full/Half*) */#define LB 0x08000000 /* Internal Loopback Enable */#define DRO 0x10000000 /* Disable Receive Own Frames (Half-Duplex Mode) *//* EMAC_STAADD Masks */#define STABUSY 0x00000001 /* Initiate Station Mgt Reg Access / STA Busy Stat */#define STAOP 0x00000002 /* Station Management Operation Code (Write/Read*) */#define STADISPRE 0x00000004 /* Disable Preamble Generation */#define STAIE 0x00000008 /* Station Mgt. Transfer Done Interrupt Enable */#define REGAD 0x000007C0 /* STA Register Address */#define PHYAD 0x0000F800 /* PHY Device Address */#define SET_REGAD(x) (((x)&0x1F)<< 6 ) /* Set STA Register Address */#define SET_PHYAD(x) (((x)&0x1F)<< 11 ) /* Set PHY Device Address *//* EMAC_STADAT Mask */#define STADATA 0x0000FFFF /* Station Management Data *//* EMAC_FLC Masks */#define FLCBUSY 0x00000001 /* Send Flow Ctrl Frame / Flow Ctrl Busy Status */#define FLCE 0x00000002 /* Flow Control Enable */#define PCF 0x00000004 /* Pass Control Frames */#define BKPRSEN 0x00000008 /* Enable Backpressure */#define FLCPAUSE 0xFFFF0000 /* Pause Time */#define SET_FLCPAUSE(x) (((x)&0xFFFF)<< 16) /* Set Pause Time *//* EMAC_WKUP_CTL Masks */#define CAPWKFRM 0x00000001 /* Capture Wake-Up Frames */#define MPKE 0x00000002 /* Magic Packet Enable */#define RWKE 0x00000004 /* Remote Wake-Up Frame Enable */#define GUWKE 0x00000008 /* Global Unicast Wake Enable */#define MPKS 0x00000020 /* Magic Packet Received Status */#define RWKS 0x00000F00 /* Wake-Up Frame Received Status, Filters 3:0 *//* EMAC_WKUP_FFCMD Masks */#define WF0_E 0x00000001 /* Enable Wake-Up Filter 0 */#define WF0_T 0x00000008 /* Wake-Up Filter 0 Addr Type (Multicast/Unicast*) */#define WF1_E 0x00000100 /* Enable Wake-Up Filter 1 */#define WF1_T 0x00000800 /* Wake-Up Filter 1 Addr Type (Multicast/Unicast*) */#define WF2_E 0x00010000 /* Enable Wake-Up Filter 2 */#define WF2_T 0x00080000 /* Wake-Up Filter 2 Addr Type (Multicast/Unicast*) */#define WF3_E 0x01000000 /* Enable Wake-Up Filter 3 */#define WF3_T 0x08000000 /* Wake-Up Filter 3 Addr Type (Multicast/Unicast*) *//* EMAC_WKUP_FFOFF Masks */#define WF0_OFF 0x000000FF /* Wake-Up Filter 0 Pattern Offset */#define WF1_OFF 0x0000FF00 /* Wake-Up Filter 1 Pattern Offset */#define WF2_OFF 0x00FF0000 /* Wake-Up Filter 2 Pattern Offset */#define WF3_OFF 0xFF000000 /* Wake-Up Filter 3 Pattern Offset */#define SET_WF0_OFF(x) (((x)&0xFF)<< 0 ) /* Set Wake-Up Filter 0 Byte Offset */#define SET_WF1_OFF(x) (((x)&0xFF)<< 8 ) /* Set Wake-Up Filter 1 Byte Offset */#define SET_WF2_OFF(x) (((x)&0xFF)<< 16 ) /* Set Wake-Up Filter 2 Byte Offset */⌨️ 快捷键说明
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