netxen_nic_init.c
来自「linux 内核源代码」· C语言 代码 · 共 1,553 行 · 第 1/3 页
C
1,553 行
/* * Copyright (C) 2003 - 2006 NetXen, Inc. * All rights reserved. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, * MA 02111-1307, USA. * * The full GNU General Public License is included in this distribution * in the file called LICENSE. * * Contact Information: * info@netxen.com * NetXen, * 3965 Freedom Circle, Fourth floor, * Santa Clara, CA 95054 * * * Source file for NIC routines to initialize the Phantom Hardware * */#include <linux/netdevice.h>#include <linux/delay.h>#include "netxen_nic.h"#include "netxen_nic_hw.h"#include "netxen_nic_phan_reg.h"struct crb_addr_pair { u32 addr; u32 data;};unsigned long last_schedule_time;#define NETXEN_MAX_CRB_XFORM 60static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];#define NETXEN_ADDR_ERROR (0xffffffff)#define crb_addr_transform(name) \ crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20#define NETXEN_NIC_XDMA_RESET 0x8000ffstatic inline voidnetxen_nic_locked_write_reg(struct netxen_adapter *adapter, unsigned long off, int *data){ void __iomem *addr = pci_base_offset(adapter, off); writel(*data, addr);}static void crb_addr_transform_setup(void){ crb_addr_transform(XDMA); crb_addr_transform(TIMR); crb_addr_transform(SRE); crb_addr_transform(SQN3); crb_addr_transform(SQN2); crb_addr_transform(SQN1); crb_addr_transform(SQN0); crb_addr_transform(SQS3); crb_addr_transform(SQS2); crb_addr_transform(SQS1); crb_addr_transform(SQS0); crb_addr_transform(RPMX7); crb_addr_transform(RPMX6); crb_addr_transform(RPMX5); crb_addr_transform(RPMX4); crb_addr_transform(RPMX3); crb_addr_transform(RPMX2); crb_addr_transform(RPMX1); crb_addr_transform(RPMX0); crb_addr_transform(ROMUSB); crb_addr_transform(SN); crb_addr_transform(QMN); crb_addr_transform(QMS); crb_addr_transform(PGNI); crb_addr_transform(PGND); crb_addr_transform(PGN3); crb_addr_transform(PGN2); crb_addr_transform(PGN1); crb_addr_transform(PGN0); crb_addr_transform(PGSI); crb_addr_transform(PGSD); crb_addr_transform(PGS3); crb_addr_transform(PGS2); crb_addr_transform(PGS1); crb_addr_transform(PGS0); crb_addr_transform(PS); crb_addr_transform(PH); crb_addr_transform(NIU); crb_addr_transform(I2Q); crb_addr_transform(EG); crb_addr_transform(MN); crb_addr_transform(MS); crb_addr_transform(CAS2); crb_addr_transform(CAS1); crb_addr_transform(CAS0); crb_addr_transform(CAM); crb_addr_transform(C2C1); crb_addr_transform(C2C0); crb_addr_transform(SMB);}int netxen_init_firmware(struct netxen_adapter *adapter){ u32 state = 0, loops = 0, err = 0; /* Window 1 call */ state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); if (state == PHAN_INITIALIZE_ACK) return 0; while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) { udelay(100); /* Window 1 call */ state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); loops++; } if (loops >= 2000) { printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n", state); err = -EIO; return err; } /* Window 1 call */ writel(INTR_SCHEME_PERPORT, NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST)); writel(MPORT_MULTI_FUNCTION_MODE, NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE)); writel(PHAN_INITIALIZE_ACK, NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); return err;}#define NETXEN_ADDR_LIMIT 0xffffffffULLvoid *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr, struct pci_dev **used_dev){ void *addr; addr = pci_alloc_consistent(pdev, sz, ptr); if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) { *used_dev = pdev; return addr; } pci_free_consistent(pdev, sz, addr, *ptr); addr = pci_alloc_consistent(NULL, sz, ptr); *used_dev = NULL; return addr;}void netxen_initialize_adapter_sw(struct netxen_adapter *adapter){ int ctxid, ring; u32 i; u32 num_rx_bufs = 0; struct netxen_rcv_desc_ctx *rcv_desc; DPRINTK(INFO, "initializing some queues: %p\n", adapter); for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) { for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { struct netxen_rx_buffer *rx_buf; rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring]; rcv_desc->rcv_free = rcv_desc->max_rx_desc_count; rcv_desc->begin_alloc = 0; rx_buf = rcv_desc->rx_buf_arr; num_rx_bufs = rcv_desc->max_rx_desc_count; /* * Now go through all of them, set reference handles * and put them in the queues. */ for (i = 0; i < num_rx_bufs; i++) { rx_buf->ref_handle = i; rx_buf->state = NETXEN_BUFFER_FREE; DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:" "%p\n", ctxid, i, rx_buf); rx_buf++; } } }}void netxen_initialize_adapter_hw(struct netxen_adapter *adapter){ int ports = 0; struct netxen_board_info *board_info = &(adapter->ahw.boardcfg); if (netxen_nic_get_board_info(adapter) != 0) printk("%s: Error getting board config info.\n", netxen_nic_driver_name); get_brd_port_by_type(board_info->board_type, &ports); if (ports == 0) printk(KERN_ERR "%s: Unknown board type\n", netxen_nic_driver_name); adapter->ahw.max_ports = ports;}void netxen_initialize_adapter_ops(struct netxen_adapter *adapter){ switch (adapter->ahw.board_type) { case NETXEN_NIC_GBE: adapter->enable_phy_interrupts = netxen_niu_gbe_enable_phy_interrupts; adapter->disable_phy_interrupts = netxen_niu_gbe_disable_phy_interrupts; adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr; adapter->macaddr_set = netxen_niu_macaddr_set; adapter->set_mtu = netxen_nic_set_mtu_gb; adapter->set_promisc = netxen_niu_set_promiscuous_mode; adapter->unset_promisc = netxen_niu_set_promiscuous_mode; adapter->phy_read = netxen_niu_gbe_phy_read; adapter->phy_write = netxen_niu_gbe_phy_write; adapter->init_niu = netxen_nic_init_niu_gb; adapter->stop_port = netxen_niu_disable_gbe_port; break; case NETXEN_NIC_XGBE: adapter->enable_phy_interrupts = netxen_niu_xgbe_enable_phy_interrupts; adapter->disable_phy_interrupts = netxen_niu_xgbe_disable_phy_interrupts; adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr; adapter->macaddr_set = netxen_niu_xg_macaddr_set; adapter->set_mtu = netxen_nic_set_mtu_xgb; adapter->init_port = netxen_niu_xg_init_port; adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode; adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode; adapter->stop_port = netxen_niu_disable_xg_port; break; default: break; }}/* * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB * address to external PCI CRB address. */u32 netxen_decode_crb_addr(u32 addr){ int i; u32 base_addr, offset, pci_base; crb_addr_transform_setup(); pci_base = NETXEN_ADDR_ERROR; base_addr = addr & 0xfff00000; offset = addr & 0x000fffff; for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { if (crb_addr_xform[i] == base_addr) { pci_base = i << 20; break; } } if (pci_base == NETXEN_ADDR_ERROR) return pci_base; else return (pci_base + offset);}static long rom_max_timeout = 100;static long rom_lock_timeout = 10000;static long rom_write_timeout = 700;static inline int rom_lock(struct netxen_adapter *adapter){ int iter; u32 done = 0; int timeout = 0; while (!done) { /* acquire semaphore2 from PCI HW block */ netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK), &done); if (done == 1) break; if (timeout >= rom_lock_timeout) return -EIO; timeout++; /* * Yield CPU */ if (!in_atomic()) schedule(); else { for (iter = 0; iter < 20; iter++) cpu_relax(); /*This a nop instr on i386 */ } } netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER); return 0;}int netxen_wait_rom_done(struct netxen_adapter *adapter){ long timeout = 0; long done = 0; while (done == 0) { done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS); done &= 2; timeout++; if (timeout >= rom_max_timeout) { printk("Timeout reached waiting for rom done"); return -EIO; } } return 0;}static inline int netxen_rom_wren(struct netxen_adapter *adapter){ /* Set write enable latch in ROM status register */ netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WREN); if (netxen_wait_rom_done(adapter)) { return -1; } return 0;}static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter, unsigned int addr){ unsigned int data = 0xdeaddead; data = netxen_nic_reg_read(adapter, addr); return data;}static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter){ netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_RDSR); if (netxen_wait_rom_done(adapter)) { return -1; } return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);}static inline void netxen_rom_unlock(struct netxen_adapter *adapter){ u32 val; /* release semaphore2 */ netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);}int netxen_rom_wip_poll(struct netxen_adapter *adapter){ long timeout = 0; long wip = 1; int val; netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); while (wip != 0) { val = netxen_do_rom_rdsr(adapter); wip = val & 1; timeout++; if (timeout > rom_max_timeout) { return -1; } } return 0;}static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr, int data){ if (netxen_rom_wren(adapter)) { return -1; } netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data); netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_PP); if (netxen_wait_rom_done(adapter)) { netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); return -1; } return netxen_rom_wip_poll(adapter);}static inline intdo_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp){ cond_resched(); netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); udelay(100); /* prevent bursting on CRB */ netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); if (netxen_wait_rom_done(adapter)) { printk("Error waiting for rom done\n"); return -EIO; } /* reset abyte_cnt and dummy_byte_cnt */ netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); udelay(100); /* prevent bursting on CRB */ netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA); return 0;}static inline int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, u8 *bytes, size_t size){ int addridx; int ret = 0; for (addridx = addr; addridx < (addr + size); addridx += 4) { ret = do_rom_fast_read(adapter, addridx, (int *)bytes); if (ret != 0) break; *(int *)bytes = cpu_to_le32(*(int *)bytes); bytes += 4; } return ret;}intnetxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, u8 *bytes, size_t size){ int ret; ret = rom_lock(adapter); if (ret < 0) return ret; ret = do_rom_fast_read_words(adapter, addr, bytes, size); netxen_rom_unlock(adapter); return ret;}int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp){ int ret; if (rom_lock(adapter) != 0) return -EIO; ret = do_rom_fast_read(adapter, addr, valp); netxen_rom_unlock(adapter); return ret;}int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data){ int ret = 0; if (rom_lock(adapter) != 0) { return -1; } ret = do_rom_fast_write(adapter, addr, data); netxen_rom_unlock(adapter); return ret;}static inline int do_rom_fast_write_words(struct netxen_adapter *adapter, int addr, u8 *bytes, size_t size){ int addridx = addr; int ret = 0; while (addridx < (addr + size)) { int last_attempt = 0; int timeout = 0; int data; data = le32_to_cpu((*(u32*)bytes)); ret = do_rom_fast_write(adapter, addridx, data); if (ret < 0) return ret; while(1) { int data1; ret = do_rom_fast_read(adapter, addridx, &data1); if (ret < 0) return ret; if (data1 == data) break; if (timeout++ >= rom_write_timeout) { if (last_attempt++ < 4) { ret = do_rom_fast_write(adapter, addridx, data); if (ret < 0)
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