pxamci.c
来自「linux 内核源代码」· C语言 代码 · 共 685 行 · 第 1/2 页
C
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/* * linux/drivers/mmc/host/pxa.c - PXA MMCI driver * * Copyright (C) 2003 Russell King, All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This hardware is really sick: * - No way to clear interrupts. * - Have to turn off the clock whenever we touch the device. * - Doesn't tell you how many data blocks were transferred. * Yuck! * * 1 and 3 byte data transfers not supported * max block length up to 1023 */#include <linux/module.h>#include <linux/init.h>#include <linux/ioport.h>#include <linux/platform_device.h>#include <linux/delay.h>#include <linux/interrupt.h>#include <linux/dma-mapping.h>#include <linux/clk.h>#include <linux/err.h>#include <linux/mmc/host.h>#include <asm/dma.h>#include <asm/io.h>#include <asm/sizes.h>#include <asm/arch/pxa-regs.h>#include <asm/arch/mmc.h>#include "pxamci.h"#define DRIVER_NAME "pxa2xx-mci"#define NR_SG 1#define CLKRT_OFF (~0)struct pxamci_host { struct mmc_host *mmc; spinlock_t lock; struct resource *res; void __iomem *base; struct clk *clk; unsigned long clkrate; int irq; int dma; unsigned int clkrt; unsigned int cmdat; unsigned int imask; unsigned int power_mode; struct pxamci_platform_data *pdata; struct mmc_request *mrq; struct mmc_command *cmd; struct mmc_data *data; dma_addr_t sg_dma; struct pxa_dma_desc *sg_cpu; unsigned int dma_len; unsigned int dma_dir;};static void pxamci_stop_clock(struct pxamci_host *host){ if (readl(host->base + MMC_STAT) & STAT_CLK_EN) { unsigned long timeout = 10000; unsigned int v; writel(STOP_CLOCK, host->base + MMC_STRPCL); do { v = readl(host->base + MMC_STAT); if (!(v & STAT_CLK_EN)) break; udelay(1); } while (timeout--); if (v & STAT_CLK_EN) dev_err(mmc_dev(host->mmc), "unable to stop clock\n"); }}static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask){ unsigned long flags; spin_lock_irqsave(&host->lock, flags); host->imask &= ~mask; writel(host->imask, host->base + MMC_I_MASK); spin_unlock_irqrestore(&host->lock, flags);}static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask){ unsigned long flags; spin_lock_irqsave(&host->lock, flags); host->imask |= mask; writel(host->imask, host->base + MMC_I_MASK); spin_unlock_irqrestore(&host->lock, flags);}static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data){ unsigned int nob = data->blocks; unsigned long long clks; unsigned int timeout; u32 dcmd; int i; host->data = data; if (data->flags & MMC_DATA_STREAM) nob = 0xffff; writel(nob, host->base + MMC_NOB); writel(data->blksz, host->base + MMC_BLKLEN); clks = (unsigned long long)data->timeout_ns * host->clkrate; do_div(clks, 1000000000UL); timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt); writel((timeout + 255) / 256, host->base + MMC_RDTO); if (data->flags & MMC_DATA_READ) { host->dma_dir = DMA_FROM_DEVICE; dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG; DRCMRTXMMC = 0; DRCMRRXMMC = host->dma | DRCMR_MAPVLD; } else { host->dma_dir = DMA_TO_DEVICE; dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC; DRCMRRXMMC = 0; DRCMRTXMMC = host->dma | DRCMR_MAPVLD; } dcmd |= DCMD_BURST32 | DCMD_WIDTH1; host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma_dir); for (i = 0; i < host->dma_len; i++) { unsigned int length = sg_dma_len(&data->sg[i]); host->sg_cpu[i].dcmd = dcmd | length; if (length & 31 && !(data->flags & MMC_DATA_READ)) host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN; if (data->flags & MMC_DATA_READ) { host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO; host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]); } else { host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]); host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO; } host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) * sizeof(struct pxa_dma_desc); } host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP; wmb(); DDADR(host->dma) = host->sg_dma; DCSR(host->dma) = DCSR_RUN;}static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat){ WARN_ON(host->cmd != NULL); host->cmd = cmd; if (cmd->flags & MMC_RSP_BUSY) cmdat |= CMDAT_BUSY;#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE)) switch (RSP_TYPE(mmc_resp_type(cmd))) { case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */ cmdat |= CMDAT_RESP_SHORT; break; case RSP_TYPE(MMC_RSP_R3): cmdat |= CMDAT_RESP_R3; break; case RSP_TYPE(MMC_RSP_R2): cmdat |= CMDAT_RESP_R2; break; default: break; } writel(cmd->opcode, host->base + MMC_CMD); writel(cmd->arg >> 16, host->base + MMC_ARGH); writel(cmd->arg & 0xffff, host->base + MMC_ARGL); writel(cmdat, host->base + MMC_CMDAT); writel(host->clkrt, host->base + MMC_CLKRT); writel(START_CLOCK, host->base + MMC_STRPCL); pxamci_enable_irq(host, END_CMD_RES);}static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq){ host->mrq = NULL; host->cmd = NULL; host->data = NULL; mmc_request_done(host->mmc, mrq);}static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat){ struct mmc_command *cmd = host->cmd; int i; u32 v; if (!cmd) return 0; host->cmd = NULL; /* * Did I mention this is Sick. We always need to * discard the upper 8 bits of the first 16-bit word. */ v = readl(host->base + MMC_RES) & 0xffff; for (i = 0; i < 4; i++) { u32 w1 = readl(host->base + MMC_RES) & 0xffff; u32 w2 = readl(host->base + MMC_RES) & 0xffff; cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8; v = w2; } if (stat & STAT_TIME_OUT_RESPONSE) { cmd->error = -ETIMEDOUT; } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {#ifdef CONFIG_PXA27x /* * workaround for erratum #42: * Intel PXA27x Family Processor Specification Update Rev 001 * A bogus CRC error can appear if the msb of a 136 bit * response is a one. */ if (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000) { pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode); } else#endif cmd->error = -EILSEQ; } pxamci_disable_irq(host, END_CMD_RES); if (host->data && !cmd->error) { pxamci_enable_irq(host, DATA_TRAN_DONE); } else { pxamci_finish_request(host, host->mrq); } return 1;}static int pxamci_data_done(struct pxamci_host *host, unsigned int stat){ struct mmc_data *data = host->data; if (!data) return 0; DCSR(host->dma) = 0; dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, host->dma_dir); if (stat & STAT_READ_TIME_OUT) data->error = -ETIMEDOUT; else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR)) data->error = -EILSEQ; /* * There appears to be a hardware design bug here. There seems to * be no way to find out how much data was transferred to the card. * This means that if there was an error on any block, we mark all * data blocks as being in error. */ if (!data->error) data->bytes_xfered = data->blocks * data->blksz; else data->bytes_xfered = 0; pxamci_disable_irq(host, DATA_TRAN_DONE); host->data = NULL; if (host->mrq->stop) { pxamci_stop_clock(host); pxamci_start_cmd(host, host->mrq->stop, host->cmdat); } else { pxamci_finish_request(host, host->mrq); } return 1;}static irqreturn_t pxamci_irq(int irq, void *devid){ struct pxamci_host *host = devid; unsigned int ireg; int handled = 0; ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK); if (ireg) { unsigned stat = readl(host->base + MMC_STAT); pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat); if (ireg & END_CMD_RES) handled |= pxamci_cmd_done(host, stat); if (ireg & DATA_TRAN_DONE) handled |= pxamci_data_done(host, stat); if (ireg & SDIO_INT) { mmc_signal_sdio_irq(host->mmc); handled = 1; } } return IRQ_RETVAL(handled);}static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq){ struct pxamci_host *host = mmc_priv(mmc); unsigned int cmdat; WARN_ON(host->mrq != NULL); host->mrq = mrq; pxamci_stop_clock(host); cmdat = host->cmdat; host->cmdat &= ~CMDAT_INIT; if (mrq->data) { pxamci_setup_data(host, mrq->data);
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