qla_def.h

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			uint8_t hba_identifier[8];
			uint32_t entry_count;
			uint8_t port_name[8];
			struct ct_fdmi_hba_attributes attrs;
		} rhba;

		struct {
			uint8_t hba_identifier[8];
			struct ct_fdmi_hba_attributes attrs;
		} rhat;

		struct {
			uint8_t port_name[8];
			struct ct_fdmi_port_attributes attrs;
		} rpa;

		struct {
			uint8_t port_name[8];
		} dhba;

		struct {
			uint8_t port_name[8];
		} dhat;

		struct {
			uint8_t port_name[8];
		} dprt;

		struct {
			uint8_t port_name[8];
		} dpa;

		struct {
			uint8_t port_name[8];
		} gpsc;
	} req;
};

/* CT command response header */
struct ct_rsp_hdr {
	struct ct_cmd_hdr header;
	uint16_t response;
	uint16_t residual;
	uint8_t fragment_id;
	uint8_t reason_code;
	uint8_t explanation_code;
	uint8_t vendor_unique;
};

struct ct_sns_gid_pt_data {
	uint8_t control_byte;
	uint8_t port_id[3];
};

struct ct_sns_rsp {
	struct ct_rsp_hdr header;

	union {
		struct {
			uint8_t port_type;
			uint8_t port_id[3];
			uint8_t port_name[8];
			uint8_t sym_port_name_len;
			uint8_t sym_port_name[255];
			uint8_t node_name[8];
			uint8_t sym_node_name_len;
			uint8_t sym_node_name[255];
			uint8_t init_proc_assoc[8];
			uint8_t node_ip_addr[16];
			uint8_t class_of_service[4];
			uint8_t fc4_types[32];
			uint8_t ip_address[16];
			uint8_t fabric_port_name[8];
			uint8_t reserved;
			uint8_t hard_address[3];
		} ga_nxt;

		struct {
			struct ct_sns_gid_pt_data entries[MAX_FIBRE_DEVICES];
		} gid_pt;

		struct {
			uint8_t port_name[8];
		} gpn_id;

		struct {
			uint8_t node_name[8];
		} gnn_id;

		struct {
			uint8_t fc4_types[32];
		} gft_id;

		struct {
			uint32_t entry_count;
			uint8_t port_name[8];
			struct ct_fdmi_hba_attributes attrs;
		} ghat;

		struct {
			uint8_t port_name[8];
		} gfpn_id;

		struct {
			uint16_t speeds;
			uint16_t speed;
		} gpsc;
	} rsp;
};

struct ct_sns_pkt {
	union {
		struct ct_sns_req req;
		struct ct_sns_rsp rsp;
	} p;
};

/*
 * SNS command structures -- for 2200 compatability.
 */
#define	RFT_ID_SNS_SCMD_LEN	22
#define	RFT_ID_SNS_CMD_SIZE	60
#define	RFT_ID_SNS_DATA_SIZE	16

#define	RNN_ID_SNS_SCMD_LEN	10
#define	RNN_ID_SNS_CMD_SIZE	36
#define	RNN_ID_SNS_DATA_SIZE	16

#define	GA_NXT_SNS_SCMD_LEN	6
#define	GA_NXT_SNS_CMD_SIZE	28
#define	GA_NXT_SNS_DATA_SIZE	(620 + 16)

#define	GID_PT_SNS_SCMD_LEN	6
#define	GID_PT_SNS_CMD_SIZE	28
#define	GID_PT_SNS_DATA_SIZE	(MAX_FIBRE_DEVICES * 4 + 16)

#define	GPN_ID_SNS_SCMD_LEN	6
#define	GPN_ID_SNS_CMD_SIZE	28
#define	GPN_ID_SNS_DATA_SIZE	(8 + 16)

#define	GNN_ID_SNS_SCMD_LEN	6
#define	GNN_ID_SNS_CMD_SIZE	28
#define	GNN_ID_SNS_DATA_SIZE	(8 + 16)

struct sns_cmd_pkt {
	union {
		struct {
			uint16_t buffer_length;
			uint16_t reserved_1;
			uint32_t buffer_address[2];
			uint16_t subcommand_length;
			uint16_t reserved_2;
			uint16_t subcommand;
			uint16_t size;
			uint32_t reserved_3;
			uint8_t param[36];
		} cmd;

		uint8_t rft_data[RFT_ID_SNS_DATA_SIZE];
		uint8_t rnn_data[RNN_ID_SNS_DATA_SIZE];
		uint8_t gan_data[GA_NXT_SNS_DATA_SIZE];
		uint8_t gid_data[GID_PT_SNS_DATA_SIZE];
		uint8_t gpn_data[GPN_ID_SNS_DATA_SIZE];
		uint8_t gnn_data[GNN_ID_SNS_DATA_SIZE];
	} p;
};

struct fw_blob {
	char *name;
	uint32_t segs[4];
	const struct firmware *fw;
};

/* Return data from MBC_GET_ID_LIST call. */
struct gid_list_info {
	uint8_t	al_pa;
	uint8_t	area;
	uint8_t	domain;
	uint8_t	loop_id_2100;	/* ISP2100/ISP2200 -- 4 bytes. */
	uint16_t loop_id;	/* ISP23XX         -- 6 bytes. */
	uint16_t reserved_1;	/* ISP24XX         -- 8 bytes. */
};
#define GID_LIST_SIZE (sizeof(struct gid_list_info) * MAX_FIBRE_DEVICES)

/* NPIV */
typedef struct vport_info {
	uint8_t		port_name[WWN_SIZE];
	uint8_t		node_name[WWN_SIZE];
	int		vp_id;
	uint16_t	loop_id;
	unsigned long	host_no;
	uint8_t		port_id[3];
	int		loop_state;
} vport_info_t;

typedef struct vport_params {
	uint8_t 	port_name[WWN_SIZE];
	uint8_t 	node_name[WWN_SIZE];
	uint32_t 	options;
#define	VP_OPTS_RETRY_ENABLE	BIT_0
#define	VP_OPTS_VP_DISABLE	BIT_1
} vport_params_t;

/* NPIV - return codes of VP create and modify */
#define VP_RET_CODE_OK			0
#define VP_RET_CODE_FATAL		1
#define VP_RET_CODE_WRONG_ID		2
#define VP_RET_CODE_WWPN		3
#define VP_RET_CODE_RESOURCES		4
#define VP_RET_CODE_NO_MEM		5
#define VP_RET_CODE_NOT_FOUND		6

#define to_qla_parent(x) (((x)->parent) ? (x)->parent : (x))

/*
 * ISP operations
 */
struct isp_operations {

	int (*pci_config) (struct scsi_qla_host *);
	void (*reset_chip) (struct scsi_qla_host *);
	int (*chip_diag) (struct scsi_qla_host *);
	void (*config_rings) (struct scsi_qla_host *);
	void (*reset_adapter) (struct scsi_qla_host *);
	int (*nvram_config) (struct scsi_qla_host *);
	void (*update_fw_options) (struct scsi_qla_host *);
	int (*load_risc) (struct scsi_qla_host *, uint32_t *);

	char * (*pci_info_str) (struct scsi_qla_host *, char *);
	char * (*fw_version_str) (struct scsi_qla_host *, char *);

	irq_handler_t intr_handler;
	void (*enable_intrs) (struct scsi_qla_host *);
	void (*disable_intrs) (struct scsi_qla_host *);

	int (*abort_command) (struct scsi_qla_host *, srb_t *);
	int (*abort_target) (struct fc_port *);
	int (*fabric_login) (struct scsi_qla_host *, uint16_t, uint8_t,
		uint8_t, uint8_t, uint16_t *, uint8_t);
	int (*fabric_logout) (struct scsi_qla_host *, uint16_t, uint8_t,
	    uint8_t, uint8_t);

	uint16_t (*calc_req_entries) (uint16_t);
	void (*build_iocbs) (srb_t *, cmd_entry_t *, uint16_t);
	void * (*prep_ms_iocb) (struct scsi_qla_host *, uint32_t, uint32_t);
	void * (*prep_ms_fdmi_iocb) (struct scsi_qla_host *, uint32_t,
	    uint32_t);

	uint8_t * (*read_nvram) (struct scsi_qla_host *, uint8_t *,
		uint32_t, uint32_t);
	int (*write_nvram) (struct scsi_qla_host *, uint8_t *, uint32_t,
		uint32_t);

	void (*fw_dump) (struct scsi_qla_host *, int);

	int (*beacon_on) (struct scsi_qla_host *);
	int (*beacon_off) (struct scsi_qla_host *);
	void (*beacon_blink) (struct scsi_qla_host *);

	uint8_t * (*read_optrom) (struct scsi_qla_host *, uint8_t *,
		uint32_t, uint32_t);
	int (*write_optrom) (struct scsi_qla_host *, uint8_t *, uint32_t,
		uint32_t);

	int (*get_flash_version) (struct scsi_qla_host *, void *);
};

/* MSI-X Support *************************************************************/

#define QLA_MSIX_CHIP_REV_24XX	3
#define QLA_MSIX_FW_MODE(m)	(((m) & (BIT_7|BIT_8|BIT_9)) >> 7)
#define QLA_MSIX_FW_MODE_1(m)	(QLA_MSIX_FW_MODE(m) == 1)

#define QLA_MSIX_DEFAULT	0x00
#define QLA_MSIX_RSP_Q		0x01

#define QLA_MSIX_ENTRIES	2
#define QLA_MIDX_DEFAULT	0
#define QLA_MIDX_RSP_Q		1

struct scsi_qla_host;

struct qla_msix_entry {
	int have_irq;
	uint16_t msix_vector;
	uint16_t msix_entry;
};

#define	WATCH_INTERVAL		1       /* number of seconds */

/* NPIV */
#define MAX_MULTI_ID_LOOP                     126
#define MAX_MULTI_ID_FABRIC                    64
#define MAX_NUM_VPORT_LOOP                      (MAX_MULTI_ID_LOOP - 1)
#define MAX_NUM_VPORT_FABRIC                    (MAX_MULTI_ID_FABRIC - 1)
#define MAX_NUM_VHBA_LOOP                       (MAX_MULTI_ID_LOOP - 1)
#define MAX_NUM_VHBA_FABRIC                     (MAX_MULTI_ID_FABRIC - 1)

/*
 * Linux Host Adapter structure
 */
typedef struct scsi_qla_host {
	struct list_head list;

	/* Commonly used flags and state information. */
	struct Scsi_Host *host;
	struct pci_dev	*pdev;

	unsigned long	host_no;
	unsigned long	instance;

	volatile struct {
		uint32_t	init_done		:1;
		uint32_t	online			:1;
		uint32_t	mbox_int		:1;
		uint32_t	mbox_busy		:1;
		uint32_t	rscn_queue_overflow	:1;
		uint32_t	reset_active		:1;

		uint32_t	management_server_logged_in :1;
                uint32_t	process_response_queue	:1;

		uint32_t	disable_risc_code_load	:1;
		uint32_t	enable_64bit_addressing	:1;
		uint32_t	enable_lip_reset	:1;
		uint32_t	enable_lip_full_login	:1;
		uint32_t	enable_target_reset	:1;
		uint32_t	enable_led_scheme	:1;
		uint32_t	inta_enabled		:1;
		uint32_t	msi_enabled		:1;
		uint32_t	msix_enabled		:1;
		uint32_t	disable_serdes		:1;
		uint32_t	gpsc_supported		:1;
		uint32_t        vsan_enabled            :1;
		uint32_t	npiv_supported		:1;
	} flags;

	atomic_t	loop_state;
#define LOOP_TIMEOUT	1
#define LOOP_DOWN	2
#define LOOP_UP		3
#define LOOP_UPDATE	4
#define LOOP_READY	5
#define LOOP_DEAD	6

	unsigned long   dpc_flags;
#define	RESET_MARKER_NEEDED	0	/* Send marker to ISP. */
#define	RESET_ACTIVE		1
#define	ISP_ABORT_NEEDED	2	/* Initiate ISP abort. */
#define	ABORT_ISP_ACTIVE	3	/* ISP abort in progress. */
#define	LOOP_RESYNC_NEEDED	4	/* Device Resync needed. */
#define	LOOP_RESYNC_ACTIVE	5
#define LOCAL_LOOP_UPDATE       6	/* Perform a local loop update. */
#define RSCN_UPDATE             7	/* Perform an RSCN update. */
#define MAILBOX_RETRY           8
#define ISP_RESET_NEEDED        9	/* Initiate a ISP reset. */
#define FAILOVER_EVENT_NEEDED   10
#define FAILOVER_EVENT		11
#define FAILOVER_NEEDED   	12
#define SCSI_RESTART_NEEDED	13	/* Processes SCSI retry queue. */
#define PORT_RESTART_NEEDED	14	/* Processes Retry queue. */
#define RESTART_QUEUES_NEEDED	15	/* Restarts the Lun queue. */
#define ABORT_QUEUES_NEEDED	16
#define RELOGIN_NEEDED	        17
#define LOGIN_RETRY_NEEDED	18	/* Initiate required fabric logins. */
#define REGISTER_FC4_NEEDED	19	/* SNS FC4 registration required. */
#define ISP_ABORT_RETRY         20      /* ISP aborted. */
#define FCPORT_RESCAN_NEEDED	21      /* IO descriptor processing needed */
#define IODESC_PROCESS_NEEDED	22      /* IO descriptor processing needed */
#define IOCTL_ERROR_RECOVERY	23
#define LOOP_RESET_NEEDED	24
#define BEACON_BLINK_NEEDED	25
#define REGISTER_FDMI_NEEDED	26
#define FCPORT_UPDATE_NEEDED	27
#define VP_DPC_NEEDED		28	/* wake up for VP dpc handling */

	uint32_t	device_flags;
#define DFLG_LOCAL_DEVICES		BIT_0
#define DFLG_RETRY_LOCAL_DEVICES	BIT_1
#define DFLG_FABRIC_DEVICES		BIT_2
#define	SWITCH_FOUND			BIT_3
#define	DFLG_NO_CABLE			BIT_4

#define PCI_DEVICE_ID_QLOGIC_ISP2532	0x2532
	uint32_t	device_type;
#define DT_ISP2100			BIT_0
#define DT_ISP2200			BIT_1
#define DT_ISP2300			BIT_2
#define DT_ISP2312			BIT_3
#define DT_ISP2322			BIT_4
#define DT_ISP6312			BIT_5
#define DT_ISP6322			BIT_6
#define DT_ISP2422			BIT_7
#define DT_ISP2432			BIT_8
#define DT_ISP5422			BIT_9
#define DT_ISP5432			BIT_10
#define DT_ISP2532			BIT_11
#define DT_ISP_LAST			(DT_ISP2532 << 1)

#define DT_IIDMA			BIT_26
#define DT_FWI2				BIT_27
#define DT_ZIO_SUPPORTED		BIT_28
#define DT_OEM_001			BIT_29
#define DT_ISP2200A			BIT_30
#define DT_EXTENDED_IDS			BIT_31

#define DT_MASK(ha)	((ha)->device_type & (DT_ISP_LAST - 1))
#define IS_QLA2100(ha)	(DT_MASK(ha) & DT_ISP2100)
#define IS_QLA2200(ha)	(DT_MASK(ha) & DT_ISP2200)
#define IS_QLA2300(ha)	(DT_MASK(ha) & DT_ISP2300)
#define IS_QLA2312(ha)	(DT_MASK(ha) & DT_ISP2312)
#define IS_QLA2322(ha)	(DT_MASK(ha) & DT_ISP2322)
#define IS_QLA6312(ha)	(DT_MASK(ha) & DT_ISP6312)
#define IS_QLA6322(ha)	(DT_MASK(ha) & DT_ISP6322)
#define IS_QLA2422(ha)	(DT_MASK(ha) & DT_ISP2422)
#define IS_QLA2432(ha)	(DT_MASK(ha) & DT_ISP2432)
#define IS_QLA5422(ha)	(DT_MASK(ha) & DT_ISP5422)
#define IS_QLA5432(ha)	(DT_MASK(ha) & DT_ISP5432)
#define IS_QLA2532(ha)	(DT_MASK(ha) & DT_ISP2532)

#define IS_QLA23XX(ha)	(IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \
    			 IS_QLA6312(ha) || IS_QLA6322(ha))
#define IS_QLA24XX(ha)	(IS_QLA2422(ha) || IS_QLA2432(ha))
#define IS_QLA54XX(ha)	(IS_QLA5422(ha) || IS_QLA5432(ha))
#define IS_QLA25XX(ha)	(IS_QLA2532(ha))

#define IS_IIDMA_CAPABLE(ha)	((ha)->device_type & DT_IIDMA)
#define IS_FWI2_CAPABLE(ha)	((ha)->device_type & DT_FWI2)
#define IS_ZIO_SUPPORTED(ha)	((ha)->device_type & DT_ZIO_SUPPORTED)
#define IS_OEM_001(ha)		((ha)->device_type & DT_OEM_001)
#define HAS_EXTENDED_IDS(ha)	((ha)->device_type & DT_EXTENDED_IDS)

	/* SRB cache. */
#define SRB_MIN_REQ	128
	mempool_t	*srb_mempool;

	/* This spinlock is used to protect "io transactions", you must
	 * acquire it before doing any IO to the card, eg with RD_REG*() and
	 * WRT_REG*() for the duration of your entire commandtransaction.
	 *
	 * This spinlock is of lower priority than the io request lock.
	 */

	spinlock_t		hardware_lock ____cacheline_aligned;

	int		bars;
	device_reg_t __iomem *iobase;		/* Base I/O address */
	unsigned long	pio_address;
	unsigned long	pio_length;
#define MIN_IOBASE_LEN		0x100

	/* ISP ring lock, rings, and indexes */
	dma_addr_t	request_dma;        /* Physical address. */
	request_t       *request_ring;      /* Base virtual address */
	request_t       *request_ring_ptr;  /* Current address. */
	uint16_t        req_ring_index;     /* Current inde