rx.c

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/* *	Adaptec AAC series RAID controller driver *	(c) Copyright 2001 Red Hat Inc.	<alan@redhat.com> * * based on the old aacraid driver that is.. * Adaptec aacraid device driver for Linux. * * Copyright (c) 2000-2007 Adaptec, Inc. (aacraid@adaptec.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; see the file COPYING.  If not, write to * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. * * Module Name: *  rx.c * * Abstract: Hardware miniport for Drawbridge specific hardware functions. * */#include <linux/kernel.h>#include <linux/init.h>#include <linux/types.h>#include <linux/pci.h>#include <linux/spinlock.h>#include <linux/slab.h>#include <linux/blkdev.h>#include <linux/delay.h>#include <linux/completion.h>#include <linux/time.h>#include <linux/interrupt.h>#include <asm/semaphore.h>#include <scsi/scsi_host.h>#include "aacraid.h"static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id){	struct aac_dev *dev = dev_id;	unsigned long bellbits;	u8 intstat = rx_readb(dev, MUnit.OISR);	/*	 *	Read mask and invert because drawbridge is reversed.	 *	This allows us to only service interrupts that have	 *	been enabled.	 *	Check to see if this is our interrupt.  If it isn't just return	 */	if (likely(intstat & ~(dev->OIMR))) {		bellbits = rx_readl(dev, OutboundDoorbellReg);		if (unlikely(bellbits & DoorBellPrintfReady)) {			aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5]));			rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);			rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);		}		else if (unlikely(bellbits & DoorBellAdapterNormCmdReady)) {			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);			aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);		}		else if (likely(bellbits & DoorBellAdapterNormRespReady)) {			rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);			aac_response_normal(&dev->queues->queue[HostNormRespQueue]);		}		else if (unlikely(bellbits & DoorBellAdapterNormCmdNotFull)) {			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);		}		else if (unlikely(bellbits & DoorBellAdapterNormRespNotFull)) {			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);			rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);		}		return IRQ_HANDLED;	}	return IRQ_NONE;}static irqreturn_t aac_rx_intr_message(int irq, void *dev_id){	struct aac_dev *dev = dev_id;	u32 Index = rx_readl(dev, MUnit.OutboundQueue);	if (unlikely(Index == 0xFFFFFFFFL))		Index = rx_readl(dev, MUnit.OutboundQueue);	if (likely(Index != 0xFFFFFFFFL)) {		do {			if (unlikely(aac_intr_normal(dev, Index))) {				rx_writel(dev, MUnit.OutboundQueue, Index);				rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady);			}			Index = rx_readl(dev, MUnit.OutboundQueue);		} while (Index != 0xFFFFFFFFL);		return IRQ_HANDLED;	}	return IRQ_NONE;}/** *	aac_rx_disable_interrupt	-	Disable interrupts *	@dev: Adapter */static void aac_rx_disable_interrupt(struct aac_dev *dev){	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);}/** *	aac_rx_enable_interrupt_producer	-	Enable interrupts *	@dev: Adapter */static void aac_rx_enable_interrupt_producer(struct aac_dev *dev){	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);}/** *	aac_rx_enable_interrupt_message	-	Enable interrupts *	@dev: Adapter */static void aac_rx_enable_interrupt_message(struct aac_dev *dev){	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);}/** *	rx_sync_cmd	-	send a command and wait *	@dev: Adapter *	@command: Command to execute *	@p1: first parameter *	@ret: adapter status * *	This routine will send a synchronous command to the adapter and wait  *	for its	completion. */static int rx_sync_cmd(struct aac_dev *dev, u32 command,	u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,	u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4){	unsigned long start;	int ok;	/*	 *	Write the command into Mailbox 0	 */	writel(command, &dev->IndexRegs->Mailbox[0]);	/*	 *	Write the parameters into Mailboxes 1 - 6	 */	writel(p1, &dev->IndexRegs->Mailbox[1]);	writel(p2, &dev->IndexRegs->Mailbox[2]);	writel(p3, &dev->IndexRegs->Mailbox[3]);	writel(p4, &dev->IndexRegs->Mailbox[4]);	/*	 *	Clear the synch command doorbell to start on a clean slate.	 */	rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);	/*	 *	Disable doorbell interrupts	 */	rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);	/*	 *	Force the completion of the mask register write before issuing	 *	the interrupt.	 */	rx_readb (dev, MUnit.OIMR);	/*	 *	Signal that there is a new synch command	 */	rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);	ok = 0;	start = jiffies;	/*	 *	Wait up to 30 seconds	 */	while (time_before(jiffies, start+30*HZ)) 	{		udelay(5);	/* Delay 5 microseconds to let Mon960 get info. */		/*		 *	Mon960 will set doorbell0 bit when it has completed the command.		 */		if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {			/*			 *	Clear the doorbell.			 */			rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);			ok = 1;			break;		}		/*		 *	Yield the processor in case we are slow 		 */		msleep(1);	}	if (unlikely(ok != 1)) {		/*		 *	Restore interrupt mask even though we timed out		 */		aac_adapter_enable_int(dev);		return -ETIMEDOUT;	}	/*	 *	Pull the synch status from Mailbox 0.	 */	if (status)		*status = readl(&dev->IndexRegs->Mailbox[0]);	if (r1)		*r1 = readl(&dev->IndexRegs->Mailbox[1]);	if (r2)		*r2 = readl(&dev->IndexRegs->Mailbox[2]);	if (r3)		*r3 = readl(&dev->IndexRegs->Mailbox[3]);	if (r4)		*r4 = readl(&dev->IndexRegs->Mailbox[4]);	/*	 *	Clear the synch command doorbell.	 */	rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);	/*	 *	Restore interrupt mask	 */	aac_adapter_enable_int(dev);	return 0;}/** *	aac_rx_interrupt_adapter	-	interrupt adapter *	@dev: Adapter * *	Send an interrupt to the i960 and breakpoint it. */static void aac_rx_interrupt_adapter(struct aac_dev *dev){	rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);}/** *	aac_rx_notify_adapter		-	send an event to the adapter *	@dev: Adapter *	@event: Event to send * *	Notify the i960 that something it probably cares about has *	happened. */static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event){	switch (event) {	case AdapNormCmdQue:		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);		break;	case HostNormRespNotFull:		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);		break;	case AdapNormRespQue:		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);		break;	case HostNormCmdNotFull:		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);		break;	case HostShutdown:		break;	case FastIo:		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);		break;	case AdapPrintfDone:		rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);		break;	default:		BUG();		break;	}}/** *	aac_rx_start_adapter		-	activate adapter *	@dev:	Adapter * *	Start up processing on an i960 based AAC adapter */static void aac_rx_start_adapter(struct aac_dev *dev){	struct aac_init *init;	init = dev->init;	init->HostElapsedSeconds = cpu_to_le32(get_seconds());	// We can only use a 32 bit address here	rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,	  0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);}/** *	aac_rx_check_health *	@dev: device to check if healthy * *	Will attempt to determine if the specified adapter is alive and *	capable of handling requests, returning 0 if alive. */static int aac_rx_check_health(struct aac_dev *dev){	u32 status = rx_readl(dev, MUnit.OMRx[0]);	/*	 *	Check to see if the board failed any self tests.	 */	if (unlikely(status & SELF_TEST_FAILED))		return -1;	/*	 *	Check to see if the board panic'd.	 */	if (unlikely(status & KERNEL_PANIC)) {		char * buffer;

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