aic94xx_reg_def.h

linux 内核源代码

#define LmLASTADDR(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, LASTADDR)

#define LmNXTLADDR(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, NXTLADDR)

#define LmDBGPORTPTR(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, DBGPORTPTR)

#define LmDBGPORT(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, DBGPORT)

#define LmSCRATCHPAGE(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, SCRATCHPAGE)

#define LmMnSCRATCHPAGE(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 	\
						      MnSCRATCHPAGE)

#define LmTIMERCALC(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x28)

#define LmREQMBX(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x30)

#define LmRSPMBX(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x34)

#define LmMnINT(LinkNum, Mode)		LmSEQ_PHY_REG(Mode, LinkNum, 0x38)

#define		CTXMEMSIZE		0x80000000	/* ro */
#define		LmACKREQ		0x08000000
#define		LmNAKREQ		0x04000000
#define		LmMnXMTERR		0x02000000
#define		LmM5OOBSVC		0x01000000
#define		LmHWTINT		0x00800000
#define		LmMnCTXDONE		0x00100000
#define		LmM2REQMBXF		0x00080000
#define		LmM2RSPMBXE		0x00040000
#define		LmMnDMAERR		0x00020000
#define		LmRCVPRIM		0x00010000
#define		LmRCVERR		0x00008000
#define		LmADDRRCV		0x00004000
#define		LmMnHDRMISS		0x00002000
#define		LmMnWAITSCB		0x00001000
#define		LmMnRLSSCB		0x00000800
#define		LmMnSAVECTX		0x00000400
#define		LmMnFETCHSG		0x00000200
#define		LmMnLOADCTX		0x00000100
#define		LmMnCFGICL		0x00000080
#define		LmMnCFGSATA		0x00000040
#define		LmMnCFGEXPSATA		0x00000020
#define		LmMnCFGCMPLT		0x00000010
#define		LmMnCFGRBUF		0x00000008
#define		LmMnSAVETTR		0x00000004
#define		LmMnCFGRDAT		0x00000002
#define		LmMnCFGHDR		0x00000001

#define LmMnINTEN(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x3C)

#define		EN_LmACKREQ		0x08000000
#define		EN_LmNAKREQ		0x04000000
#define		EN_LmMnXMTERR		0x02000000
#define		EN_LmM5OOBSVC		0x01000000
#define		EN_LmHWTINT		0x00800000
#define		EN_LmMnCTXDONE		0x00100000
#define		EN_LmM2REQMBXF		0x00080000
#define		EN_LmM2RSPMBXE		0x00040000
#define		EN_LmMnDMAERR		0x00020000
#define		EN_LmRCVPRIM		0x00010000
#define		EN_LmRCVERR		0x00008000
#define		EN_LmADDRRCV		0x00004000
#define		EN_LmMnHDRMISS		0x00002000
#define		EN_LmMnWAITSCB		0x00001000
#define		EN_LmMnRLSSCB		0x00000800
#define		EN_LmMnSAVECTX		0x00000400
#define		EN_LmMnFETCHSG		0x00000200
#define		EN_LmMnLOADCTX		0x00000100
#define		EN_LmMnCFGICL		0x00000080
#define		EN_LmMnCFGSATA		0x00000040
#define		EN_LmMnCFGEXPSATA	0x00000020
#define		EN_LmMnCFGCMPLT		0x00000010
#define		EN_LmMnCFGRBUF		0x00000008
#define		EN_LmMnSAVETTR		0x00000004
#define		EN_LmMnCFGRDAT		0x00000002
#define		EN_LmMnCFGHDR		0x00000001

#define		LmM0INTEN_MASK		(EN_LmMnCFGCMPLT | EN_LmMnCFGRBUF | \
					 EN_LmMnSAVETTR | EN_LmMnCFGRDAT | \
					 EN_LmMnCFGHDR | EN_LmRCVERR | \
					 EN_LmADDRRCV | EN_LmMnHDRMISS | \
					 EN_LmMnRLSSCB | EN_LmMnSAVECTX | \
					 EN_LmMnFETCHSG | EN_LmMnLOADCTX | \
					 EN_LmHWTINT | EN_LmMnCTXDONE | \
					 EN_LmRCVPRIM | EN_LmMnCFGSATA | \
					 EN_LmMnCFGEXPSATA | EN_LmMnDMAERR)

#define		LmM1INTEN_MASK		(EN_LmMnCFGCMPLT | EN_LmADDRRCV | \
					 EN_LmMnRLSSCB | EN_LmMnSAVECTX | \
					 EN_LmMnFETCHSG | EN_LmMnLOADCTX | \
					 EN_LmMnXMTERR | EN_LmHWTINT | \
					 EN_LmMnCTXDONE | EN_LmRCVPRIM | \
					 EN_LmRCVERR | EN_LmMnDMAERR)

#define		LmM2INTEN_MASK		(EN_LmADDRRCV | EN_LmHWTINT | \
					 EN_LmM2REQMBXF | EN_LmRCVPRIM | \
					 EN_LmRCVERR)

#define		LmM5INTEN_MASK		(EN_LmADDRRCV | EN_LmM5OOBSVC | \
					 EN_LmHWTINT | EN_LmRCVPRIM | \
					 EN_LmRCVERR)

#define LmXMTPRIMD(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x40)

#define LmXMTPRIMCS(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x44)

#define LmCONSTAT(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x45)

#define LmMnDMAERRS(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x46)

#define LmMnSGDMAERRS(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x47)

#define LmM0EXPHDRP(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x48)

#define LmM1SASALIGN(LinkNum)		LmSEQ_PHY_REG(1, LinkNum, 0x48)
#define SAS_ALIGN_DEFAULT		0xFF

#define LmM0MSKHDRP(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x49)

#define LmM1STPALIGN(LinkNum)		LmSEQ_PHY_REG(1, LinkNum, 0x49)
#define STP_ALIGN_DEFAULT		0x1F

#define LmM0RCVHDRP(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x4A)

#define LmM1XMTHDRP(LinkNum)		LmSEQ_PHY_REG(1, LinkNum, 0x4A)

#define LmM0ICLADR(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x4B)

#define LmM1ALIGNMODE(LinkNum)		LmSEQ_PHY_REG(1, LinkNum, 0x4B)

#define		LmDISALIGN		0x20
#define		LmROTSTPALIGN		0x10
#define		LmSTPALIGN		0x08
#define		LmROTNOTIFY		0x04
#define		LmDUALALIGN		0x02
#define		LmROTALIGN		0x01

#define LmM0EXPRCVNT(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x4C)

#define LmM1XMTCNT(LinkNum)		LmSEQ_PHY_REG(1, LinkNum, 0x4C)

#define LmMnBUFSTAT(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x4E)

#define		LmMnBUFPERR		0x01

/* mode 0-1 */
#define LmMnXFRLVL(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x59)

#define		LmMnXFRLVL_128		0x05
#define		LmMnXFRLVL_256		0x04
#define		LmMnXFRLVL_512		0x03
#define		LmMnXFRLVL_1024		0x02
#define		LmMnXFRLVL_1536		0x01
#define		LmMnXFRLVL_2048		0x00

 /* mode 0-1 */
#define LmMnSGDMACTL(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x5A)

#define 	LmMnRESETSG		0x04
#define 	LmMnSTOPSG		0x02
#define 	LmMnSTARTSG		0x01

/* mode 0-1 */
#define LmMnSGDMASTAT(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x5B)

/* mode 0-1 */
#define LmMnDDMACTL(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x5C)

#define 	LmMnFLUSH		0x40		/* wo */
#define 	LmMnRLSRTRY		0x20		/* wo */
#define 	LmMnDISCARD		0x10		/* wo */
#define 	LmMnRESETDAT		0x08		/* wo */
#define 	LmMnSUSDAT		0x04		/* wo */
#define 	LmMnSTOPDAT		0x02		/* wo */
#define 	LmMnSTARTDAT		0x01		/* wo */

/* mode 0-1 */
#define LmMnDDMASTAT(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x5D)

#define		LmMnDPEMPTY		0x80
#define		LmMnFLUSHING		0x40
#define		LmMnDDMAREQ		0x20
#define		LmMnHDMAREQ		0x10
#define		LmMnDATFREE		0x08
#define		LmMnDATSUS		0x04
#define		LmMnDATACT		0x02
#define		LmMnDATEN		0x01

/* mode 0-1 */
#define LmMnDDMAMODE(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x5E)

#define 	LmMnDMATYPE_NORMAL		0x0000
#define 	LmMnDMATYPE_HOST_ONLY_TX	0x0001
#define 	LmMnDMATYPE_DEVICE_ONLY_TX	0x0002
#define 	LmMnDMATYPE_INVALID		0x0003
#define 	LmMnDMATYPE_MASK	0x0003

#define 	LmMnDMAWRAP		0x0004
#define 	LmMnBITBUCKET		0x0008
#define 	LmMnDISHDR		0x0010
#define 	LmMnSTPCRC		0x0020
#define 	LmXTEST			0x0040
#define 	LmMnDISCRC		0x0080
#define 	LmMnENINTLK		0x0100
#define 	LmMnADDRFRM		0x0400
#define 	LmMnENXMTCRC		0x0800

/* mode 0-1 */
#define LmMnXFRCNT(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x70)

/* mode 0-1 */
#define LmMnDPSEL(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x7B)
#define 	LmMnDPSEL_MASK		0x07
#define 	LmMnEOLPRE		0x40
#define 	LmMnEOSPRE		0x80

/* Registers used in conjunction with LmMnDPSEL and LmMnDPACC registers */
/* Receive Mode n = 0 */
#define LmMnHRADDR			0x00
#define LmMnHBYTECNT			0x01
#define LmMnHREWIND			0x02
#define LmMnDWADDR			0x03
#define LmMnDSPACECNT			0x04
#define LmMnDFRMSIZE			0x05

/* Registers used in conjunction with LmMnDPSEL and LmMnDPACC registers */
/* Transmit Mode n = 1 */
#define LmMnHWADDR			0x00
#define LmMnHSPACECNT			0x01
/* #define LmMnHREWIND			0x02 */
#define LmMnDRADDR			0x03
#define LmMnDBYTECNT			0x04
/* #define LmMnDFRMSIZE			0x05 */

/* mode 0-1 */
#define LmMnDPACC(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x78)
#define 	LmMnDPACC_MASK		0x00FFFFFF

/* mode 0-1 */
#define LmMnHOLDLVL(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x7D)

#define LmPRMSTAT0(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x80)
#define LmPRMSTAT0BYTE0			0x80
#define LmPRMSTAT0BYTE1			0x81
#define LmPRMSTAT0BYTE2			0x82
#define LmPRMSTAT0BYTE3			0x83

#define		LmFRAMERCVD		0x80000000
#define		LmXFRRDYRCVD		0x40000000
#define		LmUNKNOWNP		0x20000000
#define		LmBREAK			0x10000000
#define		LmDONE			0x08000000
#define		LmOPENACPT		0x04000000
#define		LmOPENRJCT		0x02000000
#define		LmOPENRTRY		0x01000000
#define		LmCLOSERV1		0x00800000
#define		LmCLOSERV0		0x00400000
#define		LmCLOSENORM		0x00200000
#define		LmCLOSECLAF		0x00100000
#define		LmNOTIFYRV2		0x00080000
#define		LmNOTIFYRV1		0x00040000
#define		LmNOTIFYRV0		0x00020000
#define		LmNOTIFYSPIN		0x00010000
#define		LmBROADRV4		0x00008000
#define		LmBROADRV3		0x00004000
#define		LmBROADRV2		0x00002000
#define		LmBROADRV1		0x00001000
#define		LmBROADSES		0x00000800
#define		LmBROADRVCH1		0x00000400
#define		LmBROADRVCH0		0x00000200
#define		LmBROADCH		0x00000100
#define		LmAIPRVWP		0x00000080
#define		LmAIPWP			0x00000040
#define		LmAIPWD			0x00000020
#define		LmAIPWC			0x00000010
#define		LmAIPRV2		0x00000008
#define		LmAIPRV1		0x00000004
#define		LmAIPRV0		0x00000002
#define		LmAIPNRML		0x00000001

#define		LmBROADCAST_MASK	(LmBROADCH | LmBROADRVCH0 | \
					 LmBROADRVCH1)

#define LmPRMSTAT1(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0x84)
#define LmPRMSTAT1BYTE0			0x84
#define LmPRMSTAT1BYTE1			0x85
#define LmPRMSTAT1BYTE2			0x86
#define LmPRMSTAT1BYTE3			0x87

#define		LmFRMRCVDSTAT		0x80000000
#define		LmBREAK_DET		0x04000000
#define		LmCLOSE_DET		0x02000000
#define		LmDONE_DET		0x01000000
#define		LmXRDY			0x00040000
#define 	LmSYNCSRST		0x00020000
#define 	LmSYNC			0x00010000
#define 	LmXHOLD			0x00008000
#define 	LmRRDY			0x00004000
#define 	LmHOLD			0x00002000
#define 	LmROK			0x00001000
#define 	LmRIP			0x00000800
#define 	LmCRBLK			0x00000400
#define 	LmACK			0x00000200
#define 	LmNAK			0x00000100
#define 	LmHARDRST		0x00000080
#define 	LmERROR			0x00000040
#define 	LmRERR			0x00000020
#define 	LmPMREQP		0x00000010
#define 	LmPMREQS		0x00000008
#define 	LmPMACK			0x00000004
#define 	LmPMNAK			0x00000002
#define 	LmDMAT			0x00000001

/* mode 1 */
#define	LmMnSATAFS(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x7E)
#define	LmMnXMTSIZE(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0x93)

/* mode 0 */
#define LmMnFRMERR(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0xB0)

#define		LmACRCERR		0x00000800
#define		LmPHYOVRN		0x00000400
#define		LmOBOVRN		0x00000200
#define 	LmMnZERODATA		0x00000100
#define		LmSATAINTLK		0x00000080
#define		LmMnCRCERR		0x00000020
#define		LmRRDYOVRN		0x00000010
#define		LmMISSSOAF		0x00000008
#define		LmMISSSOF		0x00000004
#define		LmMISSEOAF		0x00000002
#define		LmMISSEOF		0x00000001

#define LmFRMERREN(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0xB4)

#define 	EN_LmACRCERR		0x00000800
#define 	EN_LmPHYOVRN		0x00000400
#define 	EN_LmOBOVRN		0x00000200
#define 	EN_LmMnZERODATA		0x00000100
#define 	EN_LmSATAINTLK		0x00000080
#define 	EN_LmFRMBAD		0x00000040
#define 	EN_LmMnCRCERR		0x00000020
#define 	EN_LmRRDYOVRN		0x00000010
#define 	EN_LmMISSSOAF		0x00000008
#define 	EN_LmMISSSOF		0x00000004
#define 	EN_LmMISSEOAF		0x00000002
#define 	EN_LmMISSEOF		0x00000001

#define 	LmFRMERREN_MASK  	(EN_LmSATAINTLK | EN_LmMnCRCERR | \
					 EN_LmRRDYOVRN | EN_LmMISSSOF | \
					 EN_LmMISSEOAF | EN_LmMISSEOF | \
					 EN_LmACRCERR | LmPHYOVRN | \
					 EN_LmOBOVRN | EN_LmMnZERODATA)

#define LmHWTSTATEN(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0xC5)

#define		EN_LmDONETO		0x80
#define		EN_LmINVDISP		0x40
#define		EN_LmINVDW		0x20
#define		EN_LmDWSEVENT		0x08
#define		EN_LmCRTTTO		0x04
#define		EN_LmANTTTO		0x02
#define		EN_LmBITLTTO		0x01

#define		LmHWTSTATEN_MASK	(EN_LmINVDISP | EN_LmINVDW | \
					 EN_LmDWSEVENT | EN_LmCRTTTO | \
					 EN_LmANTTTO | EN_LmDONETO | \
					 EN_LmBITLTTO)

#define LmHWTSTAT(LinkNum) 		LmSEQ_PHY_REG(0, LinkNum, 0xC7)

#define		LmDONETO		0x80
#define		LmINVDISP		0x40
#define		LmINVDW			0x20
#define		LmDWSEVENT		0x08
#define		LmCRTTTO		0x04
#define		LmANTTTO		0x02
#define		LmBITLTTO		0x01

#define LmMnDATABUFADR(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0xC8)
#define		LmDATABUFADR_MASK	0x0FFF

#define LmMnDATABUF(LinkNum, Mode)	LmSEQ_PHY_REG(Mode, LinkNum, 0xCA)

#define	LmPRIMSTAT0EN(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0xE0)

#define 	EN_LmUNKNOWNP 		0x20000000
#define 	EN_LmBREAK		0x10000000
#define 	EN_LmDONE		0x08000000
#define 	EN_LmOPENACPT		0x04000000
#define 	EN_LmOPENRJCT		0x02000000
#define 	EN_LmOPENRTRY		0x01000000
#define 	EN_LmCLOSERV1		0x00800000
#define 	EN_LmCLOSERV0		0x00400000
#define 	EN_LmCLOSENORM		0x00200000
#define 	EN_LmCLOSECLAF		0x00100000
#define 	EN_LmNOTIFYRV2		0x00080000
#define 	EN_LmNOTIFYRV1		0x00040000
#define 	EN_LmNOTIFYRV0		0x00020000
#define 	EN_LmNOTIFYSPIN		0x00010000
#define 	EN_LmBROADRV4		0x00008000
#define 	EN_LmBROADRV3		0x00004000
#define 	EN_LmBROADRV2		0x00002000
#define 	EN_LmBROADRV1		0x00001000
#define 	EN_LmBROADRV0		0x00000800
#define 	EN_LmBROADRVCH1		0x00000400
#define 	EN_LmBROADRVCH0		0x00000200
#define 	EN_LmBROADCH		0x00000100
#define 	EN_LmAIPRVWP		0x00000080
#define 	EN_LmAIPWP		0x00000040
#define 	EN_LmAIPWD		0x00000020
#define 	EN_LmAIPWC		0x00000010
#define 	EN_LmAIPRV2		0x00000008
#define 	EN_LmAIPRV1		0x00000004
#define 	EN_LmAIPRV0		0x00000002
#define 	EN_LmAIPNRML		0x00000001

#define		LmPRIMSTAT0EN_MASK	(EN_LmBREAK | \
					 EN_LmDONE | EN_LmOPENACPT | \
					 EN_LmOPENRJCT | EN_LmOPENRTRY | \
					 EN_LmCLOSERV1 | EN_LmCLOSERV0 | \
					 EN_LmCLOSENORM | EN_LmCLOSECLAF | \
					 EN_LmBROADRV4 | EN_LmBROADRV3 | \
					 EN_LmBROADRV2 | EN_LmBROADRV1 | \
					 EN_LmBROADRV0 | EN_LmBROADRVCH1 | \
					 EN_LmBROADRVCH0 | EN_LmBROADCH | \
					 EN_LmAIPRVWP | EN_LmAIPWP | \
					 EN_LmAIPWD | EN_LmAIPWC | \
					 EN_LmAIPRV2 | EN_LmAIPRV1 | \
					 EN_LmAIPRV0 | EN_LmAIPNRML)

#define LmPRIMSTAT1EN(LinkNum)		LmSEQ_PHY_REG(0, LinkNum, 0xE4)

#define		EN_LmXRDY		0x00040000
#define		EN_LmSYNCSRST		0x00020000
#define		EN_LmSYNC		0x00010000
#define 	EN_LmXHOLD		0x00008000
#define 	EN_LmRRDY		0x00004000
#define 	EN_LmHOLD		0x00002000
#define 	EN_LmROK		0x00001000
#define 	EN_LmRIP		0x00000800
#define 	EN_LmCRBLK		0x00000400
#define 	EN_LmACK		0x00000200
#define 	EN_LmNAK		0x00000100
#define 	EN_LmHARDRST		0x00000080
#define 	EN_LmERROR		0x00000040
#define 	EN_LmRERR		0x00000020