📄 mptbase.h
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{ u32 Doorbell; /* 00 System<->IOC Doorbell reg */ u32 WriteSequence; /* 04 Write Sequence register */ u32 Diagnostic; /* 08 Diagnostic register */ u32 TestBase; /* 0C Test Base Address */ u32 DiagRwData; /* 10 Read Write Data (fw download) */ u32 DiagRwAddress; /* 14 Read Write Address (fw download)*/ u32 Reserved1[6]; /* 18-2F reserved for future use */ u32 IntStatus; /* 30 Interrupt Status */ u32 IntMask; /* 34 Interrupt Mask */ u32 Reserved2[2]; /* 38-3F reserved for future use */ u32 RequestFifo; /* 40 Request Post/Free FIFO */ u32 ReplyFifo; /* 44 Reply Post/Free FIFO */ u32 RequestHiPriFifo; /* 48 Hi Priority Request FIFO */ u32 Reserved3; /* 4C-4F reserved for future use */ u32 HostIndex; /* 50 Host Index register */ u32 Reserved4[15]; /* 54-8F */ u32 Fubar; /* 90 For Fubar usage */ u32 Reserved5[1050];/* 94-10F8 */ u32 Reset_1078; /* 10FC Reset 1078 */} SYSIF_REGS;/* * NOTE: Use MPI_{DOORBELL,WRITESEQ,DIAG}_xxx defs in lsi/mpi.h * in conjunction with SYSIF_REGS accesses! *//* * Dynamic Multi-Pathing specific stuff... *//* VirtTarget negoFlags field */#define MPT_TARGET_NO_NEGO_WIDE 0x01#define MPT_TARGET_NO_NEGO_SYNC 0x02#define MPT_TARGET_NO_NEGO_QAS 0x04#define MPT_TAPE_NEGO_IDP 0x08/* * VirtDevice - FC LUN device or SCSI target device */typedef struct _VirtTarget { struct scsi_target *starget; u8 tflags; u8 ioc_id; u8 id; u8 channel; u8 minSyncFactor; /* 0xFF is async */ u8 maxOffset; /* 0 if async */ u8 maxWidth; /* 0 if narrow, 1 if wide */ u8 negoFlags; /* bit field, see above */ u8 raidVolume; /* set, if RAID Volume */ u8 type; /* byte 0 of Inquiry data */ u8 deleted; /* target in process of being removed */ u32 num_luns;} VirtTarget;typedef struct _VirtDevice { VirtTarget *vtarget; u8 configured_lun; int lun;} VirtDevice;/* * Fibre Channel (SCSI) target device and associated defines... */#define MPT_TARGET_DEFAULT_DV_STATUS 0x00#define MPT_TARGET_FLAGS_VALID_NEGO 0x01#define MPT_TARGET_FLAGS_VALID_INQUIRY 0x02#define MPT_TARGET_FLAGS_Q_YES 0x08#define MPT_TARGET_FLAGS_VALID_56 0x10#define MPT_TARGET_FLAGS_SAF_TE_ISSUED 0x20#define MPT_TARGET_FLAGS_RAID_COMPONENT 0x40#define MPT_TARGET_FLAGS_LED_ON 0x80/* * /proc/mpt interface */typedef struct { const char *name; mode_t mode; int pad; read_proc_t *read_proc; write_proc_t *write_proc;} mpt_proc_entry_t;#define MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len) \do { \ len -= offset; \ if (len < request) { \ *eof = 1; \ if (len <= 0) \ return 0; \ } else \ len = request; \ *start = buf + offset; \ return len; \} while (0)/* * IOCTL structure and associated defines */#define MPT_IOCTL_STATUS_DID_IOCRESET 0x01 /* IOC Reset occurred on the current*/#define MPT_IOCTL_STATUS_RF_VALID 0x02 /* The Reply Frame is VALID */#define MPT_IOCTL_STATUS_TIMER_ACTIVE 0x04 /* The timer is running */#define MPT_IOCTL_STATUS_SENSE_VALID 0x08 /* Sense data is valid */#define MPT_IOCTL_STATUS_COMMAND_GOOD 0x10 /* Command Status GOOD */#define MPT_IOCTL_STATUS_TMTIMER_ACTIVE 0x20 /* The TM timer is running */#define MPT_IOCTL_STATUS_TM_FAILED 0x40 /* User TM request failed */#define MPTCTL_RESET_OK 0x01 /* Issue Bus Reset */typedef struct _MPT_IOCTL { struct _MPT_ADAPTER *ioc; u8 ReplyFrame[MPT_DEFAULT_FRAME_SIZE]; /* reply frame data */ u8 sense[MPT_SENSE_BUFFER_ALLOC]; int wait_done; /* wake-up value for this ioc */ u8 rsvd; u8 status; /* current command status */ u8 reset; /* 1 if bus reset allowed */ u8 id; /* target for reset */ struct mutex ioctl_mutex;} MPT_IOCTL;#define MPT_SAS_MGMT_STATUS_RF_VALID 0x02 /* The Reply Frame is VALID */#define MPT_SAS_MGMT_STATUS_COMMAND_GOOD 0x10 /* Command Status GOOD */#define MPT_SAS_MGMT_STATUS_TM_FAILED 0x40 /* User TM request failed */typedef struct _MPT_SAS_MGMT { struct mutex mutex; struct completion done; u8 reply[MPT_DEFAULT_FRAME_SIZE]; /* reply frame data */ u8 status; /* current command status */}MPT_SAS_MGMT;/* * Event Structure and define */#define MPTCTL_EVENT_LOG_SIZE (0x000000032)typedef struct _mpt_ioctl_events { u32 event; /* Specified by define above */ u32 eventContext; /* Index or counter */ u32 data[2]; /* First 8 bytes of Event Data */} MPT_IOCTL_EVENTS;/* * CONFIGPARM status defines */#define MPT_CONFIG_GOOD MPI_IOCSTATUS_SUCCESS#define MPT_CONFIG_ERROR 0x002F/* * Substructure to store SCSI specific configuration page data */ /* dvStatus defines: */#define MPT_SCSICFG_USE_NVRAM 0x01 /* WriteSDP1 using NVRAM */#define MPT_SCSICFG_ALL_IDS 0x02 /* WriteSDP1 to all IDS *//* #define MPT_SCSICFG_BLK_NEGO 0x10 WriteSDP1 with WDTR and SDTR disabled */typedef struct _SpiCfgData { u32 PortFlags; int *nvram; /* table of device NVRAM values */ IOCPage4_t *pIocPg4; /* SEP devices addressing */ dma_addr_t IocPg4_dma; /* Phys Addr of IOCPage4 data */ int IocPg4Sz; /* IOCPage4 size */ u8 minSyncFactor; /* 0xFF if async */ u8 maxSyncOffset; /* 0 if async */ u8 maxBusWidth; /* 0 if narrow, 1 if wide */ u8 busType; /* SE, LVD, HD */ u8 sdp1version; /* SDP1 version */ u8 sdp1length; /* SDP1 length */ u8 sdp0version; /* SDP0 version */ u8 sdp0length; /* SDP0 length */ u8 dvScheduled; /* 1 if scheduled */ u8 noQas; /* Disable QAS for this adapter */ u8 Saf_Te; /* 1 to force all Processors as * SAF-TE if Inquiry data length * is too short to check for SAF-TE */ u8 bus_reset; /* 1 to allow bus reset */ u8 rsvd[1];}SpiCfgData;typedef struct _SasCfgData { u8 ptClear; /* 1 to automatically clear the * persistent table. * 0 to disable * automatic clearing. */}SasCfgData;/* * Inactive volume link list of raid component data * @inactive_list */struct inactive_raid_component_info { struct list_head list; u8 volumeID; /* volume target id */ u8 volumeBus; /* volume channel */ IOC_3_PHYS_DISK d; /* phys disk info */};typedef struct _RaidCfgData { IOCPage2_t *pIocPg2; /* table of Raid Volumes */ IOCPage3_t *pIocPg3; /* table of physical disks */ struct semaphore inactive_list_mutex; struct list_head inactive_list; /* link list for physical disk that belong in inactive volumes */}RaidCfgData;typedef struct _FcCfgData { /* will ultimately hold fc_port_page0 also */ struct { FCPortPage1_t *data; dma_addr_t dma; int pg_sz; } fc_port_page1[2];} FcCfgData;#define MPT_RPORT_INFO_FLAGS_REGISTERED 0x01 /* rport registered */#define MPT_RPORT_INFO_FLAGS_MISSING 0x02 /* missing from DevPage0 scan *//* * data allocated for each fc rport device */struct mptfc_rport_info{ struct list_head list; struct fc_rport *rport; struct scsi_target *starget; FCDevicePage0_t pg0; u8 flags;};/* * Adapter Structure - pci_dev specific. Maximum: MPT_MAX_ADAPTERS */typedef struct _MPT_ADAPTER{ int id; /* Unique adapter id N {0,1,2,...} */ int pci_irq; /* This irq */ char name[MPT_NAME_LENGTH]; /* "iocN" */ char prod_name[MPT_NAME_LENGTH]; /* "LSIFC9x9" */ char board_name[16]; char board_assembly[16]; char board_tracer[16]; u16 nvdata_version_persistent; u16 nvdata_version_default; int debug_level; u8 io_missing_delay; u8 device_missing_delay; SYSIF_REGS __iomem *chip; /* == c8817000 (mmap) */ SYSIF_REGS __iomem *pio_chip; /* Programmed IO (downloadboot) */ u8 bus_type; u32 mem_phys; /* == f4020000 (mmap) */ u32 pio_mem_phys; /* Programmed IO (downloadboot) */ int mem_size; /* mmap memory size */ int number_of_buses; int devices_per_bus; int alloc_total; u32 last_state; int active; u8 *alloc; /* frames alloc ptr */ dma_addr_t alloc_dma; u32 alloc_sz; MPT_FRAME_HDR *reply_frames; /* Reply msg frames - rounded up! */ u32 reply_frames_low_dma; int reply_depth; /* Num Allocated reply frames */ int reply_sz; /* Reply frame size */ int num_chain; /* Number of chain buffers */ /* Pool of buffers for chaining. ReqToChain * and ChainToChain track index of chain buffers. * ChainBuffer (DMA) virt/phys addresses. * FreeChainQ (lock) locking mechanisms. */ int *ReqToChain; int *RequestNB; int *ChainToChain; u8 *ChainBuffer; dma_addr_t ChainBufferDMA; struct list_head FreeChainQ; spinlock_t FreeChainQlock; /* We (host driver) get to manage our own RequestQueue! */ dma_addr_t req_frames_dma; MPT_FRAME_HDR *req_frames; /* Request msg frames - rounded up! */ u32 req_frames_low_dma; int req_depth; /* Number of request frames */ int req_sz; /* Request frame size (bytes) */ spinlock_t FreeQlock; struct list_head FreeQ; /* Pool of SCSI sense buffers for commands coming from * the SCSI mid-layer. We have one 256 byte sense buffer * for each REQ entry. */ u8 *sense_buf_pool; dma_addr_t sense_buf_pool_dma; u32 sense_buf_low_dma; u8 *HostPageBuffer; /* SAS - host page buffer support */ u32 HostPageBuffer_sz; dma_addr_t HostPageBuffer_dma; int mtrr_reg; struct pci_dev *pcidev; /* struct pci_dev pointer */ u8 __iomem *memmap; /* mmap address */ struct Scsi_Host *sh; /* Scsi Host pointer */ SpiCfgData spi_data; /* Scsi config. data */ RaidCfgData raid_data; /* Raid config. data */ SasCfgData sas_data; /* Sas config. data */ FcCfgData fc_data; /* Fc config. data */ MPT_IOCTL *ioctl; /* ioctl data pointer */ struct proc_dir_entry *ioc_dentry; struct _MPT_ADAPTER *alt_ioc; /* ptr to 929 bound adapter port */ spinlock_t diagLock; /* diagnostic reset lock */ int diagPending; u32 biosVersion; /* BIOS version from IO Unit Page 2 */ int eventTypes; /* Event logging parameters */ int eventContext; /* Next event context */ int eventLogSize; /* Max number of cached events */ struct _mpt_ioctl_events *events; /* pointer to event log */ u8 *cached_fw; /* Pointer to FW */ dma_addr_t cached_fw_dma; struct list_head configQ; /* linked list of config. requests */ int hs_reply_idx;#ifndef MFCNT
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