abituguru3.c

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/*    abituguru3.c Copyright (c) 2006 Hans de Goede <j.w.r.degoede@hhs.nl>    This program is free software; you can redistribute it and/or modify    it under the terms of the GNU General Public License as published by    the Free Software Foundation; either version 2 of the License, or    (at your option) any later version.    This program is distributed in the hope that it will be useful,    but WITHOUT ANY WARRANTY; without even the implied warranty of    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the    GNU General Public License for more details.    You should have received a copy of the GNU General Public License    along with this program; if not, write to the Free Software    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.*//*    This driver supports the sensor part of revision 3 of the custom Abit uGuru    chip found on newer Abit uGuru motherboards. Note: because of lack of specs    only reading the sensors and their settings is supported.*/#include <linux/module.h>#include <linux/init.h>#include <linux/slab.h>#include <linux/jiffies.h>#include <linux/mutex.h>#include <linux/err.h>#include <linux/delay.h>#include <linux/platform_device.h>#include <linux/hwmon.h>#include <linux/hwmon-sysfs.h>#include <asm/io.h>/* uGuru3 bank addresses */#define ABIT_UGURU3_SETTINGS_BANK		0x01#define ABIT_UGURU3_SENSORS_BANK		0x08#define ABIT_UGURU3_MISC_BANK			0x09#define ABIT_UGURU3_ALARMS_START		0x1E#define ABIT_UGURU3_SETTINGS_START		0x24#define ABIT_UGURU3_VALUES_START		0x80#define ABIT_UGURU3_BOARD_ID			0x0A/* uGuru3 sensor bank flags */			     /* Alarm if: */#define ABIT_UGURU3_TEMP_HIGH_ALARM_ENABLE	0x01 /*  temp over warn */#define ABIT_UGURU3_VOLT_HIGH_ALARM_ENABLE	0x02 /*  volt over max */#define ABIT_UGURU3_VOLT_LOW_ALARM_ENABLE	0x04 /*  volt under min */#define ABIT_UGURU3_TEMP_HIGH_ALARM_FLAG	0x10 /* temp is over warn */#define ABIT_UGURU3_VOLT_HIGH_ALARM_FLAG	0x20 /* volt is over max */#define ABIT_UGURU3_VOLT_LOW_ALARM_FLAG		0x40 /* volt is under min */#define ABIT_UGURU3_FAN_LOW_ALARM_ENABLE	0x01 /*   fan under min */#define ABIT_UGURU3_BEEP_ENABLE			0x08 /* beep if alarm */#define ABIT_UGURU3_SHUTDOWN_ENABLE		0x80 /* shutdown if alarm *//* sensor types */#define ABIT_UGURU3_IN_SENSOR			0#define ABIT_UGURU3_TEMP_SENSOR			1#define ABIT_UGURU3_FAN_SENSOR			2/* Timeouts / Retries, if these turn out to need a lot of fiddling we could   convert them to params. Determined by trial and error. I assume this is   cpu-speed independent, since the ISA-bus and not the CPU should be the   bottleneck. */#define ABIT_UGURU3_WAIT_TIMEOUT		250/* Normally the 0xAC at the end of synchronize() is reported after the   first read, but sometimes not and we need to poll */#define ABIT_UGURU3_SYNCHRONIZE_TIMEOUT		5/* utility macros */#define ABIT_UGURU3_NAME			"abituguru3"#define ABIT_UGURU3_DEBUG(format, arg...)	\	if (verbose)				\		printk(KERN_DEBUG ABIT_UGURU3_NAME ": "	format , ## arg)/* Macros to help calculate the sysfs_names array length */#define ABIT_UGURU3_MAX_NO_SENSORS 26/* sum of strlen +1 of: in??_input\0, in??_{min,max}\0, in??_{min,max}_alarm\0,   in??_{min,max}_alarm_enable\0, in??_beep\0, in??_shutdown\0, in??_label\0 */#define ABIT_UGURU3_IN_NAMES_LENGTH (11 + 2 * 9 + 2 * 15 + 2 * 22 + 10 + 14 + 11)/* sum of strlen +1 of: temp??_input\0, temp??_max\0, temp??_crit\0,   temp??_alarm\0, temp??_alarm_enable\0, temp??_beep\0, temp??_shutdown\0,   temp??_label\0 */#define ABIT_UGURU3_TEMP_NAMES_LENGTH (13 + 11 + 12 + 13 + 20 + 12 + 16 + 13)/* sum of strlen +1 of: fan??_input\0, fan??_min\0, fan??_alarm\0,   fan??_alarm_enable\0, fan??_beep\0, fan??_shutdown\0, fan??_label\0 */#define ABIT_UGURU3_FAN_NAMES_LENGTH (12 + 10 + 12 + 19 + 11 + 15 + 12)/* Worst case scenario 16 in sensors (longest names_length) and the rest   temp sensors (second longest names_length). */#define ABIT_UGURU3_SYSFS_NAMES_LENGTH (16 * ABIT_UGURU3_IN_NAMES_LENGTH + \	(ABIT_UGURU3_MAX_NO_SENSORS - 16) * ABIT_UGURU3_TEMP_NAMES_LENGTH)/* All the macros below are named identical to the openguru2 program   reverse engineered by Louis Kruger, hence the names might not be 100%   logical. I could come up with better names, but I prefer keeping the names   identical so that this driver can be compared with his work more easily. *//* Two i/o-ports are used by uGuru */#define ABIT_UGURU3_BASE			0x00E0#define ABIT_UGURU3_CMD				0x00#define ABIT_UGURU3_DATA			0x04#define ABIT_UGURU3_REGION_LENGTH		5/* The wait_xxx functions return this on success and the last contents   of the DATA register (0-255) on failure. */#define ABIT_UGURU3_SUCCESS			-1/* uGuru status flags */#define ABIT_UGURU3_STATUS_READY_FOR_READ	0x01#define ABIT_UGURU3_STATUS_BUSY			0x02/* Structures */struct abituguru3_sensor_info {	const char* name;	int port;	int type;	int multiplier;	int divisor;	int offset;};struct abituguru3_motherboard_info {	u16 id;	const char *name;	/* + 1 -> end of sensors indicated by a sensor with name == NULL */	struct abituguru3_sensor_info sensors[ABIT_UGURU3_MAX_NO_SENSORS + 1];};/* For the Abit uGuru, we need to keep some data in memory.   The structure is dynamically allocated, at the same time when a new   abituguru3 device is allocated. */struct abituguru3_data {	struct device *hwmon_dev;	/* hwmon registered device */	struct mutex update_lock;	/* protect access to data and uGuru */	unsigned short addr;		/* uguru base address */	char valid;			/* !=0 if following fields are valid */	unsigned long last_updated;	/* In jiffies */	/* For convenience the sysfs attr and their names are generated	   automatically. We have max 10 entries per sensor (for in sensors) */	struct sensor_device_attribute_2 sysfs_attr[ABIT_UGURU3_MAX_NO_SENSORS		* 10];	/* Buffer to store the dynamically generated sysfs names */	char sysfs_names[ABIT_UGURU3_SYSFS_NAMES_LENGTH];	/* Pointer to the sensors info for the detected motherboard */	const struct abituguru3_sensor_info *sensors;	/* The abituguru3 supports upto 48 sensors, and thus has registers	   sets for 48 sensors, for convienence reasons / simplicity of the	   code we always read and store all registers for all 48 sensors */	/* Alarms for all 48 sensors (1 bit per sensor) */	u8 alarms[48/8];	/* Value of all 48 sensors */	u8 value[48];	/* Settings of all 48 sensors, note in and temp sensors (the first 32	   sensors) have 3 bytes of settings, while fans only have 2 bytes,	   for convenience we use 3 bytes for all sensors */	u8 settings[48][3];};/* Constants */static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {	{ 0x000C, "unknown", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 10, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VTT 1.2V",	 3, 0, 10, 1, 0 },		{ "MCH & PCIE 1.5V",	 4, 0, 10, 1, 0 },		{ "MCH 2.5V",		 5, 0, 20, 1, 0 },		{ "ICH 1.05V",		 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "System ",		25, 1, 1, 1, 0 },		{ "PWM",		26, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS FAN",		34, 2, 60, 1, 0 },		{ "AUX1 Fan",		35, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x000D, "Abit AW8", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 10, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VTT 1.2V",	 3, 0, 10, 1, 0 },		{ "MCH & PCIE 1.5V",	 4, 0, 10, 1, 0 },		{ "MCH 2.5V",		 5, 0, 20, 1, 0 },		{ "ICH 1.05V",		 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "System ",		25, 1, 1, 1, 0 },		{ "PWM1",		26, 1, 1, 1, 0 },		{ "PWM2",		27, 1, 1, 1, 0 },		{ "PWM3",		28, 1, 1, 1, 0 },		{ "PWM4",		29, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ "AUX1 Fan",		35, 2, 60, 1, 0 },		{ "AUX2 Fan",		36, 2, 60, 1, 0 },		{ "AUX3 Fan",		37, 2, 60, 1, 0 },		{ "AUX4 Fan",		38, 2, 60, 1, 0 },		{ "AUX5 Fan",		39, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x000E, "AL-8", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 10, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VTT 1.2V",	 3, 0, 10, 1, 0 },		{ "MCH & PCIE 1.5V",	 4, 0, 10, 1, 0 },		{ "MCH 2.5V",		 5, 0, 20, 1, 0 },		{ "ICH 1.05V",		 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "System ",		25, 1, 1, 1, 0 },		{ "PWM",		26, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x000F, "unknown", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 10, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VTT 1.2V",	 3, 0, 10, 1, 0 },		{ "MCH & PCIE 1.5V",	 4, 0, 10, 1, 0 },		{ "MCH 2.5V",		 5, 0, 20, 1, 0 },		{ "ICH 1.05V",		 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "System ",		25, 1, 1, 1, 0 },		{ "PWM",		26, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x0010, "Abit NI8 SLI GR", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 10, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VTT 1.2V",	 3, 0, 10, 1, 0 },		{ "NB 1.4V",		 4, 0, 10, 1, 0 },		{ "SB 1.5V",		 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "SYS",		25, 1, 1, 1, 0 },		{ "PWM",		26, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ "AUX1 Fan",		35, 2, 60, 1, 0 },		{ "OTES1 Fan",		36, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x0011, "Abit AT8 32X", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 20, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VDDA 2.5V",	 6, 0, 20, 1, 0 },		{ "NB 1.8V",		 4, 0, 10, 1, 0 },		{ "NB 1.8V Dual",	 5, 0, 10, 1, 0 },		{ "HTV 1.2",		 3, 0, 10, 1, 0 },		{ "PCIE 1.2V",		12, 0, 10, 1, 0 },		{ "NB 1.2V",		13, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "NB",			25, 1, 1, 1, 0 },		{ "System",		26, 1, 1, 1, 0 },		{ "PWM",		27, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ "AUX1 Fan",		35, 2, 60, 1, 0 },		{ "AUX2 Fan",		36, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x0012, "Abit AN8 32X", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 20, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "HyperTransport",	 3, 0, 10, 1, 0 },		{ "CPU VDDA 2.5V",	 5, 0, 20, 1, 0 },		{ "NB",			 4, 0, 10, 1, 0 },		{ "SB",			 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "SYS",		25, 1, 1, 1, 0 },		{ "PWM",		26, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ "AUX1 Fan",		36, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x0013, "unknown", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 10, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VTT 1.2V",	 3, 0, 10, 1, 0 },		{ "MCH & PCIE 1.5V",	 4, 0, 10, 1, 0 },		{ "MCH 2.5V",		 5, 0, 20, 1, 0 },		{ "ICH 1.05V",		 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "System ",		25, 1, 1, 1, 0 },		{ "PWM1",		26, 1, 1, 1, 0 },		{ "PWM2",		27, 1, 1, 1, 0 },		{ "PWM3",		28, 1, 1, 1, 0 },		{ "PWM4",		29, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ "AUX1 Fan",		35, 2, 60, 1, 0 },		{ "AUX2 Fan",		36, 2, 60, 1, 0 },		{ "AUX3 Fan",		37, 2, 60, 1, 0 },		{ "AUX4 Fan",		38, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x0014, "Abit AB9 Pro", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 10, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "CPU VTT 1.2V",	 3, 0, 10, 1, 0 },		{ "MCH & PCIE 1.5V",	 4, 0, 10, 1, 0 },		{ "MCH 2.5V",		 5, 0, 20, 1, 0 },		{ "ICH 1.05V",		 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "System ",		25, 1, 1, 1, 0 },		{ "PWM",		26, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x0015, "unknown", {		{ "CPU Core",		 0, 0, 10, 1, 0 },		{ "DDR",		 1, 0, 20, 1, 0 },		{ "DDR VTT",		 2, 0, 10, 1, 0 },		{ "HyperTransport",	 3, 0, 10, 1, 0 },		{ "CPU VDDA 2.5V",	 5, 0, 20, 1, 0 },		{ "NB",			 4, 0, 10, 1, 0 },		{ "SB",			 6, 0, 10, 1, 0 },		{ "ATX +12V (24-Pin)",	 7, 0, 60, 1, 0 },		{ "ATX +12V (4-pin)",	 8, 0, 60, 1, 0 },		{ "ATX +5V",		 9, 0, 30, 1, 0 },		{ "+3.3V",		10, 0, 20, 1, 0 },		{ "5VSB",		11, 0, 30, 1, 0 },		{ "CPU",		24, 1, 1, 1, 0 },		{ "SYS",		25, 1, 1, 1, 0 },		{ "PWM",		26, 1, 1, 1, 0 },		{ "CPU Fan",		32, 2, 60, 1, 0 },		{ "NB Fan",		33, 2, 60, 1, 0 },		{ "SYS Fan",		34, 2, 60, 1, 0 },		{ "AUX1 Fan",		33, 2, 60, 1, 0 },		{ "AUX2 Fan",		35, 2, 60, 1, 0 },		{ "AUX3 Fan",		36, 2, 60, 1, 0 },		{ NULL, 0, 0, 0, 0, 0 } }	},	{ 0x0016, "AW9D-MAX", {

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