📄 setup.c
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/* * iop13xx platform Initialization * Copyright (c) 2005-2006, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., 59 Temple * Place - Suite 330, Boston, MA 02111-1307 USA. * */#include <linux/serial_8250.h>#ifdef CONFIG_MTD_PHYSMAP#include <linux/mtd/physmap.h>#endif#include <asm/mach/map.h>#include <asm/hardware.h>#include <asm/irq.h>#include <asm/io.h>#include <asm/hardware/iop_adma.h>#define IOP13XX_UART_XTAL 33334000#define IOP13XX_SETUP_DEBUG 0#define PRINTK(x...) ((void)(IOP13XX_SETUP_DEBUG && printk(x)))/* Standard IO mapping for all IOP13XX based systems */static struct map_desc iop13xx_std_desc[] __initdata = { { /* mem mapped registers */ .virtual = IOP13XX_PMMR_VIRT_MEM_BASE, .pfn = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE), .length = IOP13XX_PMMR_SIZE, .type = MT_DEVICE, }, { /* PCIE IO space */ .virtual = IOP13XX_PCIE_LOWER_IO_VA, .pfn = __phys_to_pfn(IOP13XX_PCIE_LOWER_IO_PA), .length = IOP13XX_PCIX_IO_WINDOW_SIZE, .type = MT_DEVICE, }, { /* PCIX IO space */ .virtual = IOP13XX_PCIX_LOWER_IO_VA, .pfn = __phys_to_pfn(IOP13XX_PCIX_LOWER_IO_PA), .length = IOP13XX_PCIX_IO_WINDOW_SIZE, .type = MT_DEVICE, },};static struct resource iop13xx_uart0_resources[] = { [0] = { .start = IOP13XX_UART0_PHYS, .end = IOP13XX_UART0_PHYS + 0x3f, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_UART0, .end = IRQ_IOP13XX_UART0, .flags = IORESOURCE_IRQ }};static struct resource iop13xx_uart1_resources[] = { [0] = { .start = IOP13XX_UART1_PHYS, .end = IOP13XX_UART1_PHYS + 0x3f, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_UART1, .end = IRQ_IOP13XX_UART1, .flags = IORESOURCE_IRQ }};static struct plat_serial8250_port iop13xx_uart0_data[] = { { .membase = (char*)(IOP13XX_UART0_VIRT), .mapbase = (IOP13XX_UART0_PHYS), .irq = IRQ_IOP13XX_UART0, .uartclk = IOP13XX_UART_XTAL, .regshift = 2, .iotype = UPIO_MEM, .flags = UPF_SKIP_TEST, }, { },};static struct plat_serial8250_port iop13xx_uart1_data[] = { { .membase = (char*)(IOP13XX_UART1_VIRT), .mapbase = (IOP13XX_UART1_PHYS), .irq = IRQ_IOP13XX_UART1, .uartclk = IOP13XX_UART_XTAL, .regshift = 2, .iotype = UPIO_MEM, .flags = UPF_SKIP_TEST, }, { },};/* The ids are fixed up later in iop13xx_platform_init */static struct platform_device iop13xx_uart0 = { .name = "serial8250", .id = 0, .dev.platform_data = iop13xx_uart0_data, .num_resources = 2, .resource = iop13xx_uart0_resources,};static struct platform_device iop13xx_uart1 = { .name = "serial8250", .id = 0, .dev.platform_data = iop13xx_uart1_data, .num_resources = 2, .resource = iop13xx_uart1_resources};static struct resource iop13xx_i2c_0_resources[] = { [0] = { .start = IOP13XX_I2C0_PHYS, .end = IOP13XX_I2C0_PHYS + 0x18, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_I2C_0, .end = IRQ_IOP13XX_I2C_0, .flags = IORESOURCE_IRQ }};static struct resource iop13xx_i2c_1_resources[] = { [0] = { .start = IOP13XX_I2C1_PHYS, .end = IOP13XX_I2C1_PHYS + 0x18, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_I2C_1, .end = IRQ_IOP13XX_I2C_1, .flags = IORESOURCE_IRQ }};static struct resource iop13xx_i2c_2_resources[] = { [0] = { .start = IOP13XX_I2C2_PHYS, .end = IOP13XX_I2C2_PHYS + 0x18, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_I2C_2, .end = IRQ_IOP13XX_I2C_2, .flags = IORESOURCE_IRQ }};/* I2C controllers. The IOP13XX uses the same block as the IOP3xx, so * we just use the same device name. *//* The ids are fixed up later in iop13xx_platform_init */static struct platform_device iop13xx_i2c_0_controller = { .name = "IOP3xx-I2C", .id = 0, .num_resources = 2, .resource = iop13xx_i2c_0_resources};static struct platform_device iop13xx_i2c_1_controller = { .name = "IOP3xx-I2C", .id = 0, .num_resources = 2, .resource = iop13xx_i2c_1_resources};static struct platform_device iop13xx_i2c_2_controller = { .name = "IOP3xx-I2C", .id = 0, .num_resources = 2, .resource = iop13xx_i2c_2_resources};#ifdef CONFIG_MTD_PHYSMAP/* PBI Flash Device */static struct physmap_flash_data iq8134x_flash_data = { .width = 2,};static struct resource iq8134x_flash_resource = { .start = IQ81340_FLASHBASE, .end = 0, .flags = IORESOURCE_MEM,};static struct platform_device iq8134x_flash = { .name = "physmap-flash", .id = 0, .dev = { .platform_data = &iq8134x_flash_data, }, .num_resources = 1, .resource = &iq8134x_flash_resource,};static unsigned long iq8134x_probe_flash_size(void){ uint8_t __iomem *flash_addr = ioremap(IQ81340_FLASHBASE, PAGE_SIZE); int i; char query[3]; unsigned long size = 0; int width = iq8134x_flash_data.width; if (flash_addr) { /* send CFI 'query' command */ writew(0x98, flash_addr); /* check for CFI compliance */ for (i = 0; i < 3 * width; i += width) query[i / width] = readb(flash_addr + (0x10 * width) + i); /* read the size */ if (memcmp(query, "QRY", 3) == 0) size = 1 << readb(flash_addr + (0x27 * width)); /* send CFI 'read array' command */ writew(0xff, flash_addr); iounmap(flash_addr); } return size;}#endif/* ADMA Channels */static struct resource iop13xx_adma_0_resources[] = { [0] = { .start = IOP13XX_ADMA_PHYS_BASE(0), .end = IOP13XX_ADMA_UPPER_PA(0), .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_ADMA0_EOT, .end = IRQ_IOP13XX_ADMA0_EOT, .flags = IORESOURCE_IRQ }, [2] = { .start = IRQ_IOP13XX_ADMA0_EOC, .end = IRQ_IOP13XX_ADMA0_EOC, .flags = IORESOURCE_IRQ }, [3] = { .start = IRQ_IOP13XX_ADMA0_ERR, .end = IRQ_IOP13XX_ADMA0_ERR, .flags = IORESOURCE_IRQ }};static struct resource iop13xx_adma_1_resources[] = { [0] = { .start = IOP13XX_ADMA_PHYS_BASE(1), .end = IOP13XX_ADMA_UPPER_PA(1), .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_ADMA1_EOT, .end = IRQ_IOP13XX_ADMA1_EOT, .flags = IORESOURCE_IRQ }, [2] = { .start = IRQ_IOP13XX_ADMA1_EOC, .end = IRQ_IOP13XX_ADMA1_EOC, .flags = IORESOURCE_IRQ }, [3] = { .start = IRQ_IOP13XX_ADMA1_ERR, .end = IRQ_IOP13XX_ADMA1_ERR, .flags = IORESOURCE_IRQ }};static struct resource iop13xx_adma_2_resources[] = { [0] = { .start = IOP13XX_ADMA_PHYS_BASE(2), .end = IOP13XX_ADMA_UPPER_PA(2), .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IOP13XX_ADMA2_EOT, .end = IRQ_IOP13XX_ADMA2_EOT, .flags = IORESOURCE_IRQ }, [2] = { .start = IRQ_IOP13XX_ADMA2_EOC, .end = IRQ_IOP13XX_ADMA2_EOC, .flags = IORESOURCE_IRQ }, [3] = { .start = IRQ_IOP13XX_ADMA2_ERR, .end = IRQ_IOP13XX_ADMA2_ERR, .flags = IORESOURCE_IRQ }};
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