📄 entry.s
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stdi gr2,@(gr28,#REG_GR(2)) stdi gr4,@(gr28,#REG_GR(4)) stdi gr6,@(gr28,#REG_GR(6)) stdi gr8,@(gr28,#REG_GR(8)) stdi gr10,@(gr28,#REG_GR(10)) stdi gr12,@(gr28,#REG_GR(12)) stdi gr14,@(gr28,#REG_GR(14)) stdi gr16,@(gr28,#REG_GR(16)) stdi gr18,@(gr28,#REG_GR(18)) stdi gr24,@(gr28,#REG_GR(24)) stdi gr26,@(gr28,#REG_GR(26)) sti gr29,@(gr28,#REG_GR(29)) stdi gr30,@(gr28,#REG_GR(30)) movsg lcr ,gr27 movsg lr ,gr26 movgs gr23,lr movsg cccr,gr25 movsg ccr ,gr24 movsg isr ,gr23 setlos.p #-1,gr4 andi gr22,#PSR_PS,gr5 /* try to rebuild original PSR value */ andi.p gr22,#~(PSR_PS|PSR_S),gr6 slli gr5,#1,gr5 or gr6,gr5,gr5 andi gr5,#~PSR_ET,gr5 sti gr20,@(gr28,#REG_TBR) sti gr21,@(gr28,#REG_PC) sti gr5 ,@(gr28,#REG_PSR) sti gr23,@(gr28,#REG_ISR) stdi gr24,@(gr28,#REG_CCR) stdi gr26,@(gr28,#REG_LR) sti gr4 ,@(gr28,#REG_SYSCALLNO) movsg iacc0h,gr4 movsg iacc0l,gr5 stdi gr4,@(gr28,#REG_IACC0) movsg gner0,gr4 movsg gner1,gr5 stdi.p gr4,@(gr28,#REG_GNER0) # set up virtual interrupt disablement subicc gr0,#1,gr0,icc2 /* clear Z flag, set C flag */ # set up kernel global registers sethi.p %hi(__kernel_current_task),gr5 setlo %lo(__kernel_current_task),gr5 sethi.p %hi(_gp),gr16 setlo %lo(_gp),gr16 ldi @(gr5,#0),gr29 ldi @(gr29,#4),gr15 ; __current_thread_info = current->thread_info # switch to the kernel trap table sethi.p %hi(__entry_kerneltrap_table),gr6 setlo %lo(__entry_kerneltrap_table),gr6 movgs gr6,tbr # make sure we (the kernel) get div-zero and misalignment exceptions setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5 movgs gr5,isr # clear power-saving mode flags movsg hsr0,gr4 andi gr4,#~HSR0_PDM,gr4 movgs gr4,hsr0 # multiplex again using old TBR as a guide setlos.p #TBR_TT,gr3 sethi %hi(__entry_vector_table),gr6 and.p gr20,gr3,gr5 setlo %lo(__entry_vector_table),gr6 srli gr5,#2,gr5 ld @(gr5,gr6),gr5 LEDS 0x6009 jmpl @(gr5,gr0) .size __entry_common,.-__entry_common################################################################################# handle instruction MMU fault#################################################################################ifdef CONFIG_MMU .globl __entry_insn_mmu_fault__entry_insn_mmu_fault: LEDS 0x6010 setlos #0,gr8 movsg esr0,gr9 movsg scr2,gr10 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr sethi.p %hi(do_page_fault),gr5 setlo %lo(do_page_fault),gr5 jmpl @(gr5,gr0) ; call do_page_fault(0,esr0,ear0)#endif################################################################################# handle instruction access error################################################################################ .globl __entry_insn_access_error__entry_insn_access_error: LEDS 0x6011 sethi.p %hi(insn_access_error),gr5 setlo %lo(insn_access_error),gr5 movsg esfr1,gr8 movsg epcr0,gr9 movsg esr0,gr10 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call insn_access_error(esfr1,epcr0,esr0)################################################################################# handle various instructions of dubious legality################################################################################ .globl __entry_unsupported_trap .globl __entry_illegal_instruction .globl __entry_privileged_instruction .globl __entry_debug_exception__entry_unsupported_trap: subi gr21,#4,gr21 sti gr21,@(gr28,#REG_PC)__entry_illegal_instruction:__entry_privileged_instruction:__entry_debug_exception: LEDS 0x6012 sethi.p %hi(illegal_instruction),gr5 setlo %lo(illegal_instruction),gr5 movsg esfr1,gr8 movsg epcr0,gr9 movsg esr0,gr10 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call ill_insn(esfr1,epcr0,esr0)################################################################################# handle media exception################################################################################ .globl __entry_media_exception__entry_media_exception: LEDS 0x6013 sethi.p %hi(media_exception),gr5 setlo %lo(media_exception),gr5 movsg msr0,gr8 movsg msr1,gr9 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call media_excep(msr0,msr1)################################################################################# handle data MMU fault# handle data DAT fault (write-protect exception)#################################################################################ifdef CONFIG_MMU .globl __entry_data_mmu_fault__entry_data_mmu_fault: .globl __entry_data_dat_fault__entry_data_dat_fault: LEDS 0x6014 setlos #1,gr8 movsg esr0,gr9 movsg scr2,gr10 ; saved EAR0 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr sethi.p %hi(do_page_fault),gr5 setlo %lo(do_page_fault),gr5 jmpl @(gr5,gr0) ; call do_page_fault(1,esr0,ear0)#endif################################################################################# handle data and instruction access exceptions################################################################################ .globl __entry_insn_access_exception .globl __entry_data_access_exception__entry_insn_access_exception:__entry_data_access_exception: LEDS 0x6016 sethi.p %hi(memory_access_exception),gr5 setlo %lo(memory_access_exception),gr5 movsg esr0,gr8 movsg scr2,gr9 ; saved EAR0 movsg epcr0,gr10 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call memory_access_error(esr0,ear0,epcr0)################################################################################# handle data access error################################################################################ .globl __entry_data_access_error__entry_data_access_error: LEDS 0x6016 sethi.p %hi(data_access_error),gr5 setlo %lo(data_access_error),gr5 movsg esfr1,gr8 movsg esr15,gr9 movsg ear15,gr10 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call data_access_error(esfr1,esr15,ear15)################################################################################# handle data store error################################################################################ .globl __entry_data_store_error__entry_data_store_error: LEDS 0x6017 sethi.p %hi(data_store_error),gr5 setlo %lo(data_store_error),gr5 movsg esfr1,gr8 movsg esr14,gr9 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call data_store_error(esfr1,esr14)################################################################################# handle division exception################################################################################ .globl __entry_division_exception__entry_division_exception: LEDS 0x6018 sethi.p %hi(division_exception),gr5 setlo %lo(division_exception),gr5 movsg esfr1,gr8 movsg esr0,gr9 movsg isr,gr10 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call div_excep(esfr1,esr0,isr)################################################################################# handle compound exception################################################################################ .globl __entry_compound_exception__entry_compound_exception: LEDS 0x6019 sethi.p %hi(compound_exception),gr5 setlo %lo(compound_exception),gr5 movsg esfr1,gr8 movsg esr0,gr9 movsg esr14,gr10 movsg esr15,gr11 movsg msr0,gr12 movsg msr1,gr13 # now that we've accessed the exception regs, we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr jmpl @(gr5,gr0) ; call comp_excep(esfr1,esr0,esr14,esr15,msr0,msr1)################################################################################# handle interrupts and NMIs################################################################################ .globl __entry_do_IRQ__entry_do_IRQ: LEDS 0x6020 # we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr bra do_IRQ .globl __entry_do_NMI__entry_do_NMI: LEDS 0x6021 # we can enable exceptions movsg psr,gr4 ori gr4,#PSR_ET,gr4 movgs gr4,psr bra do_NMI################################################################################# the return path for a newly forked child process# - __switch_to() saved the old current pointer in GR8 for us################################################################################ .globl ret_from_forkret_from_fork: LEDS 0x6100 call schedule_tail # fork & co. return 0 to child setlos.p #0,gr8 bra __syscall_exit##################################################################################################### Return to user mode is not as complex as all this looks,# but we want the default path for a system call return to# go as quickly as possible which is why some of this is# less clear than it otherwise should be.#################################################################################################### .balign L1_CACHE_BYTES .globl system_callsystem_call: LEDS 0x6101 movsg psr,gr4 ; enable exceptions ori gr4,#PSR_ET,gr4 movgs gr4,psr sti gr7,@(gr28,#REG_SYSCALLNO) sti.p gr8,@(gr28,#REG_ORIG_GR8) subicc gr7,#nr_syscalls,gr0,icc0 bnc icc0,#0,__syscall_badsys ldi @(gr15,#TI_FLAGS),gr4 ori gr4,#_TIF_SYSCALL_TRACE,gr4 andicc gr4,#_TIF_SYSCALL_TRACE,gr0,icc0 bne icc0,#0,__syscall_trace_entry__syscall_call: slli.p gr7,#2,gr7 sethi %hi(sys_call_table),gr5 setlo %lo(sys_call_table),gr5 ld @(gr5,gr7),gr4 calll @(gr4,gr0)################################################################################# return to interrupted process################################################################################__syscall_exit: LEDS 0x6300 sti gr8,@(gr28,#REG_GR(8)) ; save return value # rebuild saved psr - execve will change it for init/main.c ldi @(gr28,#REG_PSR),gr22 srli gr22,#1,gr5 andi.p gr22,#~PSR_PS,gr22 andi gr5,#PSR_PS,gr5 or gr5,gr22,gr22 ori gr22,#PSR_S,gr22 # keep current PSR in GR23 movsg psr,gr23 # make sure we don't miss an interrupt setting need_resched or sigpending between # sampling and the RETT ori gr23,#PSR_PIL_14,gr23 movgs gr23,psr ldi @(gr15,#TI_FLAGS),gr4 sethi.p %hi(_TIF_ALLWORK_MASK),gr5 setlo %lo(_TIF_ALLWORK_MASK),gr5 andcc gr4,gr5,gr0,icc0 bne icc0,#0,__syscall_exit_work # restore all registers and return__entry_return_direct: LEDS 0x6301 andi gr22,#~PSR_ET,gr22 movgs gr22,psr ldi @(gr28,#REG_ISR),gr23 lddi @(gr28,#REG_CCR),gr24 lddi @(gr28,#REG_LR) ,gr26 ldi @(gr28,#REG_PC) ,gr21 ldi @(gr28,#REG_TBR),gr20 movgs gr20,tbr movgs gr21,pcsr movgs gr23,isr movgs gr24,ccr movgs gr25,cccr movgs gr26,lr movgs gr27,lcr lddi @(gr28,#REG_GNER0),gr4 movgs gr4,gner0 movgs gr5,gner1 lddi @(gr28,#REG_IACC0),gr4 movgs gr4,iacc0h movgs gr5,iacc0l lddi @(gr28,#REG_GR(4)) ,gr4 lddi @(gr28,#REG_GR(6)) ,gr6 lddi @(gr28,#REG_GR(8)) ,gr8 lddi @(gr28,#REG_GR(10)),gr10 lddi @(gr28,#REG_GR(12)),gr12 lddi @(gr28,#REG_GR(14)),gr14 lddi @(gr28,#REG_GR(16)),gr16 lddi @(gr28,#REG_GR(18)),gr18 lddi @(gr28,#REG_GR(20)),gr20 lddi @(gr28,#REG_GR(22)),gr22 lddi @(gr28,#REG_GR(24)),gr24 lddi @(gr28,#REG_GR(26)),gr26 ldi @(gr28,#REG_GR(29)),gr29 lddi @(gr28,#REG_GR(30)),gr30 # check to see if a debugging return is required LEDS 0x67f0 movsg ccr,gr2 ldi @(gr28,#REG__STATUS),gr3 andicc gr3,#REG__STATUS_STEP,gr0,icc0 bne icc0,#0,__entry_return_singlestep movgs gr2,ccr ldi @(gr28,#REG_SP) ,sp lddi @(gr28,#REG_GR(2)) ,gr2 ldi @(gr28,#REG_GR(28)),gr28 LEDS 0x67fe// movsg pcsr,gr31// LEDS32#if 0 # store the current frame in the workram on the FR451 movgs gr28,scr2 sethi.p %hi(0xfe800000),gr28 setlo %lo(0xfe800000),gr28 stdi gr2,@(gr28,#REG_GR(2)) stdi gr4,@(gr28,#REG_GR(4)) stdi gr6,@(gr28,#REG_GR(6)) stdi gr8,@(gr28,#REG_GR(8)) stdi gr10,@(gr28,#REG_GR(10)) stdi gr12,@(gr28,#REG_GR(12)) stdi gr14,@(gr28,#REG_GR(14)) stdi gr16,@(gr28,#REG_GR(16)) stdi gr18,@(gr28,#REG_GR(18)) stdi gr24,@(gr28,#REG_GR(24)) stdi gr26,@(gr28,#REG_GR(26)) sti gr29,@(gr28,#REG_GR(29)) stdi gr30,@(gr28,#REG_GR(30)) movsg tbr ,gr30 sti gr30,@(gr28,#REG_TBR) movsg pcsr,gr30 sti gr30,@(gr28,#REG_PC) movsg psr ,gr30 sti gr30,@(gr28,#REG_PSR) movsg isr ,gr30 sti gr30,@(gr28,#REG_ISR) movsg ccr ,gr30 movsg cccr,gr31
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