📄 vmi_32.c
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/* * VMI specific paravirt-ops implementation * * Copyright (C) 2005, VMware, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for more * details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * * Send feedback to zach@vmware.com * */#include <linux/module.h>#include <linux/cpu.h>#include <linux/bootmem.h>#include <linux/mm.h>#include <linux/highmem.h>#include <linux/sched.h>#include <asm/vmi.h>#include <asm/io.h>#include <asm/fixmap.h>#include <asm/apicdef.h>#include <asm/apic.h>#include <asm/processor.h>#include <asm/timer.h>#include <asm/vmi_time.h>#include <asm/kmap_types.h>/* Convenient for calling VMI functions indirectly in the ROM */typedef u32 __attribute__((regparm(1))) (VROMFUNC)(void);typedef u64 __attribute__((regparm(2))) (VROMLONGFUNC)(int);#define call_vrom_func(rom,func) \ (((VROMFUNC *)(rom->func))())#define call_vrom_long_func(rom,func,arg) \ (((VROMLONGFUNC *)(rom->func)) (arg))static struct vrom_header *vmi_rom;static int disable_pge;static int disable_pse;static int disable_sep;static int disable_tsc;static int disable_mtrr;static int disable_noidle;static int disable_vmi_timer;/* Cached VMI operations */static struct { void (*cpuid)(void /* non-c */); void (*_set_ldt)(u32 selector); void (*set_tr)(u32 selector); void (*set_kernel_stack)(u32 selector, u32 esp0); void (*allocate_page)(u32, u32, u32, u32, u32); void (*release_page)(u32, u32); void (*set_pte)(pte_t, pte_t *, unsigned); void (*update_pte)(pte_t *, unsigned); void (*set_linear_mapping)(int, void *, u32, u32); void (*_flush_tlb)(int); void (*set_initial_ap_state)(int, int); void (*halt)(void); void (*set_lazy_mode)(int mode);} vmi_ops;/* Cached VMI operations */struct vmi_timer_ops vmi_timer_ops;/* * VMI patching routines. */#define MNEM_CALL 0xe8#define MNEM_JMP 0xe9#define MNEM_RET 0xc3#define IRQ_PATCH_INT_MASK 0#define IRQ_PATCH_DISABLE 5static inline void patch_offset(void *insnbuf, unsigned long eip, unsigned long dest){ *(unsigned long *)(insnbuf+1) = dest-eip-5;}static unsigned patch_internal(int call, unsigned len, void *insnbuf, unsigned long eip){ u64 reloc; struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc; reloc = call_vrom_long_func(vmi_rom, get_reloc, call); switch(rel->type) { case VMI_RELOCATION_CALL_REL: BUG_ON(len < 5); *(char *)insnbuf = MNEM_CALL; patch_offset(insnbuf, eip, (unsigned long)rel->eip); return 5; case VMI_RELOCATION_JUMP_REL: BUG_ON(len < 5); *(char *)insnbuf = MNEM_JMP; patch_offset(insnbuf, eip, (unsigned long)rel->eip); return 5; case VMI_RELOCATION_NOP: /* obliterate the whole thing */ return 0; case VMI_RELOCATION_NONE: /* leave native code in place */ break; default: BUG(); } return len;}/* * Apply patch if appropriate, return length of new instruction * sequence. The callee does nop padding for us. */static unsigned vmi_patch(u8 type, u16 clobbers, void *insns, unsigned long eip, unsigned len){ switch (type) { case PARAVIRT_PATCH(pv_irq_ops.irq_disable): return patch_internal(VMI_CALL_DisableInterrupts, len, insns, eip); case PARAVIRT_PATCH(pv_irq_ops.irq_enable): return patch_internal(VMI_CALL_EnableInterrupts, len, insns, eip); case PARAVIRT_PATCH(pv_irq_ops.restore_fl): return patch_internal(VMI_CALL_SetInterruptMask, len, insns, eip); case PARAVIRT_PATCH(pv_irq_ops.save_fl): return patch_internal(VMI_CALL_GetInterruptMask, len, insns, eip); case PARAVIRT_PATCH(pv_cpu_ops.iret): return patch_internal(VMI_CALL_IRET, len, insns, eip); case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit): return patch_internal(VMI_CALL_SYSEXIT, len, insns, eip); default: break; } return len;}/* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */static void vmi_cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx){ int override = 0; if (*eax == 1) override = 1; asm volatile ("call *%6" : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) : "0" (*eax), "2" (*ecx), "r" (vmi_ops.cpuid)); if (override) { if (disable_pse) *edx &= ~X86_FEATURE_PSE; if (disable_pge) *edx &= ~X86_FEATURE_PGE; if (disable_sep) *edx &= ~X86_FEATURE_SEP; if (disable_tsc) *edx &= ~X86_FEATURE_TSC; if (disable_mtrr) *edx &= ~X86_FEATURE_MTRR; }}static inline void vmi_maybe_load_tls(struct desc_struct *gdt, int nr, struct desc_struct *new){ if (gdt[nr].a != new->a || gdt[nr].b != new->b) write_gdt_entry(gdt, nr, new->a, new->b);}static void vmi_load_tls(struct thread_struct *t, unsigned int cpu){ struct desc_struct *gdt = get_cpu_gdt_table(cpu); vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0]); vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1]); vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2]);}static void vmi_set_ldt(const void *addr, unsigned entries){ unsigned cpu = smp_processor_id(); u32 low, high; pack_descriptor(&low, &high, (unsigned long)addr, entries * sizeof(struct desc_struct) - 1, DESCTYPE_LDT, 0); write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, low, high); vmi_ops._set_ldt(entries ? GDT_ENTRY_LDT*sizeof(struct desc_struct) : 0);}static void vmi_set_tr(void){ vmi_ops.set_tr(GDT_ENTRY_TSS*sizeof(struct desc_struct));}static void vmi_load_esp0(struct tss_struct *tss, struct thread_struct *thread){ tss->x86_tss.esp0 = thread->esp0; /* This can only happen when SEP is enabled, no need to test "SEP"arately */ if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) { tss->x86_tss.ss1 = thread->sysenter_cs; wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); } vmi_ops.set_kernel_stack(__KERNEL_DS, tss->x86_tss.esp0);}static void vmi_flush_tlb_user(void){ vmi_ops._flush_tlb(VMI_FLUSH_TLB);}static void vmi_flush_tlb_kernel(void){ vmi_ops._flush_tlb(VMI_FLUSH_TLB | VMI_FLUSH_GLOBAL);}/* Stub to do nothing at all; used for delays and unimplemented calls */static void vmi_nop(void){}#ifdef CONFIG_DEBUG_PAGE_TYPE#ifdef CONFIG_X86_PAE#define MAX_BOOT_PTS (2048+4+1)#else#define MAX_BOOT_PTS (1024+1)#endif/* * During boot, mem_map is not yet available in paging_init, so stash * all the boot page allocations here. */static struct { u32 pfn; int type;} boot_page_allocations[MAX_BOOT_PTS];static int num_boot_page_allocations;static int boot_allocations_applied;void vmi_apply_boot_page_allocations(void){ int i; BUG_ON(!mem_map); for (i = 0; i < num_boot_page_allocations; i++) { struct page *page = pfn_to_page(boot_page_allocations[i].pfn); page->type = boot_page_allocations[i].type; page->type = boot_page_allocations[i].type & ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE); } boot_allocations_applied = 1;}static void record_page_type(u32 pfn, int type){ BUG_ON(num_boot_page_allocations >= MAX_BOOT_PTS); boot_page_allocations[num_boot_page_allocations].pfn = pfn; boot_page_allocations[num_boot_page_allocations].type = type; num_boot_page_allocations++;}static void check_zeroed_page(u32 pfn, int type, struct page *page){ u32 *ptr; int i; int limit = PAGE_SIZE / sizeof(int); if (page_address(page)) ptr = (u32 *)page_address(page); else ptr = (u32 *)__va(pfn << PAGE_SHIFT); /* * When cloning the root in non-PAE mode, only the userspace * pdes need to be zeroed. */ if (type & VMI_PAGE_CLONE) limit = USER_PTRS_PER_PGD; for (i = 0; i < limit; i++) BUG_ON(ptr[i]);}/* * We stash the page type into struct page so we can verify the page * types are used properly. */static void vmi_set_page_type(u32 pfn, int type){ /* PAE can have multiple roots per page - don't track */ if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP)) return; if (boot_allocations_applied) { struct page *page = pfn_to_page(pfn); if (type != VMI_PAGE_NORMAL) BUG_ON(page->type); else BUG_ON(page->type == VMI_PAGE_NORMAL); page->type = type & ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE); if (type & VMI_PAGE_ZEROED) check_zeroed_page(pfn, type, page); } else { record_page_type(pfn, type); }}static void vmi_check_page_type(u32 pfn, int type){ /* PAE can have multiple roots per page - skip checks */ if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP)) return; type &= ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE); if (boot_allocations_applied) { struct page *page = pfn_to_page(pfn); BUG_ON((page->type ^ type) & VMI_PAGE_PAE); BUG_ON(type == VMI_PAGE_NORMAL && page->type); BUG_ON((type & page->type) == 0); }}#else#define vmi_set_page_type(p,t) do { } while (0)#define vmi_check_page_type(p,t) do { } while (0)#endif#ifdef CONFIG_HIGHPTEstatic void *vmi_kmap_atomic_pte(struct page *page, enum km_type type){ void *va = kmap_atomic(page, type); /* * Internally, the VMI ROM must map virtual addresses to physical * addresses for processing MMU updates. By the time MMU updates * are issued, this information is typically already lost. * Fortunately, the VMI provides a cache of mapping slots for active * page tables. * * We use slot zero for the linear mapping of physical memory, and * in HIGHPTE kernels, slot 1 and 2 for KM_PTE0 and KM_PTE1. * * args: SLOT VA COUNT PFN */ BUG_ON(type != KM_PTE0 && type != KM_PTE1); vmi_ops.set_linear_mapping((type - KM_PTE0)+1, va, 1, page_to_pfn(page)); return va;}#endifstatic void vmi_allocate_pt(struct mm_struct *mm, u32 pfn){ vmi_set_page_type(pfn, VMI_PAGE_L1); vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0);}static void vmi_allocate_pd(u32 pfn){ /* * This call comes in very early, before mem_map is setup. * It is called only for swapper_pg_dir, which already has * data on it. */ vmi_set_page_type(pfn, VMI_PAGE_L2); vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0);}static void vmi_allocate_pd_clone(u32 pfn, u32 clonepfn, u32 start, u32 count){ vmi_set_page_type(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE); vmi_check_page_type(clonepfn, VMI_PAGE_L2); vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count);}static void vmi_release_pt(u32 pfn){ vmi_ops.release_page(pfn, VMI_PAGE_L1); vmi_set_page_type(pfn, VMI_PAGE_NORMAL);}static void vmi_release_pd(u32 pfn){ vmi_ops.release_page(pfn, VMI_PAGE_L2); vmi_set_page_type(pfn, VMI_PAGE_NORMAL);}/* * Helper macros for MMU update flags. We can defer updates until a flush * or page invalidation only if the update is to the current address space * (otherwise, there is no flush). We must check against init_mm, since * this could be a kernel update, which usually passes init_mm, although * sometimes this check can be skipped if we know the particular function * is only called on user mode PTEs. We could change the kernel to pass * current->active_mm here, but in particular, I was unsure if changing * mm/highmem.c to do this would still be correct on other architectures. */#define is_current_as(mm, mustbeuser) ((mm) == current->active_mm || \ (!mustbeuser && (mm) == &init_mm))#define vmi_flags_addr(mm, addr, level, user) \ ((level) | (is_current_as(mm, user) ? \ (VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0))#define vmi_flags_addr_defer(mm, addr, level, user) \ ((level) | (is_current_as(mm, user) ? \ (VMI_PAGE_DEFER | VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0))static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep){ vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));}static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep){ vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0));}static void vmi_set_pte(pte_t *ptep, pte_t pte){ /* XXX because of set_pmd_pte, this can be called on PT or PD layers */ vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE | VMI_PAGE_PD); vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT);}static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte){ vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));}static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval){#ifdef CONFIG_X86_PAE const pte_t pte = { pmdval.pmd, pmdval.pmd >> 32 }; vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PMD);#else const pte_t pte = { pmdval.pud.pgd.pgd }; vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PGD);#endif vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD);}#ifdef CONFIG_X86_PAEstatic void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval){ /* * XXX This is called from set_pmd_pte, but at both PT * and PD layers so the VMI_PAGE_PT flag is wrong. But * it is only called for large page mapping changes, * the Xen backend, doesn't support large pages, and the * ESX backend doesn't depend on the flag. */ set_64bit((unsigned long long *)ptep,pte_val(pteval)); vmi_ops.update_pte(ptep, VMI_PAGE_PT);}static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte){ vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE); vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1));}static void vmi_set_pud(pud_t *pudp, pud_t pudval){ /* Um, eww */ const pte_t pte = { pudval.pgd.pgd, pudval.pgd.pgd >> 32 }; vmi_check_page_type(__pa(pudp) >> PAGE_SHIFT, VMI_PAGE_PGD); vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP);}static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep){ const pte_t pte = { 0 };
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