📄 tcxmaster.lst
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C51 COMPILER V7.06 TCXMASTER 01/31/2007 10:30:02 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE TCXMASTER
OBJECT MODULE PLACED IN tcxmaster.OBJ
COMPILER INVOKED BY: d:\install\Keil\C51\BIN\C51.EXE tcxmaster.c BROWSE DEBUG OBJECTEXTEND
stmt level source
1 #pragma NOIV // Do not generate interrupt vectors
2 //-----------------------------------------------------------------------------
3 // File: tcxmaster.c
4 // Contents: Hooks required to implement USB peripheral function.
5 // Code written for FX2 56-pin REVD...
6 // This firmware is used to test the FX ext. master CY3682 DK
7 // Copyright (c) 2001 Cypress Semiconductor All rights reserved
8 //-----------------------------------------------------------------------------
9 #include "fx2.h"
10 #include "fx2regs.h"
11 #include "fx2sdly.h" // SYNCDELAY macro
12
13 extern BOOL GotSUD; // Received setup data flag
14 extern BOOL Sleep;
15 extern BOOL Rwuen;
16 extern BOOL Selfpwr;
17
18 BYTE Configuration; // Current configuration
19 BYTE AlternateSetting; // Alternate settings
20
21 // EZUSB FX2 PORTE is not bit-addressable...
22
23 //-----------------------------------------------------------------------------
24 // Task Dispatcher hooks
25 // The following hooks are called by the task dispatcher.
26 //-----------------------------------------------------------------------------
27 void TD_Init( void )
28 { // Called once at startup
29 1
30 1 // set the CPU clock to 48MHz
31 1 CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;
32 1
33 1 // set the slave FIFO interface to 48MHz
34 1 IFCONFIG |= 0x40;
35 1
36 1 // Registers which require a synchronization delay, see section 15.14
37 1 // FIFORESET FIFOPINPOLAR
38 1 // INPKTEND OUTPKTEND
39 1 // EPxBCH:L REVCTL
40 1 // GPIFTCB3 GPIFTCB2
41 1 // GPIFTCB1 GPIFTCB0
42 1 // EPxFIFOPFH:L EPxAUTOINLENH:L
43 1 // EPxFIFOCFG EPxGPIFFLGSEL
44 1 // PINFLAGSxx EPxFIFOIRQ
45 1 // EPxFIFOIE GPIFIRQ
46 1 // GPIFIE GPIFADRH:L
47 1 // UDMACRCH:L EPxGPIFTRIG
48 1 // GPIFTRIG
49 1
50 1 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
51 1 // ...these have been replaced by GPIFTC[B3:B0] registers
52 1
53 1 // default: all endpoints have their VALID bit set
54 1 // default: TYPE1 = 1 and TYPE0 = 0 --> BULK
55 1 // default: EP2 and EP4 DIR bits are 0 (OUT direction)
C51 COMPILER V7.06 TCXMASTER 01/31/2007 10:30:02 PAGE 2
56 1 // default: EP6 and EP8 DIR bits are 1 (IN direction)
57 1 // default: EP2, EP4, EP6, and EP8 are double buffered
58 1
59 1 // we are just using the default values, yes this is not necessary...
60 1 EP1OUTCFG = 0xA0;
61 1 EP1INCFG = 0xA0;
62 1 SYNCDELAY; // see TRM section 15.14
63 1 EP2CFG = 0xA2;
64 1 SYNCDELAY;
65 1 EP4CFG = 0xA0;
66 1 SYNCDELAY;
67 1 EP6CFG = 0xE2;
68 1 SYNCDELAY;
69 1 EP8CFG = 0xE0;
70 1
71 1 // out endpoints do not come up armed
72 1
73 1 // since the defaults are double buffered we must write dummy byte counts twice
74 1 SYNCDELAY;
75 1 EP2BCL = 0x80; // arm EP2OUT by writing byte count w/skip.
76 1 SYNCDELAY;
77 1 EP2BCL = 0x80;
78 1 SYNCDELAY;
79 1 EP4BCL = 0x80; // arm EP4OUT by writing byte count w/skip.
80 1 SYNCDELAY;
81 1 EP4BCL = 0x80;
82 1
83 1 // enable dual autopointer feature
84 1 AUTOPTRSETUP |= 0x01;
85 1
86 1 Rwuen = TRUE; // Enable remote-wakeup
87 1
88 1 }
89
90 void TD_Poll( void )
91 { // Called repeatedly while the device is idle
92 1
93 1 /*-----------------------------------------------------------*/
94 1 WORD i;
95 1 WORD count;
96 1
97 1 if(!(EP2468STAT & bmEP2EMPTY))
98 1 { // check EP2 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
99 2 if(!(EP2468STAT & bmEP6FULL))
100 2 { // check EP6 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
101 3 APTR1H = MSB( &EP2FIFOBUF );
102 3 APTR1L = LSB( &EP2FIFOBUF );
103 3
104 3 AUTOPTRH2 = MSB( &EP6FIFOBUF );
105 3 AUTOPTRL2 = LSB( &EP6FIFOBUF );
106 3
107 3 count = (EP2BCH << 8) + EP2BCL;
108 3
109 3 // loop EP2OUT buffer data to EP6IN
110 3 for( i = 0x0000; i < count; i++ )
111 3 {
112 4 // setup to transfer EP2OUT buffer to EP6IN buffer using AUTOPOINTER(s)
113 4 EXTAUTODAT2 = EXTAUTODAT1;
114 4 }
115 3 EP6BCH = EP2BCH;
116 3 SYNCDELAY;
117 3 EP6BCL = EP2BCL; // arm EP6IN
C51 COMPILER V7.06 TCXMASTER 01/31/2007 10:30:02 PAGE 3
118 3 SYNCDELAY;
119 3 EP2BCL = 0x80; // re(arm) EP2OUT
120 3 }
121 2 }
122 1
123 1 if(!(EP2468STAT & bmEP4EMPTY))
124 1 { // check EP4 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
125 2 if(!(EP2468STAT & bmEP8FULL))
126 2 { // check EP8 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
127 3 APTR1H = MSB( &EP4FIFOBUF );
128 3 APTR1L = LSB( &EP4FIFOBUF );
129 3
130 3 AUTOPTRH2 = MSB( &EP8FIFOBUF );
131 3 AUTOPTRL2 = LSB( &EP8FIFOBUF );
132 3
133 3 count = (EP4BCH << 8) + EP4BCL;
134 3
135 3 // loop EP4OUT buffer data to EP8IN
136 3 for( i = 0x0000; i < count; i++ )
137 3 {
138 4 // setup to transfer EP4OUT buffer to EP8IN buffer using AUTOPOINTER(s)
139 4 EXTAUTODAT2 = EXTAUTODAT1;
140 4 }
141 3 EP8BCH = EP4BCH;
142 3 SYNCDELAY;
143 3 EP8BCL = EP4BCL; // arm EP8IN
144 3 SYNCDELAY;
145 3 EP4BCL = 0x80; // re(arm) EP4OUT
146 3 }
147 2 }
148 1 /*------------------------------------------------------------*/
149 1
150 1 // ...nothing to do... slave fifo's are in AUTO mode...
151 1
152 1 }
153
154 BOOL TD_Suspend( void )
155 { // Called before the device goes into suspend mode
156 1 return( TRUE );
157 1 }
158
159 BOOL TD_Resume( void )
160 { // Called after the device resumes
161 1 return( TRUE );
162 1 }
163
164 //-----------------------------------------------------------------------------
165 // Device Request hooks
166 // The following hooks are called by the end point 0 device request parser.
167 //-----------------------------------------------------------------------------
168 BOOL DR_GetDescriptor( void )
169 {
170 1 return( TRUE );
171 1 }
172
173 BOOL DR_SetConfiguration( void )
174 { // Called when a Set Configuration command is received
175 1
176 1 if( EZUSB_HIGHSPEED( ) )
177 1 { // ...FX2 in high speed mode
178 2 EP6AUTOINLENH = 0x02;
179 2 SYNCDELAY;
C51 COMPILER V7.06 TCXMASTER 01/31/2007 10:30:02 PAGE 4
180 2 EP8AUTOINLENH = 0x02; // set core AUTO commit len = 512 bytes
181 2 SYNCDELAY;
182 2 EP6AUTOINLENL = 0x00;
183 2 SYNCDELAY;
184 2 EP8AUTOINLENL = 0x00;
185 2 }
186 1 else
187 1 { // ...FX2 in full speed mode
188 2 EP6AUTOINLENH = 0x00;
189 2 SYNCDELAY;
190 2 EP8AUTOINLENH = 0x00; // set core AUTO commit len = 64 bytes
191 2 SYNCDELAY;
192 2 EP6AUTOINLENL = 0x40;
193 2 SYNCDELAY;
194 2 EP8AUTOINLENL = 0x40;
195 2 }
196 1
197 1 Configuration = SETUPDAT[ 2 ];
198 1 return( TRUE ); // Handled by user code
199 1 }
200
201 BOOL DR_GetConfiguration( void )
202 { // Called when a Get Configuration command is received
203 1 EP0BUF[ 0 ] = Configuration;
204 1 EP0BCH = 0;
205 1 EP0BCL = 1;
206 1 return(TRUE); // Handled by user code
207 1 }
208
209 BOOL DR_SetInterface( void )
210 { // Called when a Set Interface command is received
211 1 AlternateSetting = SETUPDAT[ 2 ];
212 1 return( TRUE ); // Handled by user code
213 1 }
214
215 BOOL DR_GetInterface( void )
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