xsusbhostdrv.c

优龙pxa270平台试验程序

/******************************************************************************
**
**  COPYRIGHT (C) 2000, 2001 Intel Corporation.
**
**  This software as well as the software described in it is furnished under 
**  license and may only be used or copied in accordance with the terms of the 
**  license. The information in this file is furnished for informational use 
**  only, is subject to change without notice, and should not be construed as 
**  a commitment by Intel Corporation. Intel Corporation assumes no 
**  responsibility or liability for any errors or inaccuracies that may appear 
**  in this document or any software that may be provided in association with 
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by 
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       XsUsbHostDrv.c
**
**  PURPOSE:        Driver functions for the USB Host Interface Controller.
**
**  LAST MODIFIED:  $Modtime: 7/17/03 1:01p $
******************************************************************************/

/*
*******************************************************************************
*   HEADER FILES
*******************************************************************************
*/                                                                      

#include "systypes.h"
#include "timedelays.h"
#include "DM_Debug.h"
#include "xllp_gpio.h"
#include "xllp_clkmgr.h"
#include "xllp_usbohci.h"
#define USB_HOST_GLOBALS  1
#include "XsUsbHostDrv.h"

/*
*******************************************************************************
*   GLOBAL DEFINITIONS
*******************************************************************************
*/

/*
*******************************************************************************
*   LOCAL DEFINITIONS
*******************************************************************************
*/
static volatile P_XLLP_CLKMGR_T ClkMgrRegP;
static P_XLLP_GPIO_T GPIORegP;
static volatile P_XLLP_USBOHCI_T USBOHCIRegP;

/*
******************************************************************************************
*
* FUNCTION:             XsUsbHostSetupGPIOs         
*
* DESCRIPTION:          This routine configures GPIOs used by USB Host
*
* INPUT PARAMETERS:     INT32 port - USB Host port 0 or 1 (not used)
*
* RETURNS:              none
*
* GLOBAL EFFECTS:       none
*
* ASSUMPTIONS:          none
*
*******************************************************************************************
*/
static
void XsUsbHostSetupGPIOs (INT32 port)
{
	XLLP_UINT32_T	pinArrayParms[3];
	XLLP_UINT32_T	alternateFunctionParms[3];
	
    // The root hub status register has some over-current indicator bits.
    //
    // The USB Host cannot detect over-current indications itself. Over-
    // current detection must be performed by some external device on the
    // platform. In the case of the Mainstone, this is done by U53, a
    // MAX1693EUB USB Power Switch, which provides 5.0 volts to the USB
    // and also provides an over-current detection signal for use here.
    //
    // Bulverde expects to get over-current indication as an input from
    // GPIO 88. Therefore, the nFAULT signal of the MAX1693EUB USB Power
    // switch on the Mainstone must be connected to GPIO 88.
    //
    // GPIO 88 must be configured as an input and set to alternate function 1.
    //
    // With the external circuitry wired in this fashion, and GPIO 88
    // configured as above, an assertion on the MAX1693EUB USB Power
    // Switch's nFAULT line will appear in the USB Host Root Hub status
    // register, UHCRHS, or a status register for a specific port on the 
    // root hub, UHCRHPS1 or UHCRHPS2, depending on the setting of the
    // UHCRHDA OverCurrentProtectionMode field.
    //
    // Note: Over current detection must be enabled in the USB Host
    // Root Hub Descriptor A register, UHCRHDA, before assertions on 
    // GPIO 88 are detected. Furthermore, over current detection must
    // be selected as global or per-port, also via the UHCRHDA register.

	// Configure GPIO 88:
	// Direction: Input
	// Alternate function: 1
	
	pinArrayParms[0] = 1;
	pinArrayParms[1] = 88;

	XllpGpioSetDirectionIn(GPIORegP, pinArrayParms);

	alternateFunctionParms[0] = 1;
	alternateFunctionParms[1] = XLLP_GPIO_ALT_FN_1;
	XllpGpioSetAlternateFn(GPIORegP, pinArrayParms, alternateFunctionParms);

    // A USBHost platform must provide 5V to the USB. Bulverde cannot do this.
    // Bulverde cannot source 5 volts, so some external circuitry is required.
    // The MAX1693EUB USB Power Switch is a component used to provide 5 volts
    // for a USB; it also can provide an over-current indicator if any device
    // on the USB begins to draw too much current.
    //
    // U53 on the Mainstone has a MAX1693EUB USB Power Switch. This part
    // is connected to a 5V power supply from the Mainstone. However, the
    // Bulverde USB Host is in control of enabling or disabling the MAX
    // 1693EUB USB Power Switch. When the USB Host enables the MAX1693EUB
    // USB Power Switch by asserting the MAX1693EUB USB Power Switch's nON
    // signal, the USB V+ and V- signals provide 5 Volts. When the nON signal
    // is deasserted, the MAX1693EUB USB Power Switch turns the USB off.
    //
    // The Bulverde USB Host expects to use GPIO 89 as a power enable signal.
    // The USB Host asserts or deasserts GPIO 89 by setting different bits
    // depending on the configuration of the USB Host.     

    // Configure GPIO 89:
	// Level: Low (enable)
	// Direction: Output
	// Alternate function: 2

	pinArrayParms[0] = 1;
	pinArrayParms[1] = 89;

	XllpGpioSetOutput0(GPIORegP, pinArrayParms);
	XllpGpioSetDirectionOut(GPIORegP, pinArrayParms);

	alternateFunctionParms[0] = 1;
	alternateFunctionParms[1] = XLLP_GPIO_ALT_FN_2;
	XllpGpioSetAlternateFn(GPIORegP, pinArrayParms, alternateFunctionParms);
}

/*
******************************************************************************************
*
* FUNCTION:             XsUsbHostTurnOnClocks         
*
* DESCRIPTION:          This routine turns on the USB Host clock, bit 10 and 
*                       Memory Controller clock, bit 20 in CKEN register of Clock Manager.
*
* INPUT PARAMETERS:     none
*
* RETURNS:              none
*
* GLOBAL EFFECTS:       none
*
* ASSUMPTIONS:          none
*
*******************************************************************************************
*/
static
void XsUsbHostTurnOnClocks (INT enable)	
{
    DM_CwDbgPrintf(DM_CW_USB_HOST_0, "XsUsbHostTurnOnClocks>>");
    
    if (enable)
    {
        // Enable USB Clock
        // The clock enable bit for the USB Host in Bulverde is bit number 10.
	    ClkMgrRegP->cken |= XLLP_CLKEN_USBHOST;
	
	    // The clock enable bit for the Internal Memory Clock in Bulverde is bit number 20.
	    ClkMgrRegP->cken |= XLLP_CLKEN_MEMCLOCK;
    }
    else
    {
        // Disable USB Clock
        // The clock enable bit for the USB Host in Bulverde is bit number 10.
//	    ClkMgrRegP->cken &= XLLP_CLKEN_USBHOST;
    }
    
    DM_CwDbgPrintf(DM_CW_USB_HOST_0, "<<XsUsbHostTurnOnClocks");
}
	

/*
******************************************************************************************
*
* FUNCTION:             XsUsbHostReset         
*
* DESCRIPTION:          This routine resets USB Host Controller
*
* INPUT PARAMETERS:     none
*
* RETURNS:              none
*
* GLOBAL EFFECTS:       none
*
* ASSUMPTIONS:          none
*
*******************************************************************************************
*/
static
void XsUsbHostReset (void)
{
    DM_CwDbgPrintf(DM_CW_USB_HOST_0, "XsUsbHostReset>>");

   // Do the reset for the Bulverde part.
   // Two levels of reset need to be initiated:
   //	The OHCI core needs to be reset via the FHR bit,
   //	then the OHCI system bus interface needs to be reset via the FSBIR bit.

	// reset the OHC core and all OHC blocks driven by the 12 MHz clock, eg. write fifo, etc.
	USBOHCIRegP->uhchr |=  XLLP_USBOHCI_UHCHR_FHR;
	DM_WaitUs(10);		// ten micro second wait called for by spec.
	USBOHCIRegP->uhchr &= ~XLLP_USBOHCI_UHCHR_FHR;

    DM_CwDbgPrintf(DM_CW_USB_HOST_0, "Clear UHCHR_FSBIR");

	// reset the OHC system bus interface
	USBOHCIRegP->uhchr |=  XLLP_USBOHCI_UHCHR_FSBIR;
	while(USBOHCIRegP->uhchr & XLLP_USBOHCI_UHCHR_FSBIR);	// auto clears in 3 system bus clocks

    DM_CwDbgPrintf(DM_CW_USB_HOST_0, "UHCHR_FSBIR Cleared");

	// now set the polarity fields so the OHCI knows to:
	//		assert or deassert the power control signals to power or shutdown a port, and
	//		detect overcurrent indication from assertion or de-assertion of the power sense signals.

	// note: the correcting settings for these values are determined by the board layout and the
	// external voltage regulators in use. In the case of the Mainstone, the external voltage
	// regulator is a MAX1693EUB USB Power Switch, which uses negative polarity for power enable
	// and for fault notification.
	USBOHCIRegP->uhchr |=  XLLP_USBOHCI_UHCHR_PCPL;			// bit = 1 means power control polarity is active low
	USBOHCIRegP->uhchr |=  XLLP_USBOHCI_UHCHR_PSPL;			// bit = 1 means power (ie. over-current) sense polarity is active low

	USBOHCIRegP->uhchr |=  XLLP_USBOHCI_UHCHR_SSEP1;		// keep port 1 in sleep/standby (eg. disable port 1)
//	USBOHCIRegP->uhchr &= ~XLLP_USBOHCI_UHCHR_SSEP1;		// for port 1, enable power to the single ended receivers and the port (DevMan says to do this)
	USBOHCIRegP->uhchr &= ~XLLP_USBOHCI_UHCHR_SSEP0;		// for port 0, enable power to the single ended receivers and the port
	USBOHCIRegP->uhchr &= ~XLLP_USBOHCI_UHCHR_SSE;			// allow the values of SSEP1 and SSPE0 to control the power.

    DM_CwDbgPrintf(DM_CW_USB_HOST_0, "<<XsUsbHostReset");
}


/*
******************************************************************************************

  FUNCTION:            XsUsbHostSelectPowerManagementMode         

  DESCRIPTION:         This function is used for Bulverde specific hardware initialization 
                       of the USB Host.

  INPUT PARAMETERS:    INT  mode,
                       INT  numPorts
                       INT* portMode

  RETURNS:             none

  GLOBAL EFFECTS:      none

  ASSUMPTIONS:         none

  Notes:
		The Bulverde USB Host expects to use GPIO 89 as a power enable signal.
		The USB Host asserts or deasserts GPIO 89 by setting different bits
		depending on the configuration of the USB Host. The configuration bits
		that are important here are:

			UHCRHDA:NoPowerSwitching (aka NPS)
				0:	the port power will follow the global or per-port
					power enable bits, depending UHCRHDA:PortSwitchingMode
				1:	Not able to switch power on and off, so 
					the port power will always be enabled.
				
			UHCRHDA:PowerSwitchingMode (aka PSM)
				0:	Global Power Switching Mode, power for all ports is 
					enabled or disabled in response to SetGlobalPower or
					ClearGlobalPower commands.
				1:	Per-Port Power Switching Mode, some ports can have
					their power enabled or disabled individually with 
					SetPortPower and ClearPortPower commands to the 
					corresponding USB Host Root Hub Port Status registers
					UHCRHPS1 or UHCRHPS2. In this mode, other ports can
					respond to the global commands SetGlobalPower and 
					ClearGlobalPower. Which type of power command the port
					responds to is controlled by the setting of the Port
					Power Control Mask bit for each port, found in the
					UHCRHDB:PPCM field

			Enabling / Disabling Global Power:
				Enable:		Write 1 to UHCRHDB:LPSC
				Disable:	Write 1 to UHCRHDB:LPS