xllp_msl.c

优龙pxa270平台试验程序

/******************************************************************************
**
**  COPYRIGHT (C) 2000, 2002 Intel Corporation.
**
**  This software as well as the software described in it is furnished under 
**  license and may only be used or copied in accordance with the terms of the 
**  license. The information in this file is furnished for informational use 
**  only, is subject to change without notice, and should not be construed as 
**  a commitment by Intel Corporation. Intel Corporation assumes no 
**  responsibility or liability for any errors or inaccuracies that may appear 
**  in this document or any software that may be provided in association with 
**  this document. 
**  Except as permitted by such license, no part of this document may be 
**  reproduced, stored in a retrieval system, or transmitted in any form or by 
**  any means without the express written consent of Intel Corporation. 
**
**  FILENAME:       mslxllp.c
**
**  PURPOSE:        This is the main source file for the XLLP primitives for the 
**					Mobile Scalable Link (MSL) bus.
**
******************************************************************************/

#include "xllp_msl.h"

#define XLLP_CLEAR_BITS(origValue,bitsToClear)	(origValue) &= ~bitsToClear;
#define XLLP_SET_BITS(origValue,bitsToSet)		(origValue) |=  bitsToSet;


//******************************************************************************
// XLLP_DOC_HDR_BEGIN
//
// Function Name: XllpMslConfigureBus
//
// Description: Configures the MSL link and sets up common operational parameters.
//              XllpMslConfigureBus is used to initialize and configure the MSL bus 
//              after a power on reset or when resuming operations from sleep/deep 
//              sleep state. The bus interface width for outbound and inbound 
//              links is set. The clock speed of outbound link is set. The number 
//              of transmit clock cycles after which the clock signal will stop 
//              transitioning after the link becomes idle is also set. All transmit 
//              and receive channels are disabled at this time. 
//  
// Registers Modified: BBITFC, BBCST, BBFREQ, BBCSTP, BBCSTR, BBFIFOx, BBCFGx
//
// Input Arguments:
//  pMslRegBase         Pointer to base MSL register map
//	maxNumChannels      Max number of RX or TX channels on link
//	interfaceWidth 	    Interface width
//	xmitFreqDivisor     Transmit Frequency divisor which determines frequency of
//                      outbound link
//	clockStopTime       Number of cycles after which outbound clock will stop once
//                      the link becomes idle
//	mfcStopThreshold    MFC stop Threshold
//	mfcStartThreshold   MFC start threshold
//  waitTime            Wait time in cycles after which to try sending data over a
//                      channel after WAIT is asserted              
//
// Output Arguments:
//
// Return Value: 
//
// XLLP_DOC_HDR_END
//*******************************************************************************
void XllpMslConfigureBus
(		
	P_XllpMslRegT				pMslRegBase, 
	XLLP_UINT32_T				maxNumChannels,
	XllpMslInterfaceWidthTypeT	interfaceWidth, 	
	XLLP_UINT32_T				xmitFreqDivisor,
	XLLP_UINT32_T				clockStopTime,
	XLLP_UINT32_T				mfcStopThreshold,
	XLLP_UINT32_T				mfcStartThreshold,
    XLLP_UINT32_T               waitTime
)
{
	XLLP_UINT32_T				width;

	//
	// Set the interface width
	//
	width = (interfaceWidth << XLLP_MSL_BBITFC_RXITFC) | 
		    (interfaceWidth << XLLP_MSL_BBITFC_TXITFC);
	pMslRegBase->ControlReg.BBITFC = width;

	//
	// Update the MFC channel Start/Stop threshlds
	// The Receive channels need to be disabled when doing this
	//
	pMslRegBase->ControlReg.BBCSTP = mfcStopThreshold;
	pMslRegBase->ControlReg.BBCSTR = mfcStartThreshold;

	//
	// Clock Stop Time
	//
	pMslRegBase->ControlReg.BBCST = clockStopTime;
	
    //
    // Wait time
    //
    pMslRegBase->ControlReg.BBWAIT = waitTime;

	//
	// Set Transmit Frequency
	//
	pMslRegBase->ControlReg.BBFREQ = (xmitFreqDivisor << XLLP_MSL_BBFREQ_DIV);

	return;
}

//******************************************************************************
// XLLP_DOC_HDR_BEGIN
//
// Function Name:   XllpMslEmptyRxFifo
//
// Description:     Empties all data from RX fifo for specified channel
//  
// Registers Modified: BBFIFOx
//
// Input Arguments:
//  pMslRegBase         Pointer to base MSL register map
//  channel:            MSL channel on inbound RX link
//
// Output Arguments:
//
// Return Value: 
//
// XLLP_DOC_HDR_END
//*******************************************************************************
void XllpMslEmptyRxFifo
(
	P_XllpMslRegT				pMslRegBase, 
	XLLP_INT32_T				channel
)
{
    XLLP_UINT32_T				status;
    XLLP_UINT32_T				data;
    XLLP_UINT32_T				maxDataCount=XLLP_MSL_MAX_RX_FIFO;
    
    
    while(maxDataCount--)
    {
        XllpMslGetChannelStatus (pMslRegBase, channel, &status);
	    if(status & XLLP_MSL_BBSTAT_RxEmpty)
		    break;
        data = pMslRegBase->FifoReg.BBFIFO[channel];
    }
	
}

//******************************************************************************
// XLLP_DOC_HDR_BEGIN
//
// Function Name:       XllpMslConfigureRxChannel
//
// Description:         XllpMslConfigureRxChannel is used to configure a channel on 
//                      an inbound link for receiving data. As part of the configuration 
//                      the channel can be both enabled or disabled. The flow control 
//                      parameters associated with the channel can be also be set at 
//                      this time
//  
// Registers Modified:  BBCFGx
//
// Input Arguments:
//  pMslRegBase         Pointer to base MSL register map
//  channel:            MSL channel on inbound RX link
//  rxChannelEnable     Whether to enable or disable channel
//	rxMfcEnable         Whether to enable MFC or not    
//	rxDfcEnable         Whether to enable DFC or not            
//	fifoSvcThreshold    FIFo srvice threshold
//	fifoServiceType     FIFO Service Type, DMA or interrupts or none	
//	eocServiceType      Interrupt at End of Transfer or None.
//
// Output Arguments:
//
// Return Value: 
//
// XLLP_DOC_HDR_END
//*******************************************************************************
void XllpMslConfigureRxChannel
(	
	P_XllpMslRegT				pMslRegBase, 
	XLLP_INT32_T				channel,
	XllpMslChannelEnableTypeT	rxChannelEnable,
	XllpMslMfcEnableTypeT		rxMfcEnable,
	XllpMslDfcEnableTypeT		rxDfcEnable,
	XllpMslFifoSvcThreshTypeT	fifoSvcThreshold,
	XllpMslFifoServiceTypeT		fifoServiceType,	
	XllpMslEocServiceTypeT		eocServiceType
)
{
	XLLP_UINT32_T				channelCfg;
	XLLP_UINT32_T				bitsToClear;
	XLLP_UINT32_T				bitsToSet;

	//
	// Set the specified receive configuration in BBCFG for the specified channel
	//

	channelCfg = pMslRegBase->ConfigReg.BBCFG[channel];

	bitsToClear= (0x1U << XLLP_MSL_BBCFG_RxEnable)			|
		         (0x1U << XLLP_MSL_BBCFG_RxMFCEnable)		|
				 (0x1U << XLLP_MSL_BBCFG_RxDFCEnable)		|
				 (0x3U << XLLP_MSL_BBCFG_RxThreshLevel)		|
				 (0x7U << XLLP_MSL_BBCFG_RxService)			|
				 (0x3U << XLLP_MSL_BBCFG_EOCService);


	bitsToSet  = (rxChannelEnable << XLLP_MSL_BBCFG_RxEnable)		|
		         (rxMfcEnable     << XLLP_MSL_BBCFG_RxMFCEnable)	|
				 (rxDfcEnable     << XLLP_MSL_BBCFG_RxDFCEnable)	|
				 (fifoSvcThreshold<< XLLP_MSL_BBCFG_RxThreshLevel)	|
				 (fifoServiceType << XLLP_MSL_BBCFG_RxService)		|
				 (eocServiceType  << XLLP_MSL_BBCFG_EOCService);


	XLLP_CLEAR_BITS(channelCfg, bitsToClear);
	XLLP_SET_BITS  (channelCfg, bitsToSet);
	
	pMslRegBase->ConfigReg.BBCFG[channel] = channelCfg;

	return;
}

//******************************************************************************
// XLLP_DOC_HDR_BEGIN
//
// Function Name:       XllpMslConfigureTxChannel
//
// Description:         XllpMslConfigureRxChannel is used to configure a channel on 
//                      an outbound link for transmitting data. As part of the configuration 
//                      the channel can be both enabled or disabled. The flow control 
//                      parameters associated with the channel can be also be set at 
//                      this time
//  
// Registers Modified:  BBCFGx
//
// Input Arguments:
//  pMslRegBase         Pointer to base MSL register map
//  channel:            MSL channel on outbound TX link
//  txChannelEnable     Whether to enable or disable channel
//	txMfcEnable         Whether to enable MFC or not    
//	txDfcEnable         Whether to enable DFC or not            
//	fifoSvcThreshold    FIFo srvice threshold
//	fifoServiceType     FIFO Service Type, DMA or interrupts or none	
//
// Output Arguments:
//
// Return Value: 
//
// XLLP_DOC_HDR_END
//*******************************************************************************
void XllpMslConfigureTxChannel
(
	P_XllpMslRegT				pMslRegBase,
	XLLP_INT32_T				channel,
	XllpMslChannelEnableTypeT	txChannelEnable,
	XllpMslMfcEnableTypeT		txMfcEnable,
	XllpMslDfcEnableTypeT		txDfcEnable,
	XllpMslFifoSvcThreshTypeT	fifoSvcThreshold,
	XllpMslFifoServiceTypeT		fifoServiceType
)
{
	XLLP_UINT32_T				channelCfg;
	XLLP_UINT32_T				bitsToClear;
	XLLP_UINT32_T				bitsToSet;

	//
	// Set the specified receive configuration in BBCFG for the specified channel
	//

	channelCfg = pMslRegBase->ConfigReg.BBCFG[channel];

	bitsToClear= (0x1U << XLLP_MSL_BBCFG_TxEnable)			|
		         (0x1U << XLLP_MSL_BBCFG_TxMFCEnable)		|
				 (0x1U << XLLP_MSL_BBCFG_TxDFCEnable)		|
				 (0x3U << XLLP_MSL_BBCFG_TxThreshLevel)		|
				 (0x7U << XLLP_MSL_BBCFG_TxService);

	bitsToSet  = (txChannelEnable << XLLP_MSL_BBCFG_TxEnable)		|
		         (txMfcEnable     << XLLP_MSL_BBCFG_TxMFCEnable)	|
				 (txDfcEnable     << XLLP_MSL_BBCFG_TxDFCEnable)	|
				 (fifoSvcThreshold<< XLLP_MSL_BBCFG_TxThreshLevel)	|
				 (fifoServiceType << XLLP_MSL_BBCFG_TxService);

	XLLP_CLEAR_BITS(channelCfg, bitsToClear);
	XLLP_SET_BITS  (channelCfg, bitsToSet);
	
	pMslRegBase->ConfigReg.BBCFG[channel] = channelCfg;

	return;	
}

//******************************************************************************
// XLLP_DOC_HDR_BEGIN
//
// Function Name:       XllpMslSetTxFifoService
//
// Description:         Sets the FIFO service type for the outbound TX channel
//  
// Registers Modified:  BBCFGx
//
// Input Arguments:
//  pMslRegBase         Pointer to base MSL register map
//  channel:            MSL channel on outbound TX link
//  fifoService:        FIFO service type, None, Interrupts or DMA
//
// Output Arguments:
//
// Return Value: 
//
// XLLP_DOC_HDR_END
//*******************************************************************************
void XllpMslSetTxFifoService
(
	P_XllpMslRegT				pMslRegBase,
	XLLP_INT32_T				channel,
    XLLP_UINT32_T               fifoService
)
{
	XLLP_UINT32_T				channelCfg;
	XLLP_UINT32_T				bitsToClear=0;
    XLLP_UINT32_T				bitsToSet=0;

    channelCfg = pMslRegBase->ConfigReg.BBCFG[channel];

    if(fifoService != XLLP_FIFO_SERVICE_NONE)
	    bitsToSet=   (fifoService << XLLP_MSL_BBCFG_TxService);
    else
        bitsToClear= (0x7U << XLLP_MSL_BBCFG_TxService);

	XLLP_CLEAR_BITS(channelCfg, bitsToClear);
    XLLP_SET_BITS  (channelCfg, bitsToSet);
	pMslRegBase->ConfigReg.BBCFG[channel] = channelCfg;
}

//******************************************************************************
// XLLP_DOC_HDR_BEGIN
//
// Function Name:       XllpMslSetRxFifoService
//
// Description:         Sets the FIFO service type for the inbound RX channel
//  
// Registers Modified:  BBCFGx
//
// Input Arguments:
//  pMslRegBase         Pointer to base MSL register map
//  channel:            MSL channel on inbound RX link
//  fifoService:        FIFO service type, None, Interrupts or DMA
//
// Output Arguments:
//
// Return Value: 
//
// XLLP_DOC_HDR_END
//*******************************************************************************
void XllpMslSetRxFifoService
(
	P_XllpMslRegT				pMslRegBase,
	XLLP_INT32_T				channel,
    XLLP_UINT32_T               fifoService
)
{
	XLLP_UINT32_T				channelCfg;
    XLLP_UINT32_T				bitsToClear=0;
    XLLP_UINT32_T				bitsToSet=0;

    channelCfg = pMslRegBase->ConfigReg.BBCFG[channel];