xllp_i2sacodec.c

优龙pxa270平台试验程序

/******************************************************************************
 **
 **  COPYRIGHT (C) 2000, 2001 Intel Corporation.
 **
 **  This software as well as the software described in it is furnished under 
 **  license and may only be used or copied in accordance with the terms of the 
 **  license. The information in this file is furnished for informational use 
 **  only, is subject to change without notice, and should not be construed as 
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 **  responsibility or liability for any errors or inaccuracies that may appear 
 **  in this document or any software that may be provided in association with 
 **  this document. 
 **  Except as permitted by such license, no part of this document may be 
 **  reproduced, stored in a retrieval system, or transmitted in any form or by 
 **  any means without the express written consent of Intel Corporation. 
 **
 **  FILENAME:       xllp_ac97acodec.c
 **
 **  PURPOSE:        XLLP for Bulverde's AC'97 Controller Unit.
 **                  Includes initialization, API and support
 **                  functions.  
 **
 **  Valid for    :  Subset of AC '97 Rev 2.1
 **
 **
 ******************************************************************************/

#include "xllp_acodec.h"
#include "xllp_ak2440.h"
#include ".\Xllp_ssp.h"
#include ".\xllp_gpio.h"
#include "xllp_ac97acodec.h"
#include "xllp_ucb1400.h"

XLLP_ACODEC_ERROR_T  XllpI2sACodecInit(XLLP_ACODEC_CONTEXT_T *pDeviceContext)
{
    int k= 0;

/* Initialize the I2S bus */
 
    
//  clearing the GPIO's value to write the correct value in
	(pDeviceContext->pGpioReg)->GAFR0_U &= ~( XLLP_GPIO_AF_BIT_I2SBITCLK_IN_MASK | 
					   ( XLLP_GPIO_AF_BIT_I2S_SDATA_IN_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC_MASK) );
    
	(pDeviceContext->pGpioReg)->GAFR3_U &=   ~( XLLP_GPIO_AF_BIT_I2S_SYSCLK_MASK );
    
	(pDeviceContext->pGpioReg)->GPDR0 |= (XLLP_GPIO_BIT_I2SBITCLK|XLLP_GPIO_BIT_I2S_SDATA_OUT|XLLP_GPIO_BIT_I2S_SYNC);
    
	//(pDeviceContext->pGpioReg)->GPDR0 &= ~XLLP_GPIO_BIT_I2S_SDATA_IN;
	(pDeviceContext->pGpioReg)->GPDR3 |= (XLLP_GPIO_BIT_I2S_SYSCLK );
    

//  sets the alternate function to make the processor the master and the codec the slave
//  and to generate the bit clock output
	(pDeviceContext->pGpioReg)->GAFR0_U |= ( ( XLLP_GPIO_AF_BIT_I2SBITCLK_OUT ) | 
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT )|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC) );  //( XLLP_GPIO_AF_BIT_I2S_SDATA_IN )|

	(pDeviceContext->pGpioReg)->GAFR3_U |=   ( XLLP_GPIO_AF_BIT_I2S_SYSCLK );

   	
    XllpOstDelayMicroSeconds( pDeviceContext->pOSTRegs,100);

//  ensuring the I2S clock is on
	(pDeviceContext->pClockReg)->cken |= XLLP_CLKEN_I2S;
    XllpOstDelayMicroSeconds( pDeviceContext->pOSTRegs,10);

////     EdbgOutputDebugString ( "after init, GPDR0  is %x\r\n", (pDeviceContext->pGpioReg)->GPDR0 );
	//EdbgOutputDebugString ( "after init, GPDR3  is %x\r\n", (pDeviceContext->pGpioReg)->GPDR3);
	//EdbgOutputDebugString ( "after init, GAFR0_U  is %x\r\n", (pDeviceContext->pGpioReg)->GAFR0_U );
	//EdbgOutputDebugString ( "after init, GAFR3_U  is %x\r\n", (pDeviceContext->pGpioReg)->GAFR3_U  );
//  turning on the amp for output of sound
//todo: find this define, it didn't work for me
	//Bcr->MISCWR2 &= ~(XLLP_BCR_MISCWR2_I2S_SPKROFF |XLLP_BCR_MISCWR2_AC97_SPKROFF);

//   choose the normal I2S mode of operation
	(pDeviceContext->pPCMReg)->SACR1 |= XLLP_SACR1_DREC ; 
	(pDeviceContext->pPCMReg)->SACR1 &= ~(XLLP_SACR1_AMSL | XLLP_SACR1_DRPL |XLLP_SACR1_ENLBF); 
//   priming Transmit IO
     (pDeviceContext->pPCMReg)->SAICR |= XLLP_SAICR_TUR;
	 for (k=0; k<16; k++)
        (pDeviceContext->pPCMReg)->SADR = (k<<15 | k);

//   enable I2SLINK, maintain the bit clock direction

	 (pDeviceContext->pPCMReg)->SACR0 = 0;

    (pDeviceContext->pPCMReg)->SACR0 |= (XLLP_SACR0_ENB |XLLP_SACR0_BCKD | (0x8<<8) ); 

    (pDeviceContext->pPCMReg)->SADIV = 0x34; //appx 11.025KHZ

//   programming the Transmit Threshold
//	 (pDeviceContext->pPCMReg)->SACR0 |= 0xC00;

  //EdbgOutputDebugString ( "after init, SACR0  is %x\r\n", myDeviceContext.pPCMReg->SACR0 );
//EdbgOutputDebugString ( "after init, status  is %x\r\n", myDeviceContext.pPCMReg->SASR0 );
  
return XLLP_ACODEC_SUCCESS;
}