xllp_acodec.c

优龙pxa270平台试验程序

/*
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** Copyright 2000-2003 Intel Corporation All Rights Reserved.
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*/

#include "xllp_acodec.h"
#include "xllp_ak2440.h"
#include "Xllp_ssp.h"
#include "xllp_gpio.h"
#include "xllp_wm8753.h"
#include "xllp_wm9712.h"
#include "xllp_ac97acodec.h"
#include "xllp_ucb1400.h"
#include "xllp_ccra0.h"
#include "xllp_bcr.h"

extern XLLP_ACODEC_ERROR_T XLLPAkSetMasterVol(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T GainInDb);
extern XLLP_ACODEC_ERROR_T XllpAkGetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkGetGetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkGetSetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkGetSetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpAkGetEnableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpAkGetDisableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpAkCodecSpecificDeinit (XLLP_ACODEC_CONTEXT_T *pDeviceContext);
extern XLLP_ACODEC_ERROR_T XllpAKEnterEuipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T State);
extern XLLP_ACODEC_ERROR_T XllpAKQueryEquipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T * State);

extern XLLP_ACODEC_ERROR_T XllpAKCodecRead  (XLLP_ACODEC_CONTEXT_T *PdevContext, XLLP_UINT16_T regAddr,  XLLP_UINT16_T *pRegvalue);
extern XLLP_ACODEC_ERROR_T XllpAKCodecWrite (XLLP_ACODEC_CONTEXT_T *PdevContext, XLLP_UINT16_T regAddr, XLLP_UINT16_T Regvalue);

extern XLLP_ACODEC_ERROR_T XllpWm8753SetMasterVol(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T GainInDb);
extern XLLP_ACODEC_ERROR_T XllpWm8753GetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm8753GetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm8753SetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm8753SetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm8753EnableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpWm8753DisableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpWm8753CodecSpecificInit (XLLP_ACODEC_CONTEXT_T *pDeviceContext);
extern XLLP_ACODEC_ERROR_T XllpWm8753CodecWrite(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_UINT16_T regOffset, XLLP_UINT16_T regVal);
extern XLLP_ACODEC_ERROR_T XllpWm8753CodecRead(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_UINT16_T regOffset, XLLP_UINT16_T *regVal);
extern XLLP_ACODEC_ERROR_T XllpWm8753CodecSpecificDeinit (XLLP_ACODEC_CONTEXT_T *pDeviceContext);
extern XLLP_ACODEC_ERROR_T XllpWm8753EnterEuipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T State);
extern XLLP_ACODEC_ERROR_T XllpWm8753QueryEquipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T * State);

extern XLLP_ACODEC_ERROR_T XllpWm9712SetMasterVol(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T GainInDb);
extern XLLP_ACODEC_ERROR_T XllpWm9712GetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm9712GetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T * RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm9712SetInSampleRate(XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm9712SetOutSampleRate (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT16_T RateInKhz);
extern XLLP_ACODEC_ERROR_T XllpWm9712EnableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpWm9712DisableSspPath (XLLP_ACODEC_CONTEXT_T *pDeviceContext,XLLP_UINT8_T uiDirection);
extern XLLP_ACODEC_ERROR_T XllpWm9712CodecSpecificInit (XLLP_ACODEC_CONTEXT_T *pDeviceContext);
extern XLLP_ACODEC_ERROR_T XllpWm9712CodecWrite(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_UINT16_T regOffset, XLLP_UINT16_T regVal);
extern XLLP_ACODEC_ERROR_T XllpWm9712CodecRead(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_UINT16_T regOffset, XLLP_UINT16_T *regVal);
extern XLLP_ACODEC_ERROR_T XllpWm9712CodecSpecificDeinit (XLLP_ACODEC_CONTEXT_T *pDeviceContext);
extern XLLP_ACODEC_ERROR_T XllpWm9712EnterEuipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T State);
extern XLLP_ACODEC_ERROR_T XllpWm9712QueryEquipmentState(XLLP_ACODEC_CONTEXT_T *pDeviceContext, XLLP_ACODEC_EQUIPMENT_T * State);


XLLP_ACODEC_ERROR_T XllpACodecI2CInit(XLLP_ACODEC_CONTEXT_T *pDeviceContext)
{
    if( !(( (pDeviceContext->pClockReg)->cken) & XLLP_CLKEN_I2C) )
           (pDeviceContext->pClockReg)->cken |=  XLLP_CLKEN_I2C;

	 if( !(((pDeviceContext->pClockReg)->cken) & XLLP_CLKEN_I2C) )
  {
	   //EdbgOutputDebugString ( "clock is not turned on \r\n");
	return(XLLP_ACODEC_CONTROLLER_NOT_INITIALIZED);
  }

    
    (pDeviceContext->pGpioReg)->GPDR3 |= (XLLP_GPIO_BIT_SCL | ~XLLP_GPIO_BIT_SDA);
    
    (pDeviceContext->pGpioReg)->GAFR3_U |=  ( XLLP_GPIO_AF_BIT_SCL | XLLP_GPIO_AF_BIT_SDA);
    
	

   
  /* Setup I2C slave address */
  (pDeviceContext->pCtrlReg)->ISAR =  0x0;                             //just try to give inital value, no other meaning
    
  if((pDeviceContext->pCtrlReg)->ISAR != 0x0)
  {
//	   EdbgOutputDebugString ( "clock is not turned on \r\n");
	return(XLLP_ACODEC_CONTROLLER_NOT_INITIALIZED);
  }
    
  (pDeviceContext->pCtrlReg)->ICR = (XLLP_ICR_UIE|XLLP_ICR_SCLEA);

  return XLLP_ACODEC_SUCCESS;
}

XLLP_ACODEC_ERROR_T XllpACodecI2STriState(XLLP_ACODEC_CONTEXT_T *pDeviceContext)
{
    //(pDeviceContext->pPCMReg)->SACR0 = 0;
	(pDeviceContext->pGpioReg)->GPDR0 &=~(XLLP_GPIO_BIT_I2SBITCLK|XLLP_GPIO_BIT_I2S_SDATA_OUT|XLLP_GPIO_BIT_I2S_SYNC);
    
	(pDeviceContext->pGpioReg)->GPDR0 &=  ~XLLP_GPIO_BIT_I2S_SDATA_IN;

	(pDeviceContext->pGpioReg)->GAFR0_U &= ~( XLLP_GPIO_AF_BIT_I2SBITCLK_IN_MASK | 
					   ( XLLP_GPIO_AF_BIT_I2S_SDATA_IN_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC_MASK) );
    
	(pDeviceContext->pGpioReg)->GAFR3_U &=   ~( XLLP_GPIO_AF_BIT_I2S_SYSCLK_MASK );

	return (XLLP_ACODEC_SUCCESS);


}


XLLP_ACODEC_ERROR_T XllpACodecI2SGPIOConfig(XLLP_ACODEC_CONTEXT_T *pDeviceContext)
{
	(pDeviceContext->pGpioReg)->GAFR0_U &= ~( XLLP_GPIO_AF_BIT_I2SBITCLK_IN_MASK | 
					   ( XLLP_GPIO_AF_BIT_I2S_SDATA_IN_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC_MASK) );
    
	(pDeviceContext->pGpioReg)->GAFR3_U &=   ~( XLLP_GPIO_AF_BIT_I2S_SYSCLK_MASK );
    
	(pDeviceContext->pGpioReg)->GPDR0 |= (XLLP_GPIO_BIT_I2SBITCLK|XLLP_GPIO_BIT_I2S_SDATA_OUT|XLLP_GPIO_BIT_I2S_SYNC);
    
	(pDeviceContext->pGpioReg)->GPDR0 &=  ~XLLP_GPIO_BIT_I2S_SDATA_IN;
	(pDeviceContext->pGpioReg)->GPDR3 |= (XLLP_GPIO_BIT_I2S_SYSCLK );
    

//  sets the alternate function to make the processor the master and the codec the slave
//  and to generate the bit clock output
	(pDeviceContext->pGpioReg)->GAFR0_U |= ( ( XLLP_GPIO_AF_BIT_I2SBITCLK_OUT ) | 
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT )|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC)|( XLLP_GPIO_AF_BIT_I2S_SDATA_IN ));  //|

	(pDeviceContext->pGpioReg)->GAFR3_U |=   ( XLLP_GPIO_AF_BIT_I2S_SYSCLK );


   	//(pDeviceContext->pGpioReg)->GAFR0_U |= XLLP_GPIO_AF_BIT_I2S_SDATA_IN;
	return (XLLP_ACODEC_SUCCESS);

}
XLLP_ACODEC_ERROR_T XllpACodecI2SInit(XLLP_ACODEC_CONTEXT_T *pDeviceContext)
{
	XLLP_UINT16_T k=0;
  //  EdbgOutputDebugString ( "enter I2S init \r\n");
	(pDeviceContext->pGpioReg)->GAFR0_U &= ~( XLLP_GPIO_AF_BIT_I2SBITCLK_IN_MASK | 
					   ( XLLP_GPIO_AF_BIT_I2S_SDATA_IN_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT_MASK)|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC_MASK) );
    
	(pDeviceContext->pGpioReg)->GAFR3_U &=   ~( XLLP_GPIO_AF_BIT_I2S_SYSCLK_MASK );
    
	(pDeviceContext->pGpioReg)->GPDR0 |= (XLLP_GPIO_BIT_I2SBITCLK|XLLP_GPIO_BIT_I2S_SDATA_OUT|XLLP_GPIO_BIT_I2S_SYNC);
    
	(pDeviceContext->pGpioReg)->GPDR0 &=  ~XLLP_GPIO_BIT_I2S_SDATA_IN;
	(pDeviceContext->pGpioReg)->GPDR3 |= (XLLP_GPIO_BIT_I2S_SYSCLK );
    

//  sets the alternate function to make the processor the master and the codec the slave
//  and to generate the bit clock output
	(pDeviceContext->pGpioReg)->GAFR0_U |= ( ( XLLP_GPIO_AF_BIT_I2SBITCLK_OUT ) | 
	   				   ( XLLP_GPIO_AF_BIT_I2S_SDATA_OUT )|
	   				   ( XLLP_GPIO_AF_BIT_I2S_SYNC)|( XLLP_GPIO_AF_BIT_I2S_SDATA_IN ));  //|

	(pDeviceContext->pGpioReg)->GAFR3_U |=   ( XLLP_GPIO_AF_BIT_I2S_SYSCLK );

    XllpOstDelayMicroSeconds( pDeviceContext->pOSTRegs,100);

//  ensuring the I2S clock is on
	(pDeviceContext->pClockReg)->cken |= XLLP_CLKEN_I2S;
    //XllpOstDelayMicroSeconds( pDeviceContext->pOSTRegs,10);

//   choose the normal I2S mode of operation, recording path is disabled
	//(pDeviceContext->pPCMReg)->SACR1 |= XLLP_SACR1_DREC ;
	//(pDeviceContext->pPCMReg)->SACR1 |= XLLP_SACR1_DRPL ;
	(pDeviceContext->pPCMReg)->SACR1 &= ~(XLLP_SACR1_AMSL |XLLP_SACR1_ENLBF |XLLP_SACR1_DRPL|XLLP_SACR1_DREC ); //XLLP_SACR1_DRPL
//   priming Transmit IO
     (pDeviceContext->pPCMReg)->SAICR |= (XLLP_SAICR_TUR |XLLP_SAICR_ROR);
	 for (k=0; k<16; k++)
        (pDeviceContext->pPCMReg)->SADR = (k<<15 | k);

//   enable I2SLINK, maintain the bit clock direction

	(pDeviceContext->pPCMReg)->SACR0 = 0;

    (pDeviceContext->pPCMReg)->SACR0 |= (XLLP_SACR0_ENB |XLLP_SACR0_BCKD | (0x8<<8) | (0x8<<12)); 

    (pDeviceContext->pPCMReg)->SADIV = 0x48;   //0x1a; //appx 22.05KHZ

	 //EdbgOutputDebugString ( "exit I2S init \r\n");
	 
    return XLLP_ACODEC_SUCCESS;
}
/***********************************************************************************
 * Prototype: XLLP_ACODEC_ERROR_T XllpACodecInit(XLLP_ACODEC_CONTEXT_T *pDeviceContext)
 * Descirption: Initialize I2C and I2S, and SSP for command and control, it brings
 *              system in full functional state
 *
 * Parameter: XLLP_ACODEC_CONTEXT_T a pointer to device context structure created
 *            by audio codec client software     
 * Return:    success or failure
 *************************************************************************************/
XLLP_ACODEC_ERROR_T XllpACodecInit(XLLP_ACODEC_CONTEXT_T *pDeviceContext)
{
    

	switch (pDeviceContext->ACodecId)
	{

		case AK_2440_ID: //0x9e AKM 2440
			  XllpACodecI2CInit(pDeviceContext);
			//g_pfnSetMasterVol=XllpAkSetMasterVol;

			//AKM2440-specific initialization
			(pDeviceContext->g_pfnSetMasterVol)=		XllpAkSetMasterVol;
			(pDeviceContext->g_pfnGetInSampleRate)=		XllpAkGetInSampleRate;
			(pDeviceContext->g_pfnGetOutSampleRate)=	XllpAkGetOutSampleRate;
			(pDeviceContext->g_pfnSetInSampleRate)=		XllpAkSetInSampleRate;
			(pDeviceContext->g_pfnSetOutSampleRate)=	XllpAkSetOutSampleRate;
			(pDeviceContext->g_pfnEnableSspPath)=		XllpAkEnableSspPath;