📄 bootload.inc
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; P18F8720.INC Standard Header File, Version .1 Microchip Technology, Inc.
NOLIST
; This header file defines configurations, registers, and other useful bits of
; information for the PIC18F8720 microcontroller. These names are taken to match
; the data sheets as closely as possible.
; Note that the processor must be selected before this file is
; included. The processor may be selected the following ways:
; 1. Command line switch:
; C:\ MPASM MYFILE.ASM /PIC18F8720
; 2. LIST directive in the source file
; LIST P=PIC18F8720
; 3. Processor Type entry in the MPASM full-screen interface
; 4. Setting the processor in the MPLAB Project Dialog
;==========================================================================
;
; Revision History
;
;==========================================================================
;Rev: Date: Details: Who:
; 1.07 11/16/2001 Changed CVREF_CVRCON => CVRSS, ADEN => ADDEN pas
; 1.06 10/23/01 Corrected CONFIG bits/registers, LVDCON bits tr/pas
; 1.05 10/08/01 Corrected names of T2CON and T4CON bits
; (TOUTPS3 => T2OUTPS3 and T4OUTPS3, etc.) pas
; 1.04 10/03/01 Changed T0CON bit 3 name from T0PS3 to PSA. pas
; 1.03 10/01/01 Added definitions of the CCP4, CCP5, TMR4, and
; USART2 registers (0x0F6B to 0x0F78); corrected names
; of INTCON3 bits (i.e., INT2P => INT2IP). pas
; 1.02 09/18/01 Some bits have identical names in the data sheet;
; for instance, CCP2 in PORTB and CCP2 in PORTC.
; The assembler does not allow multiple definitions of
; the same name, however. So I postfixed these names
; with the name of the register to make them
; unique. (Now we have CCP2_PORTB and CCP2_PORTC). pas
; 1.01 09/14/01 Preliminary release tr
;==========================================================================
;
; Verify Processor
;
;==========================================================================
; IFNDEF __18F8720
; MESSG "Processor-header file mismatch. Verify selected processor."
; ENDIF
;==========================================================================
; 18Fxxx Family EQUates
;==========================================================================
FSR0 EQU 0
FSR1 EQU 1
FSR2 EQU 2
FAST EQU 1
W EQU 0
A EQU 0
ACCESS EQU 0
BANKED EQU 1
;==========================================================================
;==========================================================================
; 16Cxxx/17Cxxx Substitutions
;==========================================================================
#define clrw clrf WREG ; PIC16Cxxx code substitution (WREG is addressable)
#define CLRW CLRF WREG ; PIC16Cxxx code substitution (WREG is addressable)
#define negw negf WREG ; PIC16Cxxx code substitution (WREG is addressable)
#define NEGW NEGF WREG ; PIC16Cxxx code substitution (WREG is addressable)
#define movpf movff ; PIC17Cxxx code substitution
#define MOVPF MOVFF ; PIC17Cxxx code substitution
#define movfp movff ; PIC17Cxxx code substitution
#define MOVFP MOVFF ; PIC17Cxxx code substitution
#define lcall call ; PIC17Cxxx code substitution
#define LCALL CALL ; PIC17Cxxx code substitution
#define lgoto goto ; PIC17Cxxx code substitution
#define LGOTO GOTO ; PIC17Cxxx code substitution
#define DDRA TRISA ; PIC17Cxxx SFR substitution
#define DDRB TRISB ; PIC17Cxxx SFR substitution
#define DDRC TRISC ; PIC17Cxxx SFR substitution
#define DDRD TRISD ; PIC17Cxxx SFR substitution
#define DDRE TRISE ; PIC17Cxxx SFR substitution
#define DDRF TRISF ; PIC17Cxxx SFR substitution
#define DDRG TRISG ; PIC17Cxxx SFR substitution
#define DDRH TRISH ; PIC17Cxxx SFR substitution
#define DDRJ TRISJ ; PIC17Cxxx SFR substitution
;==========================================================================
;
; Register Definitions
;
;==========================================================================
;----- Register Files -----------------------------------------------------
TOSU EQU H'0FFF'
TOSH EQU H'0FFE'
TOSL EQU H'0FFD'
STKPTR EQU H'0FFC'
PCLATU EQU H'0FFB'
PCLATH EQU H'0FFA'
PCL EQU H'0FF9'
TBLPTRU EQU H'0FF8'
TBLPTRH EQU H'0FF7'
TBLPTRL EQU H'0FF6'
TABLAT EQU H'0FF5'
PRODH EQU H'0FF4'
PRODL EQU H'0FF3'
INTCON EQU H'0FF2'
INTCON1 EQU H'0FF2'
INTCON2 EQU H'0FF1'
INTCON3 EQU H'0FF0'
INDF0 EQU H'0FEF'
POSTINC0 EQU H'0FEE'
POSTDEC0 EQU H'0FED'
PREINC0 EQU H'0FEC'
PLUSW0 EQU H'0FEB'
FSR0H EQU H'0FEA'
FSR0L EQU H'0FE9'
WREG EQU H'0FE8'
INDF1 EQU H'0FE7'
POSTINC1 EQU H'0FE6'
POSTDEC1 EQU H'0FE5'
PREINC1 EQU H'0FE4'
PLUSW1 EQU H'0FE3'
FSR1H EQU H'0FE2'
FSR1L EQU H'0FE1'
BSR EQU H'0FE0'
INDF2 EQU H'0FDF'
POSTINC2 EQU H'0FDE'
POSTDEC2 EQU H'0FDD'
PREINC2 EQU H'0FDC'
PLUSW2 EQU H'0FDB'
FSR2H EQU H'0FDA'
FSR2L EQU H'0FD9'
STATUS EQU H'0FD8'
TMR0H EQU H'0FD7'
TMR0L EQU H'0FD6'
T0CON EQU H'0FD5'
;RESERVED_0FD4 EQU H'0FD4'
OSCCON EQU H'0FD3'
LVDCON EQU H'0FD2'
WDTCON EQU H'0FD1'
RCON EQU H'0FD0'
TMR1H EQU H'0FCF'
TMR1L EQU H'0FCE'
T1CON EQU H'0FCD'
TMR2 EQU H'0FCC'
PR2 EQU H'0FCB'
T2CON EQU H'0FCA'
SSPBUF EQU H'0FC9'
SSPADD EQU H'0FC8'
SSPSTAT EQU H'0FC7'
SSPCON1 EQU H'0FC6'
SSPCON2 EQU H'0FC5'
ADRESH EQU H'0FC4'
ADRESL EQU H'0FC3'
ADCON0 EQU H'0FC2'
ADCON1 EQU H'0FC1'
ADCON2 EQU H'0FC0'
CCPR1H EQU H'0FBF'
CCPR1L EQU H'0FBE'
CCP1CON EQU H'0FBD'
CCPR2H EQU H'0FBC'
CCPR2L EQU H'0FBB'
CCP2CON EQU H'0FBA'
CCPR3H EQU H'0FB9'
CCPR3L EQU H'0FB8'
CCP3CON EQU H'0FB7'
;RESERVED_0FB6 EQU H'0FB6'
CVRCON EQU H'0FB5'
CMCON EQU H'0FB4'
TMR3H EQU H'0FB3'
TMR3L EQU H'0FB2'
T3CON EQU H'0FB1'
PSPCON EQU H'0FB0'
SPBRG1 EQU H'0FAF'
RCREG1 EQU H'0FAE'
TXREG1 EQU H'0FAD'
TXSTA1 EQU H'0FAC'
RCSTA1 EQU H'0FAB'
EEADRH EQU H'0FAA'
EEADR EQU H'0FA9'
EEDATA EQU H'0FA8'
EECON2 EQU H'0FA7'
EECON1 EQU H'0FA6'
IPR3 EQU H'0FA5'
PIR3 EQU H'0FA4'
PIE3 EQU H'0FA3'
IPR2 EQU H'0FA2'
PIR2 EQU H'0FA1'
PIE2 EQU H'0FA0'
IPR1 EQU H'0F9F'
PIR1 EQU H'0F9E'
PIE1 EQU H'0F9D'
MEMCON EQU H'0F9C'
;RESERVED_0F9B EQU H'0F9B'
TRISJ EQU H'0F9A'
TRISH EQU H'0F99'
TRISG EQU H'0F98'
TRISF EQU H'0F97'
TRISE EQU H'0F96'
TRISD EQU H'0F95'
TRISC EQU H'0F94'
TRISB EQU H'0F93'
TRISA EQU H'0F92'
LATJ EQU H'0F91'
LATH EQU H'0F90'
LATG EQU H'0F8F'
LATF EQU H'0F8E'
LATE EQU H'0F8D'
LATD EQU H'0F8C'
LATC EQU H'0F8B'
LATB EQU H'0F8A'
LATA EQU H'0F89'
PORTJ EQU H'0F88'
PORTH EQU H'0F87'
PORTG EQU H'0F86'
PORTF EQU H'0F85'
PORTE EQU H'0F84'
PORTD EQU H'0F83'
PORTC EQU H'0F82'
PORTB EQU H'0F81'
PORTA EQU H'0F80'
TMR4 EQU H'0F78'
PR4 EQU H'0F77'
T4CON EQU H'0F76'
CCPR4H EQU H'0F75'
CCPR4L EQU H'0F74'
CCP4CON EQU H'0F73'
CCPR5H EQU H'0F72'
CCPR5L EQU H'0F71'
CCP5CON EQU H'0F70'
SPBRG2 EQU H'0F6F'
RCREG2 EQU H'0F6E'
TXREG2 EQU H'0F6D'
TXSTA2 EQU H'0F6C'
RCSTA2 EQU H'0F6B'
;----- STKPTR Bits --------------------------------------------------------
STKOVF EQU H'0007'
STKUNF EQU H'0006'
;----- INTCON Bits --------------------------------------------------------
GIE EQU H'0007'
GIEH EQU H'0007'
PEIE EQU H'0006'
GIEL EQU H'0006'
TMR0IE EQU H'0005'
T0IE EQU H'0005' ; For backward compatibility
INT0IE EQU H'0004'
INT0E EQU H'0004' ; For backward compatibility
RBIE EQU H'0003'
TMR0IF EQU H'0002'
T0IF EQU H'0002' ; For backward compatibility
INT0IF EQU H'0001'
INT0F EQU H'0001' ; For backward compatibility
RBIF EQU H'0000'
;----- INTCON2 Bits --------------------------------------------------------
NOT_RBPU EQU H'0007'
RBPU EQU H'0007'
INTEDG0 EQU H'0006'
INTEDG1 EQU H'0005'
INTEDG2 EQU H'0004'
INTEDG3 EQU H'0003'
TMR0IP EQU H'0002'
T0IP EQU H'0002' ; For compatibility with T0IE and T0IF
INT3P EQU H'0001'
RBIP EQU H'0000'
;----- INTCON3 Bits --------------------------------------------------------
INT2IP EQU H'0007'
INT1IP EQU H'0006'
INT3IE EQU H'0005'
INT2IE EQU H'0004'
INT1IE EQU H'0003'
INT3IF EQU H'0002'
INT2IF EQU H'0001'
INT1IF EQU H'0000'
;----- STATUS Bits --------------------------------------------------------
N EQU H'0004'
OV EQU H'0003'
Z EQU H'0002'
DC EQU H'0001'
C EQU H'0000'
;----- T0CON Bits ---------------------------------------------------------
TMR0ON EQU H'0007'
T08BIT EQU H'0006'
T0CS EQU H'0005'
T0SE EQU H'0004'
PSA EQU H'0003'
T0PS2 EQU H'0002'
T0PS1 EQU H'0001'
T0PS0 EQU H'0000'
;----- OSCON Bits ---------------------------------------------------------
SCS EQU H'0000'
;----- LVDCON Bits ---------------------------------------------------------
IRVST EQU H'0005'
LVDEN EQU H'0004'
LVDL3 EQU H'0003'
LVDL2 EQU H'0002'
LVDL1 EQU H'0001'
LVDL0 EQU H'0000'
;----- WDTCON Bits ---------------------------------------------------------
SWDTE EQU H'0000'
;----- RCON Bits -----------------------------------------------------------
IPEN EQU H'0007'
NOT_RI EQU H'0004'
RI EQU H'0004'
NOT_TO EQU H'0003'
TO EQU H'0003'
NOT_PD EQU H'0002'
PD EQU H'0002'
NOT_POR EQU H'0001'
POR EQU H'0001'
NOT_BOR EQU H'0000'
BOR EQU H'0000'
;----- T1CON Bits ---------------------------------------------------------
RD16 EQU H'0007'
T1CKPS1 EQU H'0005'
T1CKPS0 EQU H'0004'
T1OSCEN EQU H'0003'
NOT_T1SYNC EQU H'0002'
T1SYNC EQU H'0002'
T1INSYNC EQU H'0002' ; For backward compatibility
TMR1CS EQU H'0001'
TMR1ON EQU H'0000'
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