📄 main_u4.c
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/// Main_u4.c
//
//// Transmitter Unit ////
//
// 03/24/07 CAN Unit Tests 4
//
//// dsPIC30F4011 Motor Controller Notes
/// Pin Assignments
// /------------------------/
// 1-| !MCLR AVdd |-40
// 2-| AN0/CN2/RB0 AVss |-39
// 3-| AN1/CN3/RB1 RE0/PWM1L |-38
// 4-| AN2/SS1/RB2 RE1/PWM1H |-37
// 5-| INDX/RB3 RE2/PWM2L |-36
// 6-| QEA/RB4 RE3/PWM2H |-35
// 7-| QEB/RB5 RE4/PWM3L |-34
// 8-| AN6/RB6 RE5/PWM3H |-33
// 9-| AN7/RB7 Vdd |-32
// 10-| AN8/RB8 Vss |-31
// 11-| Vdd C1RX |-30
// 12-| Vss C1TX |-29
// 13-| --- U2RX |-28
// 14-| RC15 U2TX |-27
// 15-| U1TX/RC13 PGC |-26
// 16-| U1RX/RC14 PGD |-25
// 17-| INT0/RE8 RF6 |-24
// 18-| INT2/RD1 RD0/INT1 |-23
// 19-| RD3 RD2 |-22
// 20-| Vss Vdd |-21
// /------------------------/
#include "p30f4011.h"
#include "can.h"
// Configuration Fuse Settings
// Clock Switch, Fail Safe
// Primary Oscillator = Fast RC @ PLLx16
// Watch Dog OFF
// Enable MCLR reset pin and turn off the power-up timers.
// Disable Code Protection
_FOSC(CSW_FSCM_OFF & FRC_PLL16);
_FWDT(WDT_OFF);
_FBORPOR(MCLR_EN & PWRT_OFF);
_FGS(CODE_PROT_OFF);
void PIO_Init()
{
/// Initialize Port I/O
// PORTB are Analog Input by Default
// _ADON = 0; Turn Off A/D Peripheral
// _PCFGn = 0/1; Analog = 0, Digital = 1
//TRISBbits.TRISB0 = 1;
//_PCFG0 = 1;
//TRISBbits.TRISB1 = 1;
//_PCFG1 = 1;
//TRISBbits.TRISB2 = 1;
//_PCFG2 = 1;
TRISBbits.TRISB3 = 1; // QE Index
_PCFG3 = 1;
TRISBbits.TRISB4 = 1; // QEA
_PCFG4 = 1;
TRISBbits.TRISB5 = 1; // QEB
_PCFG5 = 1;
TRISBbits.TRISB6 = 1; // Button
_PCFG6 = 1;
TRISBbits.TRISB7 = 1; // Button
_PCFG7 = 1;
//TRISBbits.TRISB8 = 1;
//_PCFG8 = 1;
TRISCbits.TRISC13 = 1; // Button
TRISCbits.TRISC14 = 0; // LED
LATCbits.LATC14 = 0;
TRISCbits.TRISC15 = 1; // Button
TRISDbits.TRISD0 = 1; // INT1
TRISDbits.TRISD1 = 1; // INT2
TRISDbits.TRISD2 = 0; // LED
LATDbits.LATD2 = 0;
TRISDbits.TRISD3 = 0; // LED
LATDbits.LATD3 = 0;
TRISEbits.TRISE0 = 0; // PWM
LATEbits.LATE0 = 0;
TRISEbits.TRISE1 = 0; // PWM
LATEbits.LATE1 = 0;
TRISEbits.TRISE2 = 0; // PWM
LATEbits.LATE2 = 0;
TRISEbits.TRISE3 = 0; // PWM
LATEbits.LATE3 = 0;
TRISEbits.TRISE4 = 0; // PWM
LATEbits.LATE4 = 0;
TRISEbits.TRISE5 = 0; // PWM
LATEbits.LATE5 = 0;
TRISEbits.TRISE8 = 1; // INT0
TRISFbits.TRISF6 = 0; // LED
LATFbits.LATF6 = 0;
}
void CAN_Init()
{
CAN1SetOperationMode(CAN_IDLE_CON
& CAN_MASTERCLOCK_1
& CAN_REQ_OPERMODE_CONFIG
& CAN_CAPTURE_DIS);
while (C1CTRLbits.OPMODE <= 3)
{
LATDbits.LATD2 = !PORTDbits.RD2;
}
// C1CFG1 Register
// UNUSED = uuuu uuuu .... ....
// SJW = .... .... 11.. .... = 0x00C0 Synch Jump Width (1-4 Tq for Resynch)
// BRP = .... .... ..11 1111 = 0x003F Baud Rate Prescaler (slowest!)
// -------------------
// C1CFG1 = 0000 0000 1111 1111 = 0x00FF Tq = 128/Fcan = 4.34028e-06s (230.4kHz)
////C1CFG1 = 0x00FF;
// C1CFG2 Register
// UNUSED = u.uu u... .... ....
// WAKFIL = .0.. .... .... .... Wakeup Interrupt (disable)
// SEG2PH = .... .111 .... .... Phase Buffer Segment 1-8 Tq
// SEG2PHTS = .... .... 0... .... Segment Phase Time Select (0 = Max)
// SAM = .... .... .1.. .... Samples (0 = 1, 1 = 3 samples)
// SEG1PH = .... .... ..11 1... Phase Buffer Segment 1-8 Tq
// PRSEG = .... .... .... .111 Propagation Segment 1-8 Tq
// -------------------
// C1CFG2 = 0000 0111 0111 1111 = 0x077F
////C1CFG2 = 0x077F;
// The above settings result in *NBT
// SJW = 1 Tq (always 1 Tq)
// PRSEG = 8 Tq
// PHSEG1 = 8 Tq
// PHSEG2 = 8 Tq
// -------------
// NBT = 25 Tq
//
// Tq = 2*(BRP + 1)/Fcy = 4.34028e-06s
// kbps = 1 / (Tq * NBT) / 1000 = 1 / (4.34028e-06 * 25) / 1000 = 9.216 kbps
CAN1Initialize(CAN_SYNC_JUMP_WIDTH4 & CAN_BAUD_PRE_SCALE(0x3F),
CAN_WAKEUP_BY_FILTER_DIS
& CAN_PHASE_SEG2_TQ(8)
& CAN_PHASE_SEG1_TQ(8)
& CAN_PROPAGATIONTIME_SEG_TQ(8)
& CAN_SEG2_FREE_PROG
& CAN_SAMPLE3TIMES);
/// Set Up Receiving
// C1RX0CON Register
// UNUSED uuuu uuuu .uuu ....
// RXFUL .... .... 0... .... 1=Valid Received Message, 0=Clear After Read
// RXRTRRO .... .... .... 0... 1=Remote Transfer Request Received
// DBEN .... .... .... .0.. 1=RB0 Overflow writes to RB1
// JTOFF .... .... .... ..0. Jump Table Offset
// FILHIT0 .... .... .... ...0 0=Acceptance Filter 0: RXF0, 1=RXF1 (Read Only)
C1RX0CON = 0x0000;
// C1RX2CON Register
// UNUSED uuuu uuuu .uuu ....
// RXFUL .... .... 0... .... 1=Valid Received Message, 0=Clear After Read
// RXRTRRO .... .... .... 0... 1=Remote Transfer Request Received
// FILHIT .... .... .... .000 Acceptance Filter 000=RXF0 to 101=RXF5 (Read Only) RXF0, RXF1 with DBEN=1
C1RX1CON = 0x0000;
// C1RXnSID Receive Buffer Standard Identifier Register
// UNUSED uuu. .... .... ....
// SID ...1 0101 0101 01.. Standard Indentifier, 11 bits
// SRR .... .... .... ..0. Substitute Remote Request; 1=Remote Trsnafer Requested
// RXIDE .... .... .... ...0 Extended Identifier; 1=Extended ID, 0=Standard ID
// Note: We don't really need to set C1RXnSID or C1RXnEID. This is the RECEIVED message's SID and EID
// However, the registers are R/W, so we can clear them (or set them anyway we like)
C1RX0SID = 0x0000; // 0x1554;
C1RX1SID = 0x0000; // 0x1554;
// C1RXnEID Receive Buffer Extended Identifier Register
// UNUSED uuuu .... .... ....
// EID<17:6> .... 0000 0000 0000 Extended Identifier, high 12 bits
C1RX0EID = 0x0000;
C1RX1EID = 0x0000;
// RX Data Buffers
C1RX0B1 = 0x0000;
C1RX0B2 = 0x0000;
C1RX0B3 = 0x0000;
C1RX0B4 = 0x0000;
C1RX1B1 = 0x0000;
C1RX1B2 = 0x0000;
C1RX1B3 = 0x0000;
C1RX1B4 = 0x0000;
// C1RXnDLC Receive Buffer Data Length Control and EID low 6 bits
// EID<5:0> 0000 00.. .... .... EID low 6 bits
// RXRTR .... ..0. .... .... Receive Remote Transmission Request
// RB1, RB0 .... ...0 0... .... Reserved CAN bits = 0
// DLC<3:0> .... .... .... 0000 Data Length Code: 0000 to 1000? 0 to 8? or DBEN 000 to 1111?
C1RX0DLC = 0x0000;
C1RX1DLC = 0x0000;
// C1RXFnSID Standard Identifier Message Acceptance Filters
// UNUSED 000. .... .... ..0.
// SID ...1 0101 0101 01.. Standard Identifier, 11 bits
// EXIDE .... .... .... ...0 Extended Identifier Filter Enable
C1RXF0SID = 0x1554;
C1RXF1SID = 0x1554;
C1RXF2SID = 0x1554;
C1RXF3SID = 0x1554;
C1RXF4SID = 0x1554;
C1RXF5SID = 0x1554;
// C1RXFnEIDH Extended Identifier Message Acceptance Filters, EID<17:6> High Bits
// UNUSED 0000 .... .... .... ....
// EID<17:6> .... 0000 0000 0000 0000 EID<17:6> high 12 bits
C1RXF0EIDH = 0x0000;
C1RXF1EIDH = 0x0000;
C1RXF2EIDH = 0x0000;
C1RXF3EIDH = 0x0000;
C1RXF4EIDH = 0x0000;
C1RXF5EIDH = 0x0000;
// C1RXFnEIDL Extended Identifier Message Acceptance Filters, EID<5:0> Low Bits
// UNUSED .... ..00 0000 0000
// EID<5:0> 0000 00.. .... .... EID<5:0> low 6 bits
C1RXF0EIDL = 0x0000;
C1RXF1EIDL = 0x0000;
C1RXF2EIDL = 0x0000;
C1RXF3EIDL = 0x0000;
C1RXF4EIDL = 0x0000;
C1RXF5EIDL = 0x0000;
// CAN1SetFilter(0, CAN_FILTER_SID(0x0555) & CAN_RX_EID_DIS,
// CAN_FILTER_EID(0x00000000));
// C1RXMnSID Standard Identifier Acceptance Mask
// UNUSED 000. .... .... ..0.
// SID ...0 0000 0000 00.. Standard Identifier, 11 bits (1=ANDed, 0=ORed)
// MIDE .... .... .... ...0 1=Match according to Filter EXIDE
C1RXM0SID = 0x0000;
C1RXM1SID = 0x0000;
// C1RXMnEIDH Extended Identifier Message Acceptance Mask, EID<17:6> High Bits
// UNUSED 0000 .... .... .... ....
// EID<17:6> .... 0000 0000 0000 0000 EID<17:6> high 12 bits
C1RXM0EIDH = 0x0000;
C1RXM1EIDH = 0x0000;
// C1RXMnEIDL Extended Identifier Message Acceptance Mask, EID<5:0> Low Bits
// UNUSED .... ..00 0000 0000
// EID<5:0> 0000 00.. .... .... EID<5:0> low 6 bits
C1RXM0EIDL = 0x0000;
C1RXM1EIDL = 0x0000;
// CAN1SetMask(0, CAN_MASK_SID(0x0000) & CAN_MATCH_FILTER_TYPE,
// CAN_MASK_EID(0x00000000));
CAN1SetRXMode(0, CAN_RXFUL_CLEAR & CAN_BUF0_DBLBUFFER_EN);
C1EC = 0x0000;
C1INTF = 0;
IFS1bits.C1IF = 0; // Clear the CAN1 Interrupt Flag bit
C1INTE = 0x00FF; // Enable all interrupt sources
IEC1bits.C1IE = 1;
INTCON1bits.NSTDIS = 1;
CAN1SetOperationMode(CAN_IDLE_CON
& CAN_CAPTURE_DIS
& CAN_MASTERCLOCK_1
& CAN_REQ_OPERMODE_NOR);
// verify normal mode has been entered
while(C1CTRLbits.OPMODE != 0) // != 2 for CAN_REQ_OPERMODE_LOOPBK
{
LATDbits.LATD2 = !PORTDbits.RD2;
}
LATDbits.LATD2 = 0;
}
void TX0_Test()
{
// C1TX0CON Register
// UNUSED uuuu uuuu u... .u..
// TXABT .... .... .0.. .... Message was Aborted. Cleared by TXREQ=1
// TXLARB .... .... ..0. .... Lost Arbitration. Cleared by TXREQ=1
// TXERR .... .... ...0 .... Bus Error on TX. Cleared by TXREQ=1
// TXREQ .... .... .... 1... TX Send Request Cleared after Sent
// TXPRI .... .... .... ..11 11 Highest Priority 00 Lowest Priority
C1TX0CON = 0x0003; // High priority
// C1TX0SID Register
// UNUSED .... .uuu .... ....
// SID 1010 1... 0101 01.. Standard Identifier, 11 Bits
// SRR .... .... .... ..0. Substitute Remote Request Control
// TXIDE .... .... .... ...0 Transmit Extended Identifier
C1TX0SID = 0xA854; // SID = 10101010101 = 0x0555
// C1TX0EID Register
// UNUSED .... uuuu .... ....
// EID 0000 .... 0000 0000 Extended Identifier, 12 of 18 bits
C1TX0EID = 0x0000; // EID = 0000000000000000000 (0x00000)
// C1TX0DLC Register
// UNUSED .... .... .... .uuu
// EID 0000 00.. .... .... Extended Identifier, last 6 of 18 bits
// TXRTR .... ..0. .... .... Remote Transmission Request
// TXRBn .... ...0 0... .... TXRB0 and TXRB1 must be set to 0 (Reserved bits)
// DLC .... .... .111 1... Data Length Code Bits 1000 = 8 max? (not documented!)
C1TX0DLC = 0x0040; //.100 0
C1TX0B1 = 0x5555; //0x494D; // OutData3[0]; "I","M" watch the byte order!
C1TX0B2 = 0x5555; //0x5243; // OutData3[1]; "R","C"
C1TX0B3 = 0x5555; //0x434F; // OutData3[2]; "C","O"
C1TX0B4 = 0x5555; //0x4948; // OutData3[3]; "I","H" 0x50 = "P"
// CAN1SetTXMode(0, CAN_TX_STOP_REQ & CAN_TX_PRIORITY_HIGH);
// Enable transmission
C1TX0CONbits.TXREQ = 1;
while (C1TX0CONbits.TXREQ == 1)
{
LATDbits.LATD2 = !PORTDbits.RD2;
}
LATDbits.LATD2 = 1;
}
int main(void)
{
PIO_Init();
CAN_Init();
LATDbits.LATD2 = 0;
//TX0_Test(); // Comment out for Receiver Unit
int working = 1;
while (working == 1)
{
LATDbits.LATD2 = !PORTDbits.RD2;
}
return 0;
}
void __attribute__((__interrupt__)) _C1Interrupt(void)
{
/// CAN Interrupt Service Routine
// Set Event Processing Flags so we can immediately clear Interrupt Flags
// The outer Main Process Loop will then handle these events at its convenience
if (C1INTFbits.IVRIF)
{
C1INTFbits.IVRIF = 0;
LATFbits.LATF6 = 1;
}
if (C1INTFbits.WAKIF)
{
C1INTFbits.WAKIF = 0;
}
if (C1INTFbits.ERRIF)
{
C1INTFbits.ERRIF = 0;
LATDbits.LATD3 = 1;
}
if (C1INTFbits.TX2IF)
{
C1INTFbits.TX2IF = 0;
}
if (C1INTFbits.TX1IF)
{
C1INTFbits.TX1IF = 0;
}
if (C1INTFbits.TX0IF)
{
C1INTFbits.TX0IF = 0;
}
if (C1INTFbits.RX1IF)
{
// = C1RX1B1;
// = C1RX1B2;
// = C1RX1B3;
// = C1RX1B4;
C1RX1CONbits.RXFUL = 0;
C1INTFbits.RX1IF = 0;
LATCbits.LATC14 = 1;
}
if (C1INTFbits.RX0IF)
{
// C1RX0B1;
// C1RX0B2;
// C1RX0B3;
// C1RX0B4;
C1RX0CONbits.RXFUL = 0;
C1INTFbits.RX0IF = 0;
LATCbits.LATC14 = 1;
}
if (C1INTFbits.RX0OVR)
{
// Receive Buffer 0 Overflowed bit
C1INTFbits.RX0OVR = 0;
}
if (C1INTFbits.RX1OVR)
{
// Receive Buffer 1 Overflowed bit
C1INTFbits.RX1OVR = 0;
}
if (C1INTFbits.TXBO)
{
// Transmitter in Error State, Bus Off bit
C1INTFbits.TXBO = 0;
}
if (C1INTFbits.TXEP)
{
// Transmitter in Error State, Bus Passive bit
C1INTFbits.TXEP = 0;
LATCbits.LATC14 = 1;
}
if (C1INTFbits.RXEP)
{
// Receiver in Error State, Bus Passive bit
C1INTFbits.RXEP = 0;
LATCbits.LATC14 = 1;
}
if (C1INTFbits.TXWAR)
{
// Transmitter in Error State, Warning bit
C1INTFbits.TXWAR = 0;
}
if (C1INTFbits.RXWAR)
{
// Receiver in Error State, Warning bit
C1INTFbits.RXWAR = 0;
}
if (C1INTFbits.EWARN)
{
// Transmitter or Receiver is in Error State, Warning bit
C1INTFbits.EWARN = 0;
}
IFS1bits.C1IF = 0;
C1INTF = 0x0000;
}
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