cc2500.inc

cc2500的接收程式,有需的朋友可以参考一下

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;F: File Name:	cc2500.inc.
;F: Build Date:	2006/11/3.
;F:
;F:
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;Define the Command Strobes Register.
CMD_CC2500_SRES		equ		30h; reset chip.
CMD_CC2500_SFSTXON	equ		31h; Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1). If in RX (with CCA):
					   ; Go to a wait state where only the synthesizer is running (for quick RX / TX turnaround).	
CMD_CC2500_SXOFF	equ		32h; Turn off crystal oscillator.
CMD_CC2500_SCAL		equ		33h; Calibrate frequency synthesizer and turn it off (enables quick start).
CMD_CC2500_SRX		equ		34h; Enable RX. Perform calibration first if coming from IDLE and MCSM0.FS_AUTOCAL=1.
CMD_CC2500_STX		equ		35h; In IDLE state: Enable TX. Perform calibration first if MCSM0.FS_AUTOCAL=1.
					   ; If in RX state and CCA is enabled: Only go to TX if channel is clear.
CMD_CC2500_SIDLE	equ		36h; Exit RX / TX, turn off frequency synthesizer and exit Wake-On-Radio mode if applicable.
CMD_CC2500_SAFC		equ		37h; Perform AFC adjustment of the frequency synthesizer as outlined in section 23.1.
CMD_CC2500_SWOR		equ		38h; Start automatic RX polling sequence (Wake-on-Radio) as described in section 28.5.
CMD_CC2500_SPWD		equ		39h; Enter power down mode when CSn goes high.
CMD_CC2500_SFRX		equ		3ah; Flush the RX FIFO buffer.
CMD_CC2500_SFTX		equ		3bh; Flush the TX FIFO buffer.
CMD_CC2500_SWORRST	equ		3ch; Reset real time clock.
CMD_CC2500_SNOP		equ		3dh; No operation. May be used to pad strobe commands to two bytes for simpler software.
DMD_CC2500_FIFO		equ		3fh; 

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;Define the status register.
STS_CC2500_PARTNUM	equ		0f0h;Part number for CC2500.
STS_CC2500_VERSION	equ		0f1h;Current version number.
STS_CC2500_FREQEST	equ		0f2h;Frequency Offset Estimate.
STS_CC2500_LQI		equ		0f3h;Demodulator estimate for Link Quality.
STS_CC2500_RSSI		equ		0f4h;Received signal strength indication.
STS_CC2500_MARCSTATE	equ		0f5h;Control state machine state.
STS_CC2500_WORTIME1	equ		0f6h;High byte of WOR timer.
STS_CC2500_WORTIME0	equ		0f7h;Low byte of WOR timer.
STS_CC2500_PKTSTATUS	equ		0f8h;Current GDOx status and packet status.
STS_CC2500_VCO_VC_DAC	equ		0f9h;Current setting from PLL calibration module.
STS_CC2500_TXBYTES	equ		0fah;Underflow and number of bytes in the TX FIFO.
STS_CC2500_RXBYTES	equ		0fbh;Overflow and number of bytes in the RX FIFO.


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;Define the Configuration Registers.
CFG_CC2500_IOCFG2	equ		00h; GDO2 output pin configuration.
CFG_CC2500_IOCFG1	equ		01h; GDO1 output pin configuration.
CFG_CC2500_IOCFG0	equ		02h; GDO0 output pin configuration.
CFG_CC2500_FIFOTHR	equ		03h; RX FIFO and TX FIFO thresholds.
CFG_CC2500_SYNC1	equ		04h; Sync word, high byte.
CFG_CC2500_SYNC0	equ		05h; Sync word, low byte.
CFG_CC2500_PKTLEN	equ		06h; Packet length.
CFG_CC2500_PKTCTRL1	equ		07h; Packet automation control.
CFG_CC2500_PKTCTRL0	equ		08h; Packet automation control.
CFG_CC2500_ADDR		equ		09h; Device address.
CFG_CC2500_CHANNR	equ		0ah; Channel number.
CFG_CC2500_FSCTRL1	equ		0bh; Frequency synthesizer control.
CFG_CC2500_FSCTRL0	equ		0ch; Frequency synthesizer control.
CFG_CC2500_FREQ2	equ		0dh; Frequency control word, high byte.
CFG_CC2500_FREQ1	equ		0eh; Frequency control word, middle byte.
CFG_CC2500_FREQ0	equ		0fh; Frequency control word, low byte.
CFG_CC2500_MDMCFG4	equ		10h; Modem configuration.
CFG_CC2500_MDMCFG3	equ		11h; Modem configuration.
CFG_CC2500_MDMCFG2	equ		12h; Modem configuration.
CFG_CC2500_MDMCFG1	equ		13h; Modem configuration.
CFG_CC2500_MDMCFG0	equ		14h; Modem configuration.
CFG_CC2500_DEVIATN	equ		15h; Modem deviation setting.
CFG_CC2500_MCSM2	equ		16h; Main Radio Control State Machine configuration.
CFG_CC2500_MCSM1	equ		17h; Main Radio Control State Machine configuration.
CFG_CC2500_MCSM0	equ		18h; Main Radio Control State Machine configuration.
CFG_CC2500_FOCCFG	equ		19h; Frequency Offset Compensation configuration.
CFG_CC2500_BSCFG	equ		1ah; Bit Synchronization configuration.
CFG_CC2500_AGCTRL2	equ		1bh; AGC control.
CFG_CC2500_AGCTRL1	equ		1ch; AGC control.
CFG_CC2500_AGCTRL0	equ		1dh; AGC control.
CFG_CC2500_WOREVT1	equ		1eh; High byte Event 0 timeout.
CFG_CC2500_WOREVT0	equ		1fh; Low byte Event 0 timeout.
CFG_CC2500_WORCTRL	equ		20h; Wake On Radio control.
CFG_CC2500_FREND1	equ		21h; Front end RX configuration.
CFG_CC2500_FREND0	equ		22h; Front end TX configuration.
CFG_CC2500_FSCAL3	equ		23h; Frequency synthesizer calibration.
CFG_CC2500_FSCAL2	equ		24h; Frequency synthesizer calibration.
CFG_CC2500_FSCAL1	equ		25h; Frequency synthesizer calibration.
CFG_CC2500_FSCAL0	equ		26h; Frequency synthesizer calibration.
CFG_CC2500_RCCTRL1	equ		27h; RC oscillator configuration.
CFG_CC2500_RCCTRL0	equ		28h; RC oscillator configuration.
CFG_CC2500_FSTEST	equ		29h; Frequency synthesizer calibration control.
CFG_CC2500_PTEST	equ		2ah; Production test.
CFG_CC2500_AGCTEST	equ		2bh; AGC test.
CFG_CC2500_TEST2	equ		2ch; Various test settings.
CFG_CC2500_TEST1	equ		2dh; Various test settings.
CFG_CC2500_TEST0	equ		2eh; Various test settings.

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D_SingleByte		equ		00h; The single byte write/read.
D_Burst			equ		40h; The burst write/read.