📄 recorderrx.lst
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00001 ;*************************************************************************
00002 ;P: Project Name: recorderRX.
00003 ;P: Build Date: 2006/11/6.
00004 ;P: Version: v1.0
00005 ;P:
00006 ;*************************************************************************
00007 .CHIP TM8706
00008 .data
00009 org 000h;
00010 R_TempAcc dn 1;
00011 R_TempStatus dn 1;
0012
00013 R_CurrentMode dn 1;
14 0032 D_PlayMode equ 0;
15 0033 D_RecorderMode equ 1;
0016
00017 R_KeyWakeDel dn 1;
18 000A D_KeyWakeDel equ 10; 10 x 15.625ms=156.25ms.
0019
0020
00021 R_DelALMLo dn 2;
22 0039 R_DelALMHi equ R_DelALMLo+1;
23 003A D_DelALMLo equ 30%16;
24 003B D_DelALMHi equ 30/16;
0025
00026 R_ParLow dn 2;
27 003F R_ParHigh equ R_ParLow+1;
0028
00029 R_Delay dn 1;
0030
00031 R_cc2500Count dn 1;
0032
00033 R_DelChk dn 1;
0034
00035 R_TempWrk1 dn 1;
0036
00037 R_CountTimeLow dn 2;
38 00F6 R_CountTimeHigh equ R_CountTimeLow+1;
0039
0040
00041 R_ReadAddrLow dn 2;
42 00FA R_ReadAddrHigh equ R_ReadAddrLow+1;
0043
00044 ;=============================================================
00045 ;=============================================================
00046 org 070h;
00047 R_WrkReg1 dn 1;
0048
00049 R_IntWrk dn 1;
0050
00051 R_Flags1 dn 1;
52 0003 B_HaltNormal equ 0001b; 0: normal mode. 1: halt mode.
53 0004 B_Recording equ 0010b;
54 0005 B_Playing equ 0100b;
55 0006 B_ALMStart equ 1000b;
0056
00057 R_Flags2 dn 1;
58 0009 B_RFCmd equ 0001b;
0059
00060 R_KeyVal dn 1;
61 000C D_SelKey equ 1;
62 000D D_RecorderKey equ 2;
63 000E D_PlayKey equ 4;
0064
00065 R_KeyStep dn 1;
66 0011 D_DelStep equ 1;
67 0012 D_WaitStep equ 2;
68 0013 D_RelaseStep equ 3;
0069
00070 R_CurrentMusic dn 1; 0~3.
0071
0072
00073 R_RecCommandLow dn 2;
74 0019 R_RecCommandHigh equ R_RecCommandLow+1;
75 001A D_ScanCommand equ 0ffh;
76 001B D_K1Command equ 01h;
77 001C D_K2Command equ 02h;
78 001D D_K3Command equ 04h;
79 001E D_K4Command equ 08h;
00080 ;=============================================================
00081 ;=============================================================
82 0021 R_LED1Buf equ 1;
83 0022 R_LED2Buf equ 2;
84 0023 R_LED3Buf equ 3;
85 0024 R_LED4Buf equ 4;
86 0025 R_RFLEDBuf equ 5;
87 0026 R_PlayLEDBuf equ 6;
88 0027 R_RecLEDBuf equ 7;
89 0028 R_LoBatLEDBuf equ 8;
90 0029 R_CSnBuf equ 9;
91 002A R_REnBuf equ 10;
92 002B R_CEnBuf equ 11;
93 002C R_M1Buf equ 12;
94 002D R_M2Buf equ 13;
95 002E R_M3Buf equ 14;
96 000F R_M4Buf equ 15;
97 0010 R_SCLKBuf equ 16;
98 0011 R_VoicePWBuf equ 17;
0099
100 0040 SEG1 equ 0001b;
101 0001 SEG2 equ 0001b;
102 0001 SEG3 equ 0001b;
103 0001 SEG4 equ 0001b;
104 0001 SEG5 equ 0001b;
105 0001 SEG6 equ 0001b;
106 0001 SEG7 equ 0001b;
107 0001 SEG8 equ 0001b;
108 0001 SEG9 equ 0001b;
109 0001 SEG10 equ 0001b;
110 0001 SEG11 equ 0001b;
111 0001 SEG12 equ 0001b;
112 0001 SEG13 equ 0001b;
113 0001 SEG14 equ 0001b;
114 0001 SEG15 equ 0001b;
115 0001 SEG16 equ 0001b;
0116
0117
118 0001 IOA1 equ 0001b;
119 0002 IOA2 equ 0010b;
120 0004 IOA3 equ 0100b;
121 0008 IOA4 equ 1000b;
0122
123 0001 IOB1 equ 0001b;
124 0002 IOB2 equ 0010b;
125 0004 IOB3 equ 0100b;
126 0008 IOB4 equ 1000b;
0127
0128
129 0001 IOC1 equ 0001b;
130 0002 IOC2 equ 0010b;
131 0004 IOC3 equ 0100b;
132 0008 IOC4 equ 1000b;
0133
134 0001 IOD1 equ 0001b;
135 0002 IOD2 equ 0010b;
136 0004 IOD3 equ 0100b;
137 0008 IOD4 equ 1000b;
0138
139 0001 D_CSn equ SEG9;
140 0001 D_GDO0 equ IOB1;
141 0001 D_SO equ IOA1;
142 0001 D_SCLK equ SEG16;
143 0008 D_SI equ IOC4;
144 0002 D_BUSYn equ IOA2;
145 0004 D_LowBat equ IOA3;
146 0008 D_Strobe equ IOA4;
147 0002 D_END equ IOB2;
148 0001 D_KeySel equ IOC1;
149 0002 D_KeyRecord equ IOC2;
150 0004 D_KeyPlay equ IOC3;
0151
152 0001 D_LED1 equ SEG1;
153 0001 D_LED2 equ SEG2;
154 0001 D_LED3 equ SEG3;
155 0001 D_LED4 equ SEG4;
156 0001 D_RFLED equ SEG5;
157 0001 D_PlayLED equ SEG6;
158 0001 D_RecorderLED equ SEG7;
159 0001 D_LowBatLED equ SEG8;
160 0001 D_REn equ SEG10;
161 0001 D_CEn equ SEG11;
162 0001 D_M1 equ SEG12;
163 0001 D_M2 equ SEG13;
164 0001 D_M3 equ SEG14;
165 0001 D_M4 equ SEG15;
0166
167 0008 D_PreIntEnable equ 00001000b; Enable the pre-divider interrupt.
168 0002 D_Tmr1IntEnable equ 00000010b; Enable the timer1 interrupt.
169 0004 D_ExtIntEnable equ 00000100b; Enable the Ext-INT interrupt.
0170
0171 .INCLUDE cc2500.inc (D:\MyWorks\RFPj\code\code12_11Before\RX\CC2500.INC)
00001+ ;****************************************************************************
00002+ ;F: File Name: cc2500.inc.
00003+ ;F: Build Date: 2006/11/3.
00004+ ;F:
00005+ ;F:
00006+ ;****************************************************************************
0007+
00008+ ;=======================================================
00009+ ;=======================================================
00010+ ;Define the Command Strobes Register.
11 0030 CMD_CC2500_SRES equ 30h; reset chip.
12 0031 CMD_CC2500_SFSTXON equ 31h; Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1). If in RX (with CCA):
00013+ ; Go to a wait state where only the synthesizer is running (for quick RX / TX turnaround).
14 0032 CMD_CC2500_SXOFF equ 32h; Turn off crystal oscillator.
15 0033 CMD_CC2500_SCAL equ 33h; Calibrate frequency synthesizer and turn it off (enables quick start).
16 0034 CMD_CC2500_SRX equ 34h; Enable RX. Perform calibration first if coming from IDLE and MCSM0.FS_AUTOCAL=1.
17 0035 CMD_CC2500_STX equ 35h; In IDLE state: Enable TX. Perform calibration first if MCSM0.FS_AUTOCAL=1.
00018+ ; If in RX state and CCA is enabled: Only go to TX if channel is clear.
19 0036 CMD_CC2500_SIDLE equ 36h; Exit RX / TX, turn off frequency synthesizer and exit Wake-On-Radio mode if applicable.
20 0037 CMD_CC2500_SAFC equ 37h; Perform AFC adjustment of the frequency synthesizer as outlined in section 23.1.
21 0038 CMD_CC2500_SWOR equ 38h; Start automatic RX polling sequence (Wake-on-Radio) as described in section 28.5.
22 0039 CMD_CC2500_SPWD equ 39h; Enter power down mode when CSn goes high.
23 003A CMD_CC2500_SFRX equ 3ah; Flush the RX FIFO buffer.
24 003B CMD_CC2500_SFTX equ 3bh; Flush the TX FIFO buffer.
25 003C CMD_CC2500_SWORRST equ 3ch; Reset real time clock.
26 003D CMD_CC2500_SNOP equ 3dh; No operation. May be used to pad strobe commands to two bytes for simpler software.
27 003F DMD_CC2500_FIFO equ 3fh;
0028+
00029+ ;=========================================================
00030+ ;=========================================================
00031+ ;Define the status register.
32 00F0 STS_CC2500_PARTNUM equ 0f0h;Part number for CC2500.
33 00F1 STS_CC2500_VERSION equ 0f1h;Current version number.
34 00F2 STS_CC2500_FREQEST equ 0f2h;Frequency Offset Estimate.
35 00F3 STS_CC2500_LQI equ 0f3h;Demodulator estimate for Link Quality.
36 00F4 STS_CC2500_RSSI equ 0f4h;Received signal strength indication.
37 00F5 STS_CC2500_MARCSTATE equ 0f5h;Control state machine state.
38 00F6 STS_CC2500_WORTIME1 equ 0f6h;High byte of WOR timer.
39 00F7 STS_CC2500_WORTIME0 equ 0f7h;Low byte of WOR timer.
40 00F8 STS_CC2500_PKTSTATUS equ 0f8h;Current GDOx status and packet status.
41 00F9 STS_CC2500_VCO_VC_DAC equ 0f9h;Current setting from PLL calibration module.
42 00FA STS_CC2500_TXBYTES equ 0fah;Underflow and number of bytes in the TX FIFO.
43 00FB STS_CC2500_RXBYTES equ 0fbh;Overflow and number of bytes in the RX FIFO.
0044+
0045+
00046+ ;=========================================================
00047+ ;=========================================================
00048+ ;Define the Configuration Registers.
49 0000 CFG_CC2500_IOCFG2 equ 00h; GDO2 output pin configuration.
50 0001 CFG_CC2500_IOCFG1 equ 01h; GDO1 output pin configuration.
51 0002 CFG_CC2500_IOCFG0 equ 02h; GDO0 output pin configuration.
52 0003 CFG_CC2500_FIFOTHR equ 03h; RX FIFO and TX FIFO thresholds.
53 0004 CFG_CC2500_SYNC1 equ 04h; Sync word, high byte.
54 0005 CFG_CC2500_SYNC0 equ 05h; Sync word, low byte.
55 0006 CFG_CC2500_PKTLEN equ 06h; Packet length.
56 0007 CFG_CC2500_PKTCTRL1 equ 07h; Packet automation control.
57 0008 CFG_CC2500_PKTCTRL0 equ 08h; Packet automation control.
58 0009 CFG_CC2500_ADDR equ 09h; Device address.
59 000A CFG_CC2500_CHANNR equ 0ah; Channel number.
60 000B CFG_CC2500_FSCTRL1 equ 0bh; Frequency synthesizer control.
61 000C CFG_CC2500_FSCTRL0 equ 0ch; Frequency synthesizer control.
62 000D CFG_CC2500_FREQ2 equ 0dh; Frequency control word, high byte.
63 000E CFG_CC2500_FREQ1 equ 0eh; Frequency control word, middle byte.
64 000F CFG_CC2500_FREQ0 equ 0fh; Frequency control word, low byte.
65 0010 CFG_CC2500_MDMCFG4 equ 10h; Modem configuration.
66 0011 CFG_CC2500_MDMCFG3 equ 11h; Modem configuration.
67 0012 CFG_CC2500_MDMCFG2 equ 12h; Modem configuration.
68 0013 CFG_CC2500_MDMCFG1 equ 13h; Modem configuration.
69 0014 CFG_CC2500_MDMCFG0 equ 14h; Modem configuration.
70 0015 CFG_CC2500_DEVIATN equ 15h; Modem deviation setting.
71 0016 CFG_CC2500_MCSM2 equ 16h; Main Radio Control State Machine configuration.
72 0017 CFG_CC2500_MCSM1 equ 17h; Main Radio Control State Machine configuration.
73 0018 CFG_CC2500_MCSM0 equ 18h; Main Radio Control State Machine configuration.
74 0019 CFG_CC2500_FOCCFG equ 19h; Frequency Offset Compensation configuration.
75 001A CFG_CC2500_BSCFG equ 1ah; Bit Synchronization configuration.
76 001B CFG_CC2500_AGCTRL2 equ 1bh; AGC control.
77 001C CFG_CC2500_AGCTRL1 equ 1ch; AGC control.
78 001D CFG_CC2500_AGCTRL0 equ 1dh; AGC control.
79 001E CFG_CC2500_WOREVT1 equ 1eh; High byte Event 0 timeout.
80 001F CFG_CC2500_WOREVT0 equ 1fh; Low byte Event 0 timeout.
81 0020 CFG_CC2500_WORCTRL equ 20h; Wake On Radio control.
82 0021 CFG_CC2500_FREND1 equ 21h; Front end RX configuration.
83 0022 CFG_CC2500_FREND0 equ 22h; Front end TX configuration.
84 0023 CFG_CC2500_FSCAL3 equ 23h; Frequency synthesizer calibration.
85 0024 CFG_CC2500_FSCAL2 equ 24h; Frequency synthesizer calibration.
86 0025 CFG_CC2500_FSCAL1 equ 25h; Frequency synthesizer calibration.
87 0026 CFG_CC2500_FSCAL0 equ 26h; Frequency synthesizer calibration.
88 0027 CFG_CC2500_RCCTRL1 equ 27h; RC oscillator configuration.
89 0028 CFG_CC2500_RCCTRL0 equ 28h; RC oscillator configuration.
90 0029 CFG_CC2500_FSTEST equ 29h; Frequency synthesizer calibration control.
91 002A CFG_CC2500_PTEST equ 2ah; Production test.
92 002B CFG_CC2500_AGCTEST equ 2bh; AGC test.
93 002C CFG_CC2500_TEST2 equ 2ch; Various test settings.
94 002D CFG_CC2500_TEST1 equ 2dh; Various test settings.
95 002E CFG_CC2500_TEST0 equ 2eh; Various test settings.
0096+
00097+ ;=======================================================
00098+ ;=======================================================
99 0000 D_SingleByte equ 00h; The single byte write/read.
100 0040 D_Burst equ 40h; The burst write/read.
0101+
00172 .endd
00173 ;*************************************************************
00174 .CODE
175 0000 **** NEW ADDR **** org 000h;
277 00176 0000 D029 jmp V_Reset;
177 0010 **** NEW ADDR **** org 010h;
279 00178 0010 D04F jmp V_IntPinInt;
179 0014 **** NEW ADDR **** org 014h;
281 00180 0014 D028 jmp V_IOC_DInt;
181 0018 **** NEW ADDR **** org 018h;
283 00182 0018 D08A jmp V_Tmr1Int;
183 001C **** NEW ADDR **** org 01ch;
285 00184 001C D097 jmp V_PreDiverInt;
185 0020 **** NEW ADDR **** org 020h;
287 00186 0020 D028 jmp V_Tmr2Int;
187 0024 **** NEW ADDR **** org 024h;
289 00188 0024 D028 jmp V_KeyMatrixInt;
189 0028 **** NEW ADDR **** org 028h;
00190 V_RFCInt:
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