hard-5.htm

这里面是各种总线的定义

278 data port<br>
279 status port<br>
27A control port<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">280-2AF 
Reserved for I/O channel</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">2A2-2A3 
MSM58321RS clock</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">2B0-2DF 
Alternate EGA, or 3270 PC video (XT, AT)</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">2E0 Alternate 
EGA/VGA</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">E1 GPIB Adapter 
(AT)</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">2E2-2E3 Data 
acquisition adapter (AT)</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">2E8-2EF COM4 non 
PS2 UART (Reserved by IBM) (see UART)</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">2F0-2F7 Reserved</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">2F8-2FF COM2 
Second Asynchronous Adapter<br>
Primary Asynchronous Adapter for PCjr</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">300-31F 
Prototype Experimentation Card<br>
Periscope hardware debugger</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">320-32F Hard 
Disk Controller (XT):<br>
</span></font><font color="#008080"><br>
320 Read from/Write to controller<br>
321 Read: Controller Status, Write: controller reset<br>
322 Write: generate controller select pulse<br>
323 Write: Pattern to DMA and interrupt mask register<br>
324 disk attention/status<br>
<br>
330-33F Reserved for XT/370<br>
<br>
340-35F Reserved for I/O channel<br>
<br>
360-36F PC Network<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">370-377 
Floppy disk controller (except PCjr):<br>
</span></font><font color="#008080"><br>
372 Diskette digital output<br>
374 Diskette controller status<br>
375 Diskette controller data<br>
376 Diskette controller data<br>
377 Diskette digital input<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">378-37F 
Second Parallel Printer (see PARALLEL PORT):<br>
</span></font><font color="#008080"><br>
378 data port<br>
379 status port<br>
37A control port<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">380-38F 
Secondary Binary Synchronous Data Link Control (SDLC) adapter:<br>
</span></font><font color="#008080"><br>
380 On board 8255 port A, internal/external sense<br>
381 On board 8255 port B, external modem interface<br>
382 On board 8255 port C, internal control and gating<br>
383 On board 8255 mode register<br>
384 On board 8253 channel square wave generator<br>
385 On board 8253 channel 1 inactivity time-out<br>
386 On board 8253 channel 2 inactivity time-out<br>
387 On board 8253 mode register<br>
388 On board 8273 read: status; Write: Command<br>
389 On board 8273 write: parameter; read: response<br>
38A On board 8273 transmit interrupt status<br>
38B On board 8273 receiver interrupt status<br>
38C On board 8273 data<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">390-39F 
Cluster Adapter</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">3A0-3AF Primary 
Binary Synchronous Data Link Control (SDLC) adapter:<br>
</span></font><font color="#008080"><br>
3A0 On board 8255 port A, internal/external sense<br>
3A1 On board 8255 port B, external modem interface<br>
3A2 On board 8255 port C, internal control and gating<br>
3A3 On board 8255 mode register<br>
3A4 On board 8253 counter 0 unused<br>
3A5 On board 8253 counter 1 inactivity time-outs<br>
3A6 On board 8253 counter 2 inactivity time-outs<br>
3A7 On board 8253 mode register<br>
3A8 On board 8251 data<br>
3A9 On board 8251 command/mode/status register<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">3B0-3BF 
Monochrome Display Adapter (write only, see 6845):<br>
</span></font><font color="#008080"><br>
3B0 port address decodes to 3B4<br>
3B1 port address decodes to 3B5<br>
3B2 port address decodes to 3B4<br>
3B3 port address decodes to 3B5<br>
3B4 6845 index register, selects which register [0-11h]<br>
&nbsp;&nbsp;&nbsp; is to be accessed through port 3B5<br>
3B5 6845 data register [0-11h] selected by port 3B4,<br>
&nbsp;&nbsp;&nbsp; registers 0C-0F may be read. If a read occurs without<br>
&nbsp;&nbsp;&nbsp; the adapter installed, FFh is returned. (see 6845)<br>
3B6 port address decodes to 3B4<br>
3B7 port address decodes to 3B5<br>
3B8 6845 Mode control register<br>
3B9 reserved for color select register on color adapter<br>
3BA status register (read only)<br>
3BB reserved for light pen strobe reset<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">3BC-3BF 
Primary Parallel Printer Adapter (see PARALLEL PORT):<br>
</span></font><font color="#008080"><br>
3BC parallel 1, data port<br>
3BD parallel 1, status port<br>
3BE parallel 1, control port<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">3C0-3CF 
EGA/VGA:<br>
</span></font><font color="#008080"><br>
3C0 VGA attribute and sequencer register<br>
3C1 Other video attributes<br>
3C2 EGA, VGA, CGA input status 0<br>
3C3 Video subsystem enable<br>
3C4 CGA, EGA, VGA sequencer index<br>
3C5 CGA, EGA, VGA sequencer<br>
3C6 VGA video DAC PEL mask<br>
3C7 VGA video DAC state<br>
3C8 VGA video DAC PEL address<br>
3C9 VGA video DAC<br>
3CA VGA graphics 2 position<br>
3CC VGA graphics 1 position<br>
3CD VGA feature control<br>
3CE VGA graphics index<br>
3CF Other VGA graphics<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">3D0-3DF 
Color Graphics Monitor Adapter (ports 3D0-3DB are write only, see 6845):<br>
</span></font><font color="#008080"><br>
3D0 port address decodes to 3D4<br>
3D1 port address decodes to 3D5<br>
3D2 port address decodes to 3D4<br>
3D3 port address decodes to 3D5<br>
3D4 6845 index register, selects which register [0-11h]<br>
&nbsp;&nbsp;&nbsp; is to be accessed through port 3D5<br>
3D5 6845 data register [0-11h] selected by port 3D4,<br>
&nbsp;&nbsp;&nbsp; registers 0C-0F may be read. If a read occurs without<br>
&nbsp;&nbsp;&nbsp; the adapter installed, FFh is returned. (see 6845)<br>
3D6 port address decodes to 3D4<br>
3D7 port address decodes to 3D5<br>
3D8 6845 Mode control register (CGA, EGA, VGA, except PCjr)<br>
3D9 color select palette register (CGA, EGA, VGA, see 6845)<br>
3DA status register (read only, see 6845, PCjr VGA access)<br>
3DB Clear light pen latch (any write)<br>
3DC Preset Light pen latch<br>
3DF CRT/CPU page register (PCjr only)<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">3E8-3EF COM3 
non PS2 UART (Reserved by IBM) (see UART)</span></font></p>

<p><font color="#000080"><span style="background-color: rgb(200,200,255)">3F0-3F7 Floppy 
disk controller (except PCjr):<br>
</span></font><font color="#008080"><br>
3F0 Diskette controller status A<br>
3F1 Diskette controller status B<br>
3F2 controller control port<br>
3F4 controller status register<br>
3F5 data register (write 1-9 byte command, see INT 13)<br>
3F6 Diskette controller data<br>
3F7 Diskette digital input<br>
<br>
</font><font color="#000080"><span style="background-color: rgb(200,200,255)">3F8-3FF COM1 
Primary Asynchronous Adapter (see UART)3F0 Diskette controller status A:<br>
</span></font><font color="#008080"><br>
3220-3227 PS2 COM3<br>
3228-322F PS2 COM4<br>
4220-4227 PS2 COM5<br>
4228-422F PS2 COM6<br>
5220-5227 PS2 COM7<br>
5228-522F PS2 COM8<br>
<br>
- many cards designed for the ISA BUS only uses the lower 10 bits<br>
of the port address but some ISA adapters use addresses beyond 3FF.<br>
Any address that matches in the lower 10 bits will decode to the<br>
same card. It is up to the adapters to resolve or ignore the<br>
high bits of the port addresses. An example would be the Cluster<br>
adapter that has a port address of 390h. The second cluster<br>
adapter has a port address of 790h which resolves to the same port<br>
address with the cards determining which one actually gets the data.<br>
</font></p>
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