init_dvc.c

来自「一个比较好用的TW2835音视频芯片开发板的程序,」· C语言 代码 · 共 381 行 · 第 1/2 页

C
381 行
字号
12
#include	"hdr.h"

//#include	"tbl_othr_dvc.h"


U16	reg_crsr_pos_x;
U16	reg_crsr_pos_y;

//==================================================================================
//						Device init function description
//==================================================================================
void InitPg0(void)
{
	U8 _t1_;

	if(b_cmn_jp_vdo == VDO_NTSC){
		for(_t1_=0;_t1_<4;_t1_++){
			WriteAsicTable(cmn_dvc,DVC_PG0,0x00+0x10*_t1_,tbl_ntsc_pg0_cmn,15);
			WriteAsicByte(cmn_dvc,DVC_PG0,0x0c+0x10*_t1_,(_t1_<<6)|0x06);			//... x path ANA_CH mux
			WriteAsicTable(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,tbl_ntsc_pg0_scl,16);
#if defined(__4CH__)
			WriteAsicByte(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,(_t1_<<6)|0x01);			//... x path scale filter : quad
//			WriteAsicByte(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,(_t1_<<6)|0x06);			//... x path scale filter : 1/3 size
#elif defined(__16CH__)
			WriteAsicByte(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,(_t1_<<6)|0x0b);			//... x path scale filter : 1/4
#endif
			WriteAsicByte(cmn_dvc,DVC_PG0,0x8a+0x10*_t1_,(_t1_<<6)|0x31);			//... y path scale filter : quad
		}

		WriteAsicTable(cmn_dvc,DVC_PG0,0x40,tbl_ntsc_pg0_sfr1,21);
		WriteAsicTable(cmn_dvc,DVC_PG0,0x60,tbl_ntsc_pg0_sfr2,21);
		WriteAsicTable(cmn_dvc,DVC_PG0,0xc0,tbl_ntsc_pg0_sfr3,11);
	}
	else{										//... PAL
		for(_t1_=0;_t1_<4;_t1_++){
			WriteAsicTable(cmn_dvc,DVC_PG0,0x00+0x10*_t1_,tbl_pal_pg0_cmn,15);
			WriteAsicByte(cmn_dvc,DVC_PG0,0x0c+0x10*_t1_,(_t1_<<6)|0x06);			//... x path ANA_CH mux
			WriteAsicTable(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,tbl_pal_pg0_scl,16);
#if defined(__4CH__)
			WriteAsicByte(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,(_t1_<<6)|0x01);			//... x path scale filter : quad
//			WriteAsicByte(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,(_t1_<<6)|0x06);			//... x path scale filter : 1/3 size
#elif defined(__16CH__)
			WriteAsicByte(cmn_dvc,DVC_PG0,0x80+0x10*_t1_,(_t1_<<6)|0x0b);			//... x path scale filter : 1/4
#endif
			WriteAsicByte(cmn_dvc,DVC_PG0,0x8a+0x10*_t1_,(_t1_<<6)|0x31);       //... y path scale filter : quad
		}

		WriteAsicTable(cmn_dvc,DVC_PG0,0x40,tbl_pal_pg0_sfr1,21);
		WriteAsicTable(cmn_dvc,DVC_PG0,0x60,tbl_pal_pg0_sfr2,21);
		WriteAsicTable(cmn_dvc,DVC_PG0,0xc0,tbl_pal_pg0_sfr3,11);
	}
}
//==================================================================================
void InitPg1(void)
{
	U8 _t1_;//, _t2_=0;

#if defined(__4CH__)
	WriteAsicTable(cmn_dvc,DVC_PG1,0x01,tbl_pg1_x_cmn,47);
	WriteAsicTable(cmn_dvc,DVC_PG1,0x50,tbl_pg1_y_cmn,80);
	
	if(b_cmn_jp_vdo == VDO_NTSC){
		WriteAsicTable(cmn_dvc,DVC_PG1,0x30,tbl_ntsc_pg1_pic_qd,16);		//... normal quad
//		WriteAsicTable(cmn_dvc,DVC_PG1,0x30,tbl_ntsc_pg1_pic_9_lt,16);		//... non-realtime
		WriteAsicTable(cmn_dvc,DVC_PG1,0x40,tbl_ntsc_pg1_pic_9_rb,16);
		WriteAsicTable(cmn_dvc,DVC_PG1,0xa0,tbl_ntsc_pg1_enc,16);	
		WriteAsicByte(cmn_dvc,DVC_PG1,0x00,0x00);
	}
	else{
		WriteAsicTable(cmn_dvc,DVC_PG1,0x30,tbl_pal_pg1_pic_qd,16);			//... normal quad
//		WriteAsicTable(cmn_dvc,DVC_PG1,0x30,tbl_pal_pg1_pic_9_lt,16);		//... non-realtime
		WriteAsicTable(cmn_dvc,DVC_PG1,0x40,tbl_pal_pg1_pic_9_rb,16);
		WriteAsicTable(cmn_dvc,DVC_PG1,0xa0,tbl_pal_pg1_enc,16);	
		WriteAsicByte(cmn_dvc,DVC_PG1,0x00,0x80);
	}
#elif defined(__16CH__)
	U8 _dvc_, _ch_;

	WriteAsicTable(cmn_dvc,DVC_PG1,0x01,tbl_pg1_x_cmn,47);
	WriteAsicTable(cmn_dvc,DVC_PG1,0x50,tbl_pg1_y_cmn,80);
	
	if(b_cmn_jp_vdo == VDO_NTSC){
		WriteAsicTable(MASTER,DVC_PG1,0x30,tbl_ntsc_pg1_pic_16_0,16);
		WriteAsicTable(SLAVE1,DVC_PG1,0x30,tbl_ntsc_pg1_pic_16_1,16);
		WriteAsicTable(SLAVE2,DVC_PG1,0x30,tbl_ntsc_pg1_pic_16_2,16);
		WriteAsicTable(SLAVE3,DVC_PG1,0x30,tbl_ntsc_pg1_pic_16_3,16);
//		WriteAsicTable(cmn_dvc,DVC_PG1,0x40,tbl_ntsc_pg1_pic_9_rb,16);

//		WriteAsicTable(cmn_dvc,DVC_PG1,0xa0,tbl_ntsc_pg1_enc,16);	
//		WriteAsicByte(SLAVE1|SLAVE2|SLAVE3,DVC_PG1,0xa1,0x88);
		WriteAsicTable(MASTER,DVC_PG1,0xa0,tbl_ntsc_pg1_enc_mstr,16);	
		WriteAsicTable(SLAVE1|SLAVE2|SLAVE3,DVC_PG1,0xa0,tbl_ntsc_pg1_enc_slv,16);	

		if(cmn_rc_md == RC_MD_120_FPS){
			WriteAsicByte(MASTER,DVC_PG1,0x00,0x0c);
			WriteAsicByte(MASTER,DVC_PG1,0x7e,0xc9);
			WriteAsicByte(SLAVE1,DVC_PG1,0x00,0x0d);
			WriteAsicByte(SLAVE1,DVC_PG1,0x7e,0xa9);
			WriteAsicByte(SLAVE2,DVC_PG1,0x00,0x0e);
			WriteAsicByte(SLAVE2,DVC_PG1,0x7e,0x89);
			WriteAsicByte(SLAVE3,DVC_PG1,0x00,0x3f);
			WriteAsicByte(SLAVE3,DVC_PG1,0x7e,0x89);
		}
		else if(cmn_rc_md == RC_MD_240_FPS){
			WriteAsicByte(MASTER,DVC_PG1,0x00,0x0c);
			WriteAsicByte(MASTER,DVC_PG1,0x7e,0xc9);
			WriteAsicByte(SLAVE1,DVC_PG1,0x00,0x1d);
			WriteAsicByte(SLAVE1,DVC_PG1,0x7e,0xa9);
			WriteAsicByte(SLAVE2,DVC_PG1,0x00,0x0e);
			WriteAsicByte(SLAVE2,DVC_PG1,0x7e,0x89);
			WriteAsicByte(SLAVE3,DVC_PG1,0x00,0x3f);
			WriteAsicByte(SLAVE3,DVC_PG1,0x7e,0x89);
		}
		else if(cmn_rc_md == RC_MD_480_FPS){
			WriteAsicByte(MASTER,DVC_PG1,0x00,0x08);
			WriteAsicByte(MASTER,DVC_PG1,0x7e,0xc9);
			WriteAsicByte(SLAVE1,DVC_PG1,0x00,0x09);
			WriteAsicByte(SLAVE1,DVC_PG1,0x7e,0xa9);
			WriteAsicByte(SLAVE2,DVC_PG1,0x00,0x0a);
			WriteAsicByte(SLAVE2,DVC_PG1,0x7e,0x89);
			WriteAsicByte(SLAVE3,DVC_PG1,0x00,0x3b);
			WriteAsicByte(SLAVE3,DVC_PG1,0x7e,0x89);
		}
	}
	else{
		WriteAsicTable(MASTER,DVC_PG1,0x30,tbl_pal_pg1_pic_16_0,16);
		WriteAsicTable(SLAVE1,DVC_PG1,0x30,tbl_pal_pg1_pic_16_1,16);
		WriteAsicTable(SLAVE2,DVC_PG1,0x30,tbl_pal_pg1_pic_16_2,16);
		WriteAsicTable(SLAVE3,DVC_PG1,0x30,tbl_pal_pg1_pic_16_3,16);
//		WriteAsicTable(cmn_dvc,DVC_PG1,0x40,tbl_pal_pg1_pic_9_rb,16);

//		WriteAsicTable(cmn_dvc,DVC_PG1,0xa0,tbl_pal_pg1_enc,16);	
//		WriteAsicByte(SLAVE1|SLAVE2|SLAVE3,DVC_PG1,0xa1,0x88);
		WriteAsicTable(MASTER,DVC_PG1,0xa0,tbl_pal_pg1_enc_mstr,16);	
		WriteAsicTable(SLAVE1|SLAVE2|SLAVE3,DVC_PG1,0xa0,tbl_pal_pg1_enc_slv,16);	

		if(cmn_rc_md == RC_MD_120_FPS){
			WriteAsicByte(MASTER,DVC_PG1,0x00,0x8c);
			WriteAsicByte(MASTER,DVC_PG1,0x7e,0xc9);
			WriteAsicByte(SLAVE1,DVC_PG1,0x00,0x8d);
			WriteAsicByte(SLAVE1,DVC_PG1,0x7e,0xa9);
			WriteAsicByte(SLAVE2,DVC_PG1,0x00,0x8e);
			WriteAsicByte(SLAVE2,DVC_PG1,0x7e,0x89);
			WriteAsicByte(SLAVE3,DVC_PG1,0x00,0xbf);
			WriteAsicByte(SLAVE3,DVC_PG1,0x7e,0x89);
		}
		else if(cmn_rc_md == RC_MD_240_FPS){
			WriteAsicByte(MASTER,DVC_PG1,0x00,0x8c);
			WriteAsicByte(MASTER,DVC_PG1,0x7e,0xc9);
			WriteAsicByte(SLAVE1,DVC_PG1,0x00,0x9d);
			WriteAsicByte(SLAVE1,DVC_PG1,0x7e,0xa9);
			WriteAsicByte(SLAVE2,DVC_PG1,0x00,0x8e);
			WriteAsicByte(SLAVE2,DVC_PG1,0x7e,0x89);
			WriteAsicByte(SLAVE3,DVC_PG1,0x00,0xbf);
			WriteAsicByte(SLAVE3,DVC_PG1,0x7e,0x89);
		}
		else if(cmn_rc_md == RC_MD_480_FPS){
			WriteAsicByte(MASTER,DVC_PG1,0x00,0x88);
			WriteAsicByte(MASTER,DVC_PG1,0x7e,0xc9);
			WriteAsicByte(SLAVE1,DVC_PG1,0x00,0x89);
			WriteAsicByte(SLAVE1,DVC_PG1,0x7e,0xa9);
			WriteAsicByte(SLAVE2,DVC_PG1,0x00,0x8a);
			WriteAsicByte(SLAVE2,DVC_PG1,0x7e,0x89);
			WriteAsicByte(SLAVE3,DVC_PG1,0x00,0xbb);
			WriteAsicByte(SLAVE3,DVC_PG1,0x7e,0x89);
		}
	}
#endif			

	//... queue setting
//	for(_t1_=0;_t1_<16;_t1_++){
//		//... mux queue
//		WriteAsicByte(cmn_dvc,DVC_PG1,0x59,_t1_);			//... queue data
//		WriteAsicByte(cmn_dvc,DVC_PG1,0x5a,0x80|_t1_);		//... queue addr
//		//... popup queue
////		if(_t1_<13){
////			WriteAsicByte(cmn_dvc,DVC_PG1,0x73,(_t1_<<4)|(_t1_+1));			//... queue data
////			WriteAsicByte(cmn_dvc,DVC_PG1,0x74,((_t1_+2)<<4)|(_t1_+3));	//... queue data
////			WriteAsicByte(cmn_dvc,DVC_PG1,0x75,0x80|_t1_);						//... queue addr
////		}
//	}
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x73,0x01);	//... queue data
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x74,0x23);	//... queue data
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x75,0x80);	//... queue addr
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x73,0x12);	//... queue data
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x74,0x30);	//... queue data
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x75,0x81);	//... queue addr
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x73,0x23);	//... queue data
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x74,0x01);	//... queue data
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x75,0x82);	//... queue addr
//	WriteAsicByte(cmn_dvc,DVC_PG1,0x73,0x30);	//... queue data
12

init_dvc.c - 源码说明

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