📄 wndw_rc_fmt_qu.c
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#include "hdr.h"
//==================================================================================
//==================================================================================
U8 idata wndw_rc_fm_qu_scrl_step = 0;
U8 idata wndw_rc_fm_qu_size = 0;
U8 idata wndw_rc_fm_qu_scrl_grip_vt;
//U8 idata wndw_rc_fm_qu_bak[8];
//==================================================================================
// Display wndwdow function description
//==================================================================================
#if defined(__16CH__)
U8 GetWndwRcFmQuOfst(void)//U8 _osd_pos_x, U8 _osd_pos_y)
{
U8 _t1_;
if(cmn_lst_slvr_y == MASTER) _t1_ = 0;
else if(cmn_lst_slvr_y == SLAVE1){
if(cmn_rc_md == RC_MD_480_FPS) _t1_ = 4;
else if(cmn_rc_md == RC_MD_240_FPS) _t1_ = 0;
}
else if(cmn_lst_slvr_y == SLAVE2) _t1_ = 8;
else if(cmn_lst_slvr_y == SLAVE3){
if(cmn_rc_md == RC_MD_480_FPS) _t1_ = 12;
else if(cmn_rc_md == RC_MD_240_FPS) _t1_ = 8;
else _t1_ = 0;
}
return _t1_;
}
#endif
//==================================================================================
//==================================================================================
U8 GetWndwRcFmQuSz(void)
{
U8 _rdat_;
#if defined(__4CH__)
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x57);
#elif defined(__16CH__)
// if(b_rc_fm_type == FM_TYPE_CIF){
if((wndw_rc_fm_type == CIF_TYPE_FR)||(wndw_rc_fm_type == CIF_TYPE_FL)){
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x71)&0x1f; //... get POPUP_SIZE
}
else{
//... update:050706 Rev2.0
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x57)&0x7f; //... get QUEUE_SIZE
}
#endif
return _rdat_;
}
//==================================================================================
void SetWndwRcFmQuSz(U8 _data)
{
#if defined(__4CH__)
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x57,_data);
#elif defined(__16CH__)
U8 _rdat_;
// if(b_rc_fm_type == FM_TYPE_CIF){
if((wndw_rc_fm_type == CIF_TYPE_FR)||(wndw_rc_fm_type == CIF_TYPE_FL)){
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x71) & ~0x1f;
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x71,_rdat_|_data);
}
else{
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x57,_data);
}
#endif
}
//==================================================================================
void SetWndwRcFmQuOSDSzNum(U8 _data)
{
U8 _t1_;
_t1_ = _data%100;
_t1_ = ConvDec2Bcd(_t1_);
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_SZ_NUM_X,WNDW_RC_FM_QU_SZ_NUM_Y,0x00,(_t1_>>4)+0x10);
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_SZ_NUM_X+1,WNDW_RC_FM_QU_SZ_NUM_Y,0x00,(_t1_&0x0f)+0x10);
_t1_ = _data/100;
if(_t1_ == 0) WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_SZ_NUM_X-1,WNDW_RC_FM_QU_SZ_NUM_Y,OSD_CLR,0x00);
else WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_SZ_NUM_X-1,WNDW_RC_FM_QU_SZ_NUM_Y,0x00,_t1_+0x10);
}
//==================================================================================
void SetWndwRcFmQuOSDSz(void)
{
#if defined(__4CH__)
SetOSDGrp(PTH_Y,WNDW_RC_FM_QU_SZ_DEC_X-2,WNDW_RC_FM_QU_SZ_NUM_Y,16,1,0x00,str_wndw_grp_size);
#elif defined(__16CH__)
SetOSDGrp(PTH_Y,WNDW_RC_FM_QU_SZ_DEC_X-1,WNDW_RC_FM_QU_SZ_NUM_Y,9,1,0x00,str_wndw_grp_size);
#endif
mse_flg_on_osd |= MSE_ON_OSD_SIZE;
RunMseOnOSDH(PTH_Y,0,0,WNDW_RC_FM_QU_SZ_DEC_X,WNDW_RC_FM_QU_SZ_INC_X,WNDW_RC_FM_QU_SZ_NUM_Y,MSE_ON_OSD_SIZE);
wndw_rc_fm_qu_size = GetWndwRcFmQuSz();
SetWndwRcFmQuOSDSzNum(wndw_rc_fm_qu_size);
}
//==================================================================================
#if defined(__16CH__)
void SetWndwRcFmQuOSDStgNum(U8 _dvc)
{
U8 _t1_;
if(_dvc == SLAVE3) _t1_ = 3;
else if(_dvc == SLAVE2) _t1_ = 2;
else if(_dvc == SLAVE1) _t1_ = 1;
else if(_dvc == MASTER) _t1_ = 0;
if(cmn_rc_md == RC_MD_120_FPS)
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_STG_NUM_X,WNDW_RC_FM_QU_STG_NUM_Y,OSD_MIX,_t1_+0x10);
else
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_STG_NUM_X,WNDW_RC_FM_QU_STG_NUM_Y,0x00,_t1_+0x10);
}
//==================================================================================
void SetWndwRcFmQuOSDStg(void)
{
U8 _t1_;
if(cmn_rc_md == RC_MD_120_FPS) _t1_ = OSD_MIX;
else _t1_ = 0x00;
SetOSDGrp(PTH_Y,WNDW_RC_FM_QU_STG_DEC_X-1,WNDW_RC_FM_QU_STG_NUM_Y,7,1,_t1_,str_wndw_grp_stg);
mse_flg_on_osd |= MSE_ON_OSD_STG;
RunMseOnOSDH(PTH_Y|_t1_,0,0,WNDW_RC_FM_QU_STG_DEC_X,WNDW_RC_FM_QU_STG_INC_X,WNDW_RC_FM_QU_STG_NUM_Y,MSE_ON_OSD_STG);
SetWndwRcFmQuOSDStgNum(cmn_lst_slvr_y);
}
#endif
//==================================================================================
//==================================================================================
U8 GetWndwRcFmQuScrlStep(void)
{
U16 _step_;
_step_ = ReadAsicByte(MASTER,DVC_PG2,0x64+(QUE_2DBOX_SCRL<<3));
_step_ <<= 1;
_step_ |= (ReadAsicByte(MASTER,DVC_PG2,0x61+(QUE_2DBOX_SCRL<<3))&BIT0);
return (U8)((_step_-MSE_SCRL_QUE_VT)>>2);
}
//==================================================================================
void SetWndwRcFmQuScrlBar(U8 _step)
{
U8 _t1_;
#if defined(__4CH__)
_t1_ = MASTER;
#elif defined(__16CH__)
for(_t1_=SLAVE3;_t1_>=MASTER;_t1_>>=2) //... 2dbox must be controlled for all chip
#endif
Set2DBoxPos(_t1_,QUE_2DBOX_SCRL,MSE_SCRL_QUE_HL,MSE_SCRL_QUE_VT+(_step<<2));
}
//==================================================================================
void SetWndwRcFmQuOSDScrl(void)
{
U8 _t1_;
mse_flg_on_osd |= MSE_ON_OSD_SCRL;
RunMseOnOSDV(PTH_Y,0,0,WNDW_RC_FM_QU_SCRL_X,WNDW_RC_FM_QU_SCRL_UP_Y,WNDW_RC_FM_QU_SCRL_DN_Y,MSE_ON_OSD_SCRL);
#if defined(__4CH__)
_t1_ = MASTER;
#elif defined(__16CH__)
for(_t1_=SLAVE3;_t1_>=MASTER;_t1_>>=2)
#endif
{ //... 2dbox must be controlled for all chip
Set2DBox(_t1_,QUE_2DBOX_SCRL,MSE_SCRL_QUE_HL,MSE_SCRL_QUE_HW,MSE_SCRL_QUE_VT,MSE_SCRL_QUE_VW);
Set2DBoxCell(_t1_,QUE_2DBOX_SCRL,1,1);
// Set2DBoxCtrl(_t1_,QUE_2DBOX_SCRL,NULL,_2DBOX_TBL_COL);
// Set2DBoxCtrl(_t1_,QUE_2DBOX_SCRL,_2DBOX_MIXEN|_2DBOX_BNDEN,OFF);
SetAsicFlgType(_t1_,DVC_PG2,0x60+(QUE_2DBOX_SCRL<<3),BIT5|BIT3,0x00); //... MDBOX_MD=0,MDBOX_MIX=0
SetAsicFlgType(_t1_,DVC_PG2,0x61+(QUE_2DBOX_SCRL<<3),0x18,0x10); //... DETAREA_EN=1, MDBND_EN=0
Enable2DBox(PTH_Y,_t1_,QUE_2DBOX_SCRL);
}
SetWndwRcFmQuScrlBar(wndw_rc_fm_qu_scrl_step);
// Enable2DBox(PTH_Y,MASTER,QUE_2DBOX_SCRL);
}
//==================================================================================
//==================================================================================
#if defined(__16CH__)
void SetWndwRcFmQuPopRdMd(U8 _que_rd_mode)
{
U8 _rdat_;
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x70); //... queue read control
_rdat_ = (_rdat_ & 0xf8)|(_que_rd_mode>>4);
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x70,_rdat_); //... queue read control
}
//==================================================================================
void GetWndwRcFmQuPopData(U8 _addr, U8 *_a4)
{
U8 _rdat_;
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x75,_addr);
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x73);
_a4[0] = _rdat_>>4;
_a4[1] = _rdat_&0x0f;
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x74);
_a4[2] = _rdat_>>4;
_a4[3] = _rdat_&0x0f;
}
//==================================================================================
void SetWndwRcFmQuPopData(U8 _addr, U8 *_a4)
{
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x73,(_a4[0]<<4)|_a4[1]);
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x74,(_a4[2]<<4)|_a4[3]);
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x75,BIT7|_addr);
}
//==================================================================================
void LoadWndwRcFmQuOSDTblPop(void)
{
U8 _t1_, _t2_, _t3_, _t4_;
U8 _a4_[4];
U8 _dat_;
SetWndwRcFmQuPopRdMd(QUE_RD_MD_LD);
for(_t1_=0;_t1_<8;_t1_++){
for(_t2_=0;_t2_<2;_t2_++){
_t4_ = (_t1_<<1)|_t2_;
_t4_ += wndw_rc_fm_qu_scrl_step<<1;
if(_t4_ <= wndw_rc_fm_qu_size){
GetWndwRcFmQuPopData(_t4_,_a4_);
// for(_t3_=0;_t3_<4;_t3_++)
// DisplayValue(PTH_Y,WNDW_RC_FM_QU_TBL_NUM_X+(_t2_<<3)+(_t3_<<1),WNDW_RC_FM_QU_TBL_NUM_Y+_t1_,0xff,_a4_[_t3_],1);
for(_t3_=0;_t3_<4;_t3_++){
_dat_ = _a4_[_t3_]&0x0f;
if(_dat_ < 0x0a) _dat_ += 0x10;//0x30;
else _dat_ += 0x17;//0x37;
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_TBL_NUM_X+(_t2_<<3)+(_t3_<<1),WNDW_RC_FM_QU_TBL_NUM_Y+_t1_,0x00,_dat_);
}
}
else{
for(_t3_=0;_t3_<4;_t3_++)
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_TBL_NUM_X+(_t2_<<3)+(_t3_<<1),WNDW_RC_FM_QU_TBL_NUM_Y+_t1_,OSD_CLR,0x00);
}
}
}
}
#endif
//==================================================================================
void SetWndwRcFmQuMuxRdMd(U8 _que_rd_mode)
{
U8 _rdat_;
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x5b); //... queue read control
_rdat_ = (_rdat_ & 0x8f)|_que_rd_mode;
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x5b,_rdat_); //... queue read control
}
//==================================================================================
U8 GetWndwRcFmQuMuxData(U8 _addr)
{
U8 _rdat_;
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x5a,_addr);
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x59);
return (_rdat_&0x0f);
}
//==================================================================================
void SetWndwRcFmQuMuxData(U8 _addr, U8 _data)
{
U8 _rdat_;
_rdat_ = ReadAsicByte(cmn_lst_slvr_y,DVC_PG1,0x59);
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x59,(_rdat_&0xf0)|_data);
WriteAsicByte(cmn_lst_slvr_y,DVC_PG1,0x5a,BIT7|_addr);
}
//==================================================================================
void LoadWndwRcFmQuOSDTblMux(void)
{
U8 _rdat_;
U8 _t1_, _t2_, _t3_;
SetWndwRcFmQuMuxRdMd(QUE_RD_MD_LD);
for(_t1_=0;_t1_<8;_t1_++){
for(_t2_=0;_t2_<8;_t2_++){
_t3_ = (_t1_<<3)|_t2_;
_t3_ += wndw_rc_fm_qu_scrl_step<<3;
if(_t3_ <= wndw_rc_fm_qu_size){
_rdat_ = GetWndwRcFmQuMuxData(_t3_);
// DisplayValue(PTH_Y,WNDW_RC_FM_QU_TBL_NUM_X+(_t2_<<1),WNDW_RC_FM_QU_TBL_NUM_Y+_t1_,0xff,_rdat_,1);
_rdat_ &= 0x0f;
if(_rdat_ < 0x0a) _rdat_ += 0x10;//0x30;
else _rdat_ += 0x17;//0x37;
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_TBL_NUM_X+(_t2_<<1),WNDW_RC_FM_QU_TBL_NUM_Y+_t1_,0x00,_rdat_);
}
else{
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_TBL_NUM_X+(_t2_<<1),WNDW_RC_FM_QU_TBL_NUM_Y+_t1_,OSD_CLR,0x00);
}
}
}
}
//==================================================================================
void SetWndwRcFmQuOSDTblCol(void)
{
U8 _t1_;
for(_t1_=SLAVE3;_t1_>=MASTER;_t1_>>=2){ //... 2dbox must be controlled for all chip
// Set2DBoxCtrl(_t1_,QUE_2DBOX_COL,NULL,_2DBOX_TBL_NO_COL);
// Set2DBoxCtrl(_t1_,QUE_2DBOX_COL,_2DBOX_BNDEN,ON);
SetAsicFlgType(_t1_,DVC_PG2,0x60+(QUE_2DBOX_COL<<3),BIT5|BIT3,0x00); //... MDBOX_MD=0,MDBOX_MIX=0
SetAsicFlgType(_t1_,DVC_PG2,0x61+(QUE_2DBOX_COL<<3),0x18,0x08); //... DETAREA_EN=0,MDBND_EN=1
Set2DBoxTable(PTH_Y,_t1_,QUE_2DBOX_COL,WNDW_RC_FM_QU_TBL_COL_X,WNDW_RC_FM_QU_TBL_Y,8,1,1);
}
for(_t1_=0;_t1_<8;_t1_++){
WriteOSDFnt(PTH_Y,MASTER,WNDW_RC_FM_QU_TBL_COL_X+(_t1_<<1),WNDW_RC_FM_QU_TBL_Y,0x00,_t1_+0x10);
}
}
//==================================================================================
void SetWndwRcFmQuOSDTblRow(void)
{
U8 _t1_;
U8 _stp_ofst_;
#if defined(__4CH__)
_stp_ofst_ = 3;
#elif defined(__16CH__)
// if(b_rc_fm_type == FM_TYPE_CIF)
if((wndw_rc_fm_type == CIF_TYPE_FR)||(wndw_rc_fm_type == CIF_TYPE_FL))
_stp_ofst_ = 1;
else _stp_ofst_ = 3;
#endif
for(_t1_=SLAVE3;_t1_>=MASTER;_t1_>>=2){ //... 2dbox must be controlled for all chip
// Set2DBoxCtrl(_t1_,QUE_2DBOX_ROW,NULL,_2DBOX_TBL_NO_COL);
// Set2DBoxCtrl(_t1_,QUE_2DBOX_ROW,_2DBOX_BNDEN,ON);
SetAsicFlgType(_t1_,DVC_PG2,0x60+(QUE_2DBOX_ROW<<3),BIT5|BIT3,0x00); //... MDBOX_MD=0,MDBOX_MIX=0
SetAsicFlgType(_t1_,DVC_PG2,0x61+(QUE_2DBOX_ROW<<3),0x18,0x08); //... DETAREA_EN=0, MDBND_EN=1
Set2DBoxTable(PTH_Y,_t1_,QUE_2DBOX_ROW,WNDW_RC_FM_QU_TBL_ROW_X,WNDW_RC_FM_QU_TBL_Y,1,9,2);
}
for(_t1_=0;_t1_<8;_t1_++){
// DisplayValue(PTH_Y,WNDW_RC_FM_QU_TBL_ROW_X,WNDW_RC_FM_QU_TBL_Y+1+_t1_,0xff,(_t1_+wndw_rc_fm_qu_scrl_step)<<_stp_ofst_,2);
DsplyOSDDatHexY(MASTER,WNDW_RC_FM_QU_TBL_ROW_X,WNDW_RC_FM_QU_TBL_Y+1+_t1_,0xff,(_t1_+wndw_rc_fm_qu_scrl_step)<<_stp_ofst_);
}
}
//==================================================================================
void SetWndwRcFmQuOSDTblNum(void)
{
U8 _t1_;
for(_t1_=SLAVE3;_t1_>=MASTER;_t1_>>=2){ //... 2dbox must be controlled for all chip
// Set2DBoxCtrl(_t1_,QUE_2DBOX_NUM,NULL,_2DBOX_TBL_NO_COL);
// Set2DBoxCtrl(_t1_,QUE_2DBOX_NUM,_2DBOX_BNDEN,ON);
SetAsicFlgType(_t1_,DVC_PG2,0x60+(QUE_2DBOX_NUM<<3),BIT5|BIT3,0x00); //... MDBOX_MD=0,MDBOX_MIX=0
SetAsicFlgType(_t1_,DVC_PG2,0x61+(QUE_2DBOX_NUM<<3),0x18,0x08); //... DETAREA_EN=0, MDBND_EN=1
Set2DBoxTable(PTH_Y,_t1_,QUE_2DBOX_NUM,WNDW_RC_FM_QU_TBL_NUM_X,WNDW_RC_FM_QU_TBL_NUM_Y,8,8,1);
}
#if defined(__4CH__)
LoadWndwRcFmQuOSDTblMux();
#elif defined(__16CH__)
// if(b_rc_fm_type == FM_TYPE_CIF)
if((wndw_rc_fm_type == CIF_TYPE_FR)||(wndw_rc_fm_type == CIF_TYPE_FL))
LoadWndwRcFmQuOSDTblPop();
else LoadWndwRcFmQuOSDTblMux();
#endif
}
//==================================================================================
void CreateWndwRcFmQu(void)
{
U8 _dvc_, _ch_;
U8 _t1_;
b_rc_fm_que = ON;
WriteOSDClr(PTH_Y,MASTER,WNDW_RC_FM_QU_POS_X-1,WNDW_RC_FM_QU_POS_Y-1,WNDW_RC_FM_QU_L+2,WNDW_RC_FM_QU_H+2);
SetOSDWndw(PTH_Y,OSD_WNDW_TYPE_MAIN,WNDW_RC_FM_QU_POS_X,WNDW_RC_FM_QU_POS_Y,WNDW_RC_FM_QU_L,WNDW_RC_FM_QU_H,str_wndw_ttl_que_stp);
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