📄 at25cxx.lst
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MCS-51 MACRO ASSEMBLER CONTROL_AT25XXX 02/06/96 PAGE 1
DOS 6.20 (038-N) MCS-51 MACRO ASSEMBLER, V2.3
OBJECT MODULE PLACED IN AT25CXX.OBJ
ASSEMBLER INVOKED BY: C:\ASM51\ASM51.EXE AT25CXX.ASM
LOC OBJ LINE SOURCE
1 NAME Control_AT25xxx
2
3 ; This collection of routines allows the Atmel AT89C5x and AT89Cx051 micro-
4 ; controllers to read and write the AT25xxx family of serial CMOS EEPROMS.
5 ; All AT25xxx family timing requirements are met when the code is run on a
6 ; processor with a 24 MHz (or slower) clock and the EEPROM is powered from
7 ; a supply voltage of from 4.5 to 5.5 Volts.
8 ;
9 ; All six AT25xxx device operations are supported. Read Status Register,
10 ; Write Status Register (set write protection levels), Write Enable and
11 ; Write Disable are implemented by the functions READ_STATUS, WRITE_STATUS,
12 ; ENABLE_WRITE and DISABLE_WRITE, respectively. The operations Read Data
13 ; from Memory, and Write Data to Memory are supported by READ_BYTE and
14 ; WRITE_BYTE, respectively. These functions read and write a single byte,
15 ; while the functions READ_PAGE and WRITE_PAGE utilize the page mode of the
16 ; AT25xxx to read and write an eight-byte page. The page data is transferred
17 ; between the AT25xxx and a RAM buffer.
18 ;
19 ; None of the functions which initiates a write operation (WRITE_STATUS,
20 ; WRITE_BYTE, WRITE_PAGE) waits for the operation to complete. It is the
21 ; responsibility of the calling routine to absorb the time delay required
22 ; for the completion of the write operation. The status of the device may
23 ; be determined utilizing the READ_STATUS function. Note that all write
24 ; operations (including WRITE_STATUS) must be preceded by a call to
25 ; ENABLE_WRITE.
26 ;
27 ; Functions BYTE_FILL, VERIFY_BYTE_FILL, PAGE_FILL and VERIFY_PAGE_FILL are
28 ; artifacts from the debug process and serve to illustrate the use of the
29 ; device read and write functions with an AT25040. To modify the code for
30 ; a different member of the AT25xxx family, simply redefine the values of
31 ; SIZE (the number of bytes per device) and PSIZE (the number of bytes per
32 ; page).
33 ;
34 ; Primitive functions SHIN (SHift IN) and SHOUT (SHift OUT) manage the
35 ; movement of data on the serial bus. The serial clock is generated and
36 ; timed by software.
37 ;
38 ; The function COMMANDER replaces READ_STATUS, WRITE_STATUS, ENABLE_WRITE,
39 ; DISABLE_WRITE, READ_BYTE and WRITE_BYTE and provides a single entry point
40 ; for all operations. COMMANDER is called with the command code in the
41 ; accumulator and address and data (if required) in designated registers.
42 ; The functions COMMANDER, SEND_ADDR, SHIN and SHOUT require a total of
43 ; 128 bytes, including initialization code. The functions READ_STATUS,
44 ; WRITE_STATUS, ENABLE_WRITE, DISABLE_WRITE, READ_BYTE, WRITE_BYTE, SHIN
45 ; and SHOUT require a total of 160 bytes, including initialization code.
46 ;
47 ; AT25xxx control lines are mapped to microcontroller I/O port pins in the
48 ; definitions of CS, SCK, SI and SO. To specify the three-wire configuration,
49 ; assign SI and SO to the same pin. To specify the four-wire configuration,
50 ; assign SI and SO to different pins. No other code changes are required.
MCS-51 MACRO ASSEMBLER CONTROL_AT25XXX 02/06/96 PAGE 2
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51 ; Code to initialize the AT25xxx control lines should be included in the
52 ; user's application in the reset or initialization area.
53
54
0008 55 PSIZE EQU 8 ; bytes per page for AT25xxx
0200 56 SIZE EQU 200h ; bytes per AT25040
0040 57 NPAGES EQU SIZE/PSIZE ; pages per device
0055 58 FILL EQU 55h ; example fill value
59
60 ; AT25xxx device command definitions.
61
0005 62 RDSR EQU 05h ; Read Status Register
0001 63 WRSR EQU 01h ; Write Status Register
0003 64 READ EQU 03h ; Read Data from Memory
0002 65 WRITE EQU 02h ; Write Data to Memory
0006 66 WREN EQU 06h ; Write Enable
0004 67 WRDI EQU 04h ; Write Disable
68
69 ; Microcontroller connections to AT25xxx control lines.
70 ; For a three-wire interface, define SI and SO to be the same pin.
71 ; For a four-wire interface, define SI and SO to be different pins.
72 ; No other code changes are required.
73
0092 74 CS BIT p1.2 ; AT25xxx chip select
0093 75 SCK BIT p1.3 ; serial data clock
0094 76 SI BIT p1.4 ; serial data input
0095 77 SO BIT p1.5 ; serial data output
78
79 ; Bit definitions.
80
00E3 81 A8 BIT acc.3 ; MSB of address
00E0 82 NRDY BIT acc.0 ; high = write cycle in progress
00E1 83 WEN BIT acc.1 ; high = memory write enabled
00E2 84 BP0 BIT acc.2 ; block write protection levels
00E3 85 BP1 BIT acc.3 ;
86
87 ; Register utilization.
88
REG 89 index EQU r0 ; buffer pointer
REG 90 zdata EQU r2 ; data register
REG 91 addr_lo EQU r4 ; 2-byte address register
REG 92 addr_hi EQU r5 ;
REG 93 kount EQU r7 ; page counter
94
95
---- 96 DSEG AT 20H
97
0020 98 ORG 20H
0020 99 buffer: DS PSIZE ; storage for read/write data
100
0030 101 ORG 30H ; stack origin
0030 102 stack: DS 10H ; stack depth
103
104
---- 105 CSEG
MCS-51 MACRO ASSEMBLER CONTROL_AT25XXX 02/06/96 PAGE 3
LOC OBJ LINE SOURCE
106
0000 107 ORG 0000H ; power on/reset vector
0000 020080 108 jmp on_reset
109
0003 110 ORG 0003H ; external interrupt 0 vector
0003 32 111 reti ; undefined
112
000B 113 ORG 000BH ; timer 0 overflow vector
000B 32 114 reti ; undefined
115
0013 116 ORG 0013H ; external interrupt 1 vector
0013 32 117 reti ; undefined
118
001B 119 ORG 001BH ; timer 1 overflow vector
001B 32 120 reti ; undefined
121
0023 122 ORG 0023H ; serial I/O interrupt vector
0023 32 123 reti ; undefined
124
0080 125 ORG 0080H ; begin code space
126 USING 0 ; register bank zero
127
128 on_reset:
0080 75812F 129 mov sp, #(stack-1) ; initialize stack pointer
130
131 ; Initialize AT25xxx control lines.
132
0083 D292 133 setb CS ; high
0085 C293 134 clr SCK ; low
0087 D294 135 setb SI ; high
0089 D295 136 setb SO ; high
137
138 ;
139 ; Sample function calls.
140 ;
141
142 ; Protect memory regions.
143
144 ; call enable_write ; must precede status register write
145
146 ; mov a, #0 ; no protection
147 ; mov a, #04h ; protect top 1/4
148 ; mov a, #08h ; protect top 1/2
149 ; mov a, #0ch ; protect all
150 ; call write_status ; write protection level
151 ; xxx:
152 ; call read_status ; check write status
153 ; jb NRDY, xxx ; loop until ready
154
155
156 ; Protect memory regions using COMMANDER.
157
158 ; mov a, #WREN ; must precede status register write
159 ; call commander
160
MCS-51 MACRO ASSEMBLER CONTROL_AT25XXX 02/06/96 PAGE 4
LOC OBJ LINE SOURCE
161 ; mov zdata, #0 ; no protection
162 ; mov zdata, #04h ; protect top 1/4
163 ; mov zdata, #08h ; protect top 1/2
164 ; mov zdata, #0ch ; protect all
165 ; mov a, #WRSR ; write protection level
166 ; call COMMANDER
167 ; xxx:
168 ; mov a, #RDSR ; check write status
169 ; call commander
170 ; mov a, zdata ; get status
171 ; jb NRDY, xxx ; loop until ready
172
173
174 ; Write and verify entire device, by bytes.
175
176 ; call byte_fill ; write
177 ; call verify_byte_fill ; verify
178 ; jc fault ; jump on verify error
179
180
181 ; Write and verify entire device, by pages. Utilizes RAM buffer.
182
183 ; call page_fill ; write
184 ; call verify_page_fill ; verify
185 ; jc fault ; jump on verify error
186
187
188 ; Write and verify one byte.
189
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