📄 apifunctions.c
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*
******************************************************************************/
RETURN_CODE
PlxPciPowerLevelGet(
DEVICE_EXTENSION *pdx,
PLX_POWER_LEVEL *pPowerLevel
)
{
*pPowerLevel = D0;
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxPciPmNcpRead
*
* Description: Read the Power Management Next Capabilities Pointer
*
******************************************************************************/
RETURN_CODE
PlxPciPmNcpRead(
DEVICE_EXTENSION *pdx,
U8 *pValue
)
{
*pValue = (U8)-1;
return ApiPMNotSupported;
}
/******************************************************************************
*
* Function : PlxPciHotSwapNcpRead
*
* Description: Read the HotSwap Next Capabilities Pointer
*
******************************************************************************/
RETURN_CODE
PlxPciHotSwapNcpRead(
DEVICE_EXTENSION *pdx,
U8 *pValue
)
{
*pValue = (U8)-1;
return ApiHSNotSupported;
}
/******************************************************************************
*
* Function : PlxPciHotSwapStatus
*
* Description: Read the HotSwap status register
*
******************************************************************************/
RETURN_CODE
PlxPciHotSwapStatus(
DEVICE_EXTENSION *pdx,
U8 *pValue
)
{
*pValue = (U8)-1;
return ApiHSNotSupported;
}
/******************************************************************************
*
* Function : PlxPciVpdNcpRead
*
* Description: Read the Vital Product Data Next Capabilities Pointer
*
******************************************************************************/
RETURN_CODE
PlxPciVpdNcpRead(
DEVICE_EXTENSION *pdx,
U8 *pValue
)
{
*pValue = (U8)-1;
return ApiVPDNotSupported;
}
/******************************************************************************
*
* Function : PlxPciVpdRead
*
* Description: Read the Vital Product Data
*
******************************************************************************/
RETURN_CODE
PlxPciVpdRead(
DEVICE_EXTENSION *pdx,
U16 offset,
U32 *pValue
)
{
*pValue = (U32)-1;
return ApiVPDNotSupported;
}
/******************************************************************************
*
* Function : PlxPciVpdWrite
*
* Description: Write to the Vital Product Data
*
******************************************************************************/
RETURN_CODE
PlxPciVpdWrite(
DEVICE_EXTENSION *pdx,
U16 offset,
U32 VpdData
)
{
return ApiVPDNotSupported;
}
/******************************************************************************
*
* Function : PlxEepromPresent
*
* Description: Determine if a programmed EEPROM is present on the device
*
******************************************************************************/
RETURN_CODE
PlxEepromPresent(
DEVICE_EXTENSION *pdx,
BOOLEAN *pFlag
)
{
U32 RegisterValue;
// Get EEPROM status register
RegisterValue =
PLX_REG_READ(
pdx,
PCI9080_EEPROM_CTRL_STAT
);
if (RegisterValue & (1 << 28))
{
*pFlag = TRUE;
}
else
{
*pFlag = FALSE;
}
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxEepromReadByOffset
*
* Description: Read a value from the EEPROM at a specified offset
*
******************************************************************************/
RETURN_CODE
PlxEepromReadByOffset(
DEVICE_EXTENSION *pdx,
U16 offset,
U32 *pValue
)
{
// Verify the offset
if ((offset & 0x3) || (offset > 0x100))
{
DebugPrintf(("ERROR - Invalid EEPROM offset\n"));
return ApiInvalidOffset;
}
// Read EEPROM
Pci9000_EepromReadByOffset(
pdx,
Eeprom93CS46,
offset,
pValue
);
DebugPrintf((
"EEPROM Offset %02X = %08X\n",
offset,
*pValue
));
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxEepromWriteByOffset
*
* Description: Write a 32-bit value to the EEPROM at a specified offset
*
******************************************************************************/
RETURN_CODE
PlxEepromWriteByOffset(
DEVICE_EXTENSION *pdx,
U16 offset,
U32 value
)
{
// Verify the offset
if ((offset & 0x3) || (offset > 0x100))
{
DebugPrintf(("ERROR - Invalid EEPROM offset\n"));
return ApiInvalidOffset;
}
// 9080 does not protect the EEPROM from write access, do nothing
// Write to EEPROM
Pci9000_EepromWriteByOffset(
pdx,
Eeprom93CS46,
offset,
value
);
DebugPrintf((
"Wrote %08X to EEPROM Offset %02X\n",
value,
offset
));
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxRegisterMailboxRead
*
* Description: Reads a valid Mailbox register from the PLX device
*
******************************************************************************/
RETURN_CODE
PlxRegisterMailboxRead(
DEVICE_EXTENSION *pdx,
MAILBOX_ID MailboxId,
U32 *pValue
)
{
// Verify Mailbox ID
if (MailboxId < MailBox0 || MailboxId > MailBox7)
{
*pValue = (U32)-1;
return ApiInvalidRegister;
}
// Check if Mailbox 0 or 1
if (MailboxId == MailBox0 || MailboxId == MailBox1)
{
*pValue =
PLX_REG_READ(
pdx,
PCI9080_MAILBOX0 + (MailboxId * sizeof(U32))
);
}
else
{
// Mailboxes 2 to 7 are not based from Malibox 0
*pValue =
PLX_REG_READ(
pdx,
PCI9080_MAILBOX2 + ((MailboxId-2) * sizeof(U32))
);
}
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxRegisterMailboxWrite
*
* Description: Write to one of the PLX device's Mailbox registers
*
******************************************************************************/
RETURN_CODE
PlxRegisterMailboxWrite(
DEVICE_EXTENSION *pdx,
MAILBOX_ID MailboxId,
U32 value
)
{
// Verify Mailbox ID
if (MailboxId < MailBox0 || MailboxId > MailBox7)
{
return ApiInvalidRegister;
}
if (MailboxId == MailBox0 || MailboxId == MailBox1)
{
PLX_REG_WRITE(
pdx,
PCI9080_MAILBOX0 + (MailboxId * sizeof(U32)),
value
);
}
else
{
PLX_REG_WRITE(
pdx,
PCI9080_MAILBOX2 + ((MailboxId-2) * sizeof(U32)),
value
);
}
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxRegisterDoorbellRead
*
* Description: Returns the last doorbell interrupt value
*
******************************************************************************/
RETURN_CODE
PlxRegisterDoorbellRead(
DEVICE_EXTENSION *pdx,
U32 *pValue
)
{
*pValue = pdx->IntrDoorbellValue;
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxRegisterDoorbellWrite
*
* Description: Sets the local Doorbell Register
*
******************************************************************************/
RETURN_CODE
PlxRegisterDoorbellWrite(
DEVICE_EXTENSION *pdx,
U32 value
)
{
PLX_REG_WRITE(
pdx,
PCI9080_LOCAL_DOORBELL,
value
);
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxMuInboundPortRead
*
* Description: Read the Inbound messaging port of a PLX device
*
******************************************************************************/
RETURN_CODE
PlxMuInboundPortRead(
DEVICE_EXTENSION *pdx,
U32 *pFrame
)
{
*pFrame =
PLX_REG_READ(
pdx,
0x40
);
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxMuInboundPortWrite
*
* Description: Write a posted message frame to the inbound port
*
******************************************************************************/
RETURN_CODE
PlxMuInboundPortWrite(
DEVICE_EXTENSION *pdx,
U32 Frame
)
{
PLX_REG_WRITE(
pdx,
0x40,
Frame
);
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxMuOutboundPortRead
*
* Description: Reads the posted message frame from the outbound port
*
******************************************************************************/
RETURN_CODE
PlxMuOutboundPortRead(
DEVICE_EXTENSION *pdx,
U32 *pFrame
)
{
*pFrame =
PLX_REG_READ(
pdx,
0x44
);
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxMuOutboundPortWrite
*
* Description: Writes to the outbound port with a free message frame
*
******************************************************************************/
RETURN_CODE
PlxMuOutboundPortWrite(
DEVICE_EXTENSION *pdx,
U32 Frame
)
{
PLX_REG_WRITE(
pdx,
0x44,
Frame
);
return ApiSuccess;
}
/******************************************************************************
*
* Function : PlxDmaControl
*
* Description: Control the DMA engine
*
******************************************************************************/
RETURN_CODE
PlxDmaControl(
DEVICE_EXTENSION *pdx,
DMA_CHANNEL channel,
DMA_COMMAND command
)
{
U8 i;
U8 shift;
U32 RegValue;
// Verify valid DMA channel
switch (channel)
{
case PrimaryPciChannel0:
i = 0;
shift = 0;
break;
case PrimaryPciChannel1:
i = 1;
shift = 8;
break;
default:
DebugPrintf(("ERROR - Invalid DMA channel\n"));
return ApiDmaChannelInvalid;
}
// Verify that this channel has been opened
if (pdx->DmaInfo[i].state == DmaStateClosed)
{
DebugPrintf(("ERROR - DMA Channel has not been opened\n"));
return ApiDmaChannelUnavailable;
}
switch (command)
{
case DmaPause:
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