smartgen.aws

cmos数据到fifo再到usb的fifo部分程序(68013a)

<?xml version="1.0" encoding="UTF-8" standalone="no" ?><workspace xmlns="http://actel.com/sweng/afi"><name>smartgen</name><netlistFormat>Verilog</netlistFormat><reports><resource select="T"/></reports><subproject libero="T"/><hdltype>Verilog</hdltype><componentInstances/><component name="usb_fifo32x16::work"/><component name="two_port1280x8::work"/><device die="IS2X2M1" family="ProASIC3" package="vq100"/><SmartGen version="8.0"/></workspace>