📄 _tvp5150a.h.bak
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/*
* Copyright 2003 by Texas Instruments Incorporated.
* All rights reserved. Property of Texas Instruments Incorporated.
* Restricted rights to use, duplicate or disclose this code are
* granted through contract.
*
*/
/* "@(#) DDK 1.10.00.23 07-02-03 (ddk-b12)" */
/********************************************************************************/
/* _tvp5150a.h file */
/********************************************************************************/
#ifndef __TVP5150A_H
#define __TVP5150A_H
#ifdef __cplusplus
extern "C" {
#endif
#include <tvp5150a.h>
#define _TVP5150A_IIC_ADDR0 (0xB8)
#define _TVP5150A_IIC_ADDR1 (0xBA)
#define _TVP5150A_TASKA 0
#define _TVP5150A_TASKB 1
typedef struct _TVP5150A_Generics
{
/* Video Input Source Selection #1 (0x00) */
Uns svideo_sel : 1;
Uns channel1_sel : 1;
Uns source_sel_rsv1 : 1;
Uns black_output : 1
Uns source_sel_rsv2: 4;
/* Analog Channel Controls (0x01) */
Uns automatic_gain_ctrl : 2;
Uns automatic_offset_ctrl : 2;
Uns analog_channel_ctrl_rsv : 4;
/* Operation Mode Controls (0x02) */
Uns power_down_mode : 1;
Uns luma_peak_disable : 1;
Uns color_subcarrier_pll_frozen : 1;
Uns white_peak_disable : 1;
Uns tv_vcr_mode : 2;
Uns color_burst_ref_disable : 1;
Uns operation_mode_ctrl_rsv : 1;
/* Miscellaneous Control (0x03) */
Uns clock_output_enable : 1;
Uns vertical_blanking_onoff : 1;
Uns hsync_vsync_output_enable : 1;
Uns ycrcb_output_enable : 1;
Uns lock_status : 1;
Uns gpcl_io_mode_sel : 1;
Uns gpcl : 1;
Uns vbko : 1;
/* Autoswitch Mask (0x04) */
Uns autoswitch_mask_rsv1 : 2
Uns palm_off : 1;
Uns paln_off : 1;
Uns n443_off : 1;
Uns sec_off : 1;
Uns autoswitch_mask_rsv2 : 2;
/* Software Reset (0x05) */
Uns reset : 1;
Uns software_reset_rsv : 7;
/* Color Killer Threshold Control (0x06) */
Uns color_killer_shreshold : 5;
Uns automatic_color_killer : 2;
Uns color_killer_shreshold_rsv: 1;
/* Luminance Processing Control #1 (0x07) */
Uns luminance_signal_delay : 4;
Uns luma_bypass : 1;
Uns disable_raw_header : 1;
Uns pedestal_not_present: 1;
Uns luma_bypass_mode : 1;
/* Luminance Processing Control #2 (0x08) */
Uns mac_agc_ctrl : 2;
Uns peaking_gain : 2;
Uns luminance_processing_ctrl_rsv1 : 2;
Uns luminance_filter_sel : 1;
Uns luminance_processing_ctrl_rsv2 : 1;
/* Brightness Control (0x09) */
Uint8 brightness_ctrl;
/* Saturation Control (0x0A) */
Uint8 saturation_ctrl;
/* Hue Control (0x0B) */
Uint8 hue_ctrl;
/* Contrast Control (0x0C) */
Uint8 contrast_ctrl;
/* Outputs and Data Select (0x0D) */
Uns ycrcb_output_format : 3;
Uns ycrcb_data_path_bypass : 2;
Uns cbcr_code_format : 1;
Uns ycbcr_output_code_range : 1;
Uns outputs_data_sel_rsv : 1;
/* Luminance Processing Control #3 (0x0E) */
Uns luminance_trap_filter_sel : 2;
Uns luminance_processing_ctrl_rsv3 : 6;
/* Configuration Shared Pins (0x0F) */
Uns sclk_pclk : 1;
Uns intreq_gpcl_vblk : 1;
Uns vsync_pali : 1;
Uns fid_glco : 1;
Uns lock24b : 1;
Uns lock24a : 1;
Uns lock23 : 1;
Uns config_shared_pins_rsv : 1;
/* Reserved (0x10) */
Uint8 rsv1;
/* Active Video Cropping Start Pixel MSB (0x11) */
Uint8 avid_start_pixel_msb;
/* Active Video Cropping Start Pixel LSB (0x12) */
Uns avid_start_pixel_lsb : 2;
Uns avid_active : 1;
Uns active_video_cropping_start_pixel_lsb_rsv : 5;
/* Active Video Cropping Stop Pixel MSB (0x13) */
Uint8 avid_stop_pixel_msb;
/* Active Video Cropping Stop Pixel LSB (0x14) */
Uns avid_stop_pixel_lsb : 2;
Uns active_video_cropping_stop_pixel_lsb_rsv : 6;
/* Genlock and RTC (0x15) */
Uns glco_rtc : 1;
Uns genlock_rtc_rsv1 : 1;
Uns cdto_sw : 1;
Uns genlock_rtc_rsv2 : 1;
Uns fv_bit_ctrl : 2;
Uns genlock_rtc_rsv3 : 2;
/* Horizontal Sync (HSYNC) Start (0x16) */
Uint8 hsync_start;
/* Reserved (0x17) */
Uint8 rsv2;
/* Vertical Blanking Start (0x18) */
Uint8 vertical_blanking_start;
/* Vertical Blanking Stop (0x19) */
Uint8 vertical_blanking_stop;
/* Chrominance Control #1 (0x1A) */
Uns automatic_color_gain_ctrl : 2;
Uns chrominance_comb_filter_enable : 1;
Uns chrominance_adaptive_comb_filter_enable : 1;
Uns color_pll_reset : 1;
Uns chrominance_control_rsv1 : 3;
/* Chrominance Control #2 (0x1B) */
Uns chrominance_filter_select : 2;
Uns wcf : 1;
Uns chrominance_control_rsv2 : 1;
Uns chrominance_comb_filter_mode : 4;
/* Interrupt Reset (0x1C) */
Uns tv_vcr_changed_reset : 1;
Uns hv_lock_changed_reset : 1;
Uns color_lock_changed_reset : 1;
Uns line_alternation_changed_reset : 1;
Uns field_rate_changed_reset : 1;
Uns command_ready_reset : 1;
Uns macrovision_detect_changed_reset : 1;
Uns software_initialization_reset : 1;
/* Interrupt Enable (0x1D) */
Uns tv_vcr_changed : 1;
Uns hv_lock_changed : 1;
Uns color_lock_changed : 1;
Uns line_alternation_changed : 1;
Uns field_rate_changed : 1;
Uns command_ready : 1;
Uns macrovision_detect_changed : 1;
Uns software_initialization_occurred_enable : 1;
/* Interrupt Configuration (0x1E) */
Uns interrupt_polarity_b : 1;
Uns interrupt_config_rsv : 7;
/* Reserved (0x1F) - (0x27) */
Uint8 rsv3[9];
/* Video Standard (0x28) */
Uns video_standard : 4;
Uns video_standard_rsv : 4;
/* Reserved (0x29) - (0x2B) */
Uint8 rsv4[3];
/* Cb Gain Factor (0x2C) */
Uint8 cb_gain_factor;
/* Cr Gain Factor (0x2D) */
Uint8 cr_gain_factor;
/* Macrovision On Counter (0x2E) */
Uint8 macrovision_on_counter;
/* Macrovision Off Counter (0x2F) */
Uint8 macrovision_off_counter;
/* Reserved (0x30) - (0x7F) */
Uint8 rsv5[80];
/* MSB of Device ID (0x80) */
Uint8 msb_of_device_id;
/* LSB of Device ID (0x81) */
Uint8 lsb_of_device_id;
/* ROM Version (0x82) */
Uint8 rom_version;
/* RAM Patch Code Version (0x83) */
Uint8 ram_patch_code_version;
/* Vertical Line Count MSB (0x84) */
Uns vertical_line_count_msb : 2;
Uns vertical_line_count_msb_rsv : 6;
/* Vertical Line Count LSB (0x85) */
Uint8 vertical_line_count_lsb;
}_TVP5150A_Generics;
typedef struct _TVP5150A_Globals
{
/* Global Control (0x80) */
Uns iPortMode : 4;
Uns taskAEnable : 1;
Uns taskBEnable : 1;
Uns reg80Unused : 1;
Uns continuousFieldMode : 1;
/* Reserved (0x81) */
Uns vEAV : 2;
Uns fTime : 1;
Uns reg81Unused : 5;
/* Unused (0x82) */
Uint8 reg82Unused;
/* Reserved (0x83) */
Uns xPortEnable : 2;
Uns xRDYType : 1;
Uns reg83AUnused : 1;
Uns xCLKSelect : 2;
Uns reg83BUnused : 2;
/* I Port Signal Dfinitions (0x84) */
Uns igpHSelect : 2;
Uns igpVSelect : 2;
Uns igp1SelectLSBs : 2;
Uns igp0SelectLSBs : 2;
/* I Port Signal Polarity (0x85) */
Uns idqPolarity : 1;
Uns iHSYNCPolarity : 1;
Uns iVSYNCPolarity : 1;
Uns igp0Polarity : 1;
Uns Igp1Polarity : 1;
Uns videoDataLimited : 1;
Uns dataOutputType : 2;
/* I Port FIFO (0x86) */
Uns faeFlagType : 2;
Uns fafFlagType : 2;
Uns igp0SelectMSB : 1;
Uns igp1SelectMSB : 1;
Uns iPortDataEnable : 1;
Uns dataPackingMode : 1;
/* I Port Delay (0x87) */
Uns iPortEnable : 2;
Uns reg87Unused : 2;
Uns iCLKControl : 2;
Uns idqControl : 2;
/* Power Save Control (0x88) */
Uns decoderOperational : 1;
Uns scalerOperational : 1;
Uns reg88Unused : 1;
Uns audioClockEnable : 1;
Uns devProgControl : 1;
Uns resetScaler : 1;
Uns analogCh1Enable : 1;
Uns AnalogCh2Enable : 1;
/* Null Array (0x89) - (0x8E) */
Uint8 nullArray1[6];
/* Scaler Status Information (0x8F) */
Uns scalerFIDOut : 1;
Uns scalerFIDIn : 1;
Uns errorFlag : 1;
Uns devProgStatus : 1;
Uns fifoOVFlag : 1;
Uns fifoAFFlag : 1;
Uns iTRIStatus : 1;
Uns xTRIStatus : 1;
}_TVP5150A_Globals;
typedef struct _TVP5150A_Task
{
/* Task handling control (0x90) (0xC0) */
Uns eventTrigger : 2;
Uns repeatTask : 1;
Uns fieldSkipType : 3;
Uns outputFieldID : 1;
Uns conlh : 1;
/* X Port Format (0x91) (0xC1) */
Uns yuvInputFormat : 1;
Uns chromaPerLine : 2;
Uns scalerDataContinuous : 1;
Uns scalerInputSource : 2;
Uns hldfv : 1;
Uns conlv : 1;
/* X Port Input Ref (0x92) (0xC2) */
Uns xDQNotUsed : 1;
Uns xDQPolarity : 1;
Uns xRHEdgeType : 1;
Uns xPortSyncVia656 : 1;
Uns xRVEdgeType : 1;
Uns xRVSignalType : 1;
Uns xFieldIDType : 1;
Uns xFieldEdgeType : 1;
/* I Port Format (0x93) (0xC3) */
Uns iPortDataFormat : 3;
Uns leadingYLines : 2;
Uns skipYLineFlag : 1;
Uns ins80 : 1;
Uns ccir656Enable : 1;
/* Window Sizes (0x94 - 0x9F) (0xC4 - 0xCF) */
Uint16 xInputOffset;
Uint16 xInputLength;
Uint16 yInputOffset;
Uint16 yInputLength;
Uint16 xOutputLength;
Uint16 yOutputLength;
/* Horizontal Prescaling (0xA0) (0xD0) */
Uint8 xPreScale;
/* Accumulation Length (0xA1) (0xD1) */
Uint8 xAccLength;
/* Prescaler DC Gain/FIR Prefilter Control (0xA2) (0xD2)*/
Uns scalerDCGain : 3;
Uns xACLWeighting : 1;
Uns yPreFilterType : 2;
Uns cxPreFilterType : 2;
/* Unused (0xA3) */
Uint8 regA3Unused;
/* Luminance brightness (0xA4) (0xD4) */
Uint8 brightness;
/* Luminance contrast (0xA5) (0xD5) */
Uint8 contrast;
/* Luminance saturation (0xA6) (0xD6) */
Uint8 saturation;
/* Unused (0xA7) */
Uint8 regA7Unused;
/* Horizontal scaling increment luma (0xA8 - 0xA9) (0xD8 - 0xD9)*/
Uint16 xLumaIncrement;
/* Horizontal phase offset luma (0xAA) (0xDA)*/
Uint8 xLumaPhaseOffset;
/* Unused (0xAB) */
Uint8 regABUnused;
/* Horizontal scaling increment chroma (0xAC - 0xAD) (0xDC - 0xDD)*/
Uint16 xChromaIncrement;
/* Horizontal phase offset chroma (0xAE) (0xDE)*/
Uint8 xChromaPhaseOffset;
/* Unused (0xAF) (0xDF) */
Uint8 regAFUnused;
/* Vertical scaling increment luma (0xB0 - 0xB1) (0xE0 - 0xE1)*/
Uint16 yLumaIncrement;
/* Vertical scaling increment chroma (0xB2 - 0xB3) (0xE2 - 0xE3)*/
Uint16 yChromaIncrement;
/* Vertical scaling mode control (0xB4) (0xE4)*/
Uns verticalScalingType : 1;
Uns regB4AUnused : 3;
Uns mirrorLineFlag : 1;
Uns regB4BUnused : 3;
/* Null Array (0xB5 - 0xB7) (0xE5 - 0xE7) */
Uint8 nullArray1[3];
/* Vertical Phase Offset Chroma (0xB8 - 0xBB) (0xE8 - 0xEB)*/
Uint8 yChromaPhaseOffset[4];
/* Vertical Phase Offset Luma (0xBC - 0xBF) (0xEC - 0xEF) */
Uint8 yLumaPhaseOffset[4];
} _TVP5150A_Task;
typedef struct _TVP5150A_PLL2
{
/* LFCO Per Line (0xF0)*/
Uint8 splpl;
/* Parameter Select (0xF1)*/
Uns splpl8 : 1;
Uns sphSel : 1;
Uns spMod : 2;
Uns sppi : 4;
/* Nominal PLL2 DTO (0xF2 - 0xF3)*/
Uint16 spnInc;
/* PLL2 Status (0xF4)*/
Uns spLock : 1;
Uns regF2Unused : 6;
/* Pulse generator Line Length (0xF5)*/
Uint8 pgLen;
/* Pulse A Position (0xF6)*/
Uns pgLenMsb : 1;
Uns pgHSel : 1;
Uns pgRes : 1;
Uns regF6Unused : 1;
Uns pgHAPS : 4;
/* Pulse A Position (0xF7)*/
Uint8 pgHAPSMsb;
/* Pulse B Position (0xF8)*/
Uns regF8Unused : 4;
Uns pgHBPS : 4;
/* Pulse B Position (0xF9)*/
Uint8 pgHBPSMsb;
/* Pulse C Position (0xFA)*/
Uns regFAUnused : 4;
Uns pgHCPS : 4;
/* Pulse C Position (0xFB)*/
Uint8 pgHCPSMsb;
/* Null Array (0xFC) - (0xFE)*/
Uint8 nullArray1[3];
/* S_PLL max (0xFF)*/
Uns spTHRM : 4;
Uns spTHRL : 4;
} _TVP5150A_PLL2;
typedef struct _TVP5150A_Regs
{
_TVP5150A_Generics generics;
_TVP5150A_Globals globals;
_TVP5150A_Task taskA;
_TVP5150A_Task taskB;
_TVP5150A_PLL2 pll2;
}_TVP5150A_Regs;
extern _TVP5150A_Regs _TVP5150A_settingsDef[2];
typedef struct _TVP5150A_XScaleParam
{
Uint8 acl;
Uint8 c21;
Uint8 dcGain;
}_TVP5150A_XScaleParam;
typedef struct _TVP5150A_XScale
{
_TVP5150A_XScaleParam xValues[64];
}_TVP5150A_XScale;
extern _TVP5150A_XScale _TVP5150A_xScale;
#ifdef __cplusplus
}
#endif
#endif /*#ifndef __TVP5150A_H*/
/********************************************************************************/
/* end of file */
/********************************************************************************/
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