ex7_4a.mdl
来自「线性调频信号通过匹配滤波器的程序 还有一些simulink仿真模型」· MDL 代码 · 共 157 行
MDL
157 行
Model { Name "ex6_4a" Version 2.09 SimParamPage Solver SampleTimeColors off InvariantConstants off WideVectorLines off ShowLineWidths off PaperOrientation landscape PaperType usletter PaperUnits inches StartTime "0.0" StopTime "1.0" Solver VariableStepDiscrete RelTol "1e-3" AbsTol "1e-6" Refine "1" MaxStep "auto" InitialStep "auto" FixedStep "auto" MaxOrder 5 OutputOption RefineOutputTimes OutputTimes "[]" LoadExternalInput off ExternalInput "[t, u]" SaveTime on TimeSaveName "tout" SaveState off StateSaveName "xout" SaveOutput on OutputSaveName "yout" LoadInitialState off InitialState "xInitial" SaveFinalState off FinalStateName "xFinal" LimitMaxRows off MaxRows "1000" Decimation "1" AlgebraicLoopMsg warning MinStepSizeMsg warning UnconnectedInputMsg warning UnconnectedOutputMsg warning UnconnectedLineMsg warning ConsistencyChecking off ZeroCross on SimulationMode normal RTWSystemTargetFile "grt.tlc" RTWInlineParameters off RTWRetainRTWFile off RTWTemplateMakefile "grt_vc.tmf" RTWMakeCommand "make_rtw" RTWGenerateCodeOnly off ExtModeMexFile "ext_comm" ExtModeBatchMode off BlockDefaults { Orientation right ForegroundColor black BackgroundColor white DropShadow off NamePlacement normal FontName "Helvetica" FontSize 10 FontWeight normal FontAngle normal ShowName on } AnnotationDefaults { HorizontalAlignment center VerticalAlignment middle ForegroundColor black BackgroundColor white DropShadow off FontName "Helvetica" FontSize 10 FontWeight normal FontAngle normal } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight normal FontAngle normal } System { Name "ex6_4a" Location [528, 158, 777, 301] Open on ScreenColor white Block { BlockType CombinatorialLogic Name "Combinatorial \nLogic\nNOT a" Position [80, 78, 110, 102] TruthTable "[1;0]" } Block { BlockType Display Name "Display" Ports [1, 0, 0, 0, 0] Position [145, 12, 230, 38] Format short Decimation "1" Floating off SampleTime "-1" } Block { BlockType Display Name "Display1" Ports [1, 0, 0, 0, 0] Position [145, 77, 230, 103] Format short Decimation "1" Floating off SampleTime "-1" } Block { BlockType Logic Name "Logical\nOperator" Ports [1, 1, 0, 0, 0] Position [80, 13, 110, 37] Operator NOT Inputs "1" } Block { BlockType Constant Name "a" Position [30, 15, 50, 35] Value "1" } Line { SrcBlock "a" SrcPort 1 Points [5, 0] Branch { Points [0, 65] DstBlock "Combinatorial \nLogic\nNOT a" DstPort 1 } Branch { DstBlock "Logical\nOperator" DstPort 1 } } Line { SrcBlock "Combinatorial \nLogic\nNOT a" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "Logical\nOperator" SrcPort 1 DstBlock "Display" DstPort 1 } }}
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