ae531xmac.c

atheros ar531x ethernet driver

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright © 2003 Atheros Communications, Inc.,  All Rights Reserved.
 */


/*
 * Ethernet driver for Atheros' ae531x ethernet MAC.
 */

#if linux
#include <linux/config.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
#include <asm/io.h>

#include "ar531xlnx.h"
#endif /* linux */

#include "ae531xreg.h"
#include "ae531xmac.h"

#if 1 //def DEBUG
int ae531x_MAC_debug = AE531X_DEBUG_ERROR;//AE531X_DEBUG_ALL;
#else
int ae531x_MAC_debug = 0;
#endif

extern char *ae531x_enet_mac_address_get(int);

/* Forward references to local functions */
static void ae531x_QueueDestroy(AE531X_QUEUE *q);


/******************************************************************************
*
* ae531x_ReadMacReg - read AE MAC register
*
* RETURNS: register value
*/
UINT32
ae531x_ReadMacReg(ae531x_MAC_t *MACInfo, UINT32 reg)
{
    UINT32 addr = MACInfo->macBase+reg;
    UINT32 data;

    data = RegRead(addr);
    return data;
}


/******************************************************************************
*
* ae531x_WriteMacReg - write AE MAC register
*
* RETURNS: N/A
*/
void
ae531x_WriteMacReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 data)
{
    UINT32 addr = MACInfo->macBase+reg;

    RegWrite(data, addr);
}


/******************************************************************************
*
* ae531x_SetMacReg - set bits in AE MAC register
*
* RETURNS: N/A
*/
void
ae531x_SetMacReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 val)
{
    UINT32 addr = MACInfo->macBase+reg;
    UINT32 data = RegRead(addr);

    data |= val;
    RegWrite(data, addr);
}


/******************************************************************************
*
* ae531x_ClearMacReg - clear bits in AE MAC register
*
* RETURNS: N/A
*/
void
ae531x_ClearMacReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 val)
{
    UINT32 addr = MACInfo->macBase+reg;
    UINT32 data = RegRead(addr);

    data &= ~val;
    RegWrite(data, addr);
}


/******************************************************************************
*
* ae531x_ReadDmaReg - read AE DMA register
*
* RETURNS: register value
*/
UINT32
ae531x_ReadDmaReg(ae531x_MAC_t *MACInfo, UINT32 reg)
{
    UINT32 addr = MACInfo->dmaBase+reg;
    UINT32 data = RegRead(addr);

    return data;
}


/******************************************************************************
*
* ae531x_WriteDmaReg - write AE DMA register
*
* RETURNS: N/A
*/
void
ae531x_WriteDmaReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 data)
{
    UINT32 addr = MACInfo->dmaBase+reg;

    RegWrite(data, addr);
}


/******************************************************************************
 *
 * ae531x_AckIntr - clear interrupt bits in the status register.
 * Note: Interrupt bits are *cleared* by writing a 1.
 */
void
ae531x_AckIntr(ae531x_MAC_t *MACInfo, UINT32 data)
{
      ae531x_WriteDmaReg(MACInfo, DmaStatus, data);
}


/******************************************************************************
*
* ae531x_SetDmaReg - set bits in an AE DMA register
*
* RETURNS: N/A
*/
void
ae531x_SetDmaReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 val)
{
    UINT32 addr = MACInfo->dmaBase+reg;
    UINT32 data = RegRead(addr);

    data |= val;
    RegWrite(data, addr);
}


/******************************************************************************
*
* ae531x_ClearDmaReg - clear bits in an AE DMA register
*
* RETURNS: N/A
*/
void
ae531x_ClearDmaReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 val)
{
    UINT32 addr = MACInfo->dmaBase+reg;
    UINT32 data = RegRead(addr);

    data &= ~val;
    RegWrite(data, addr);
}


/******************************************************************************
*
* ae531x_ReadMiiReg - read PHY registers via AE MAC Mii addr/data registers
*
* RETURNS: register value
*/
UINT32
ae531x_ReadMiiReg(UINT32 phyBase, UINT32 reg)
{
    UINT32 data;
    UINT32 addr = phyBase+reg;

    data = RegRead(addr);
    return data;
}


/******************************************************************************
*
* ae531x_WriteMiiReg - write PHY registers via AE MAC Mii addr/data registers
*
* RETURNS: N/A
*/
void
ae531x_WriteMiiReg(UINT32 phyBase, UINT32 reg, UINT32 data)
{
    UINT32 addr = phyBase+reg;

    RegWrite(data, addr);
}


/******************************************************************************
*
* ae531x_MiiRead - read AE Mii register
*
* RETURNS: register value
*/
UINT16
ae531x_MiiRead(UINT32 phyBase, UINT32 phyAddr, UINT8 reg)
{
    UINT32 addr;
    UINT16 data;

    addr = ((phyAddr << MiiDevShift) & MiiDevMask) | ((reg << MiiRegShift) & MiiRegMask);

    ae531x_WriteMiiReg(phyBase, MacMiiAddr, addr );
    do {
        /* nop */
    } while ((ae531x_ReadMiiReg(phyBase, MacMiiAddr ) & MiiBusy) == MiiBusy);

    data = ae531x_ReadMiiReg(phyBase, MacMiiData) & 0xFFFF;

    return data;
}


/******************************************************************************
*
* ae531x_MiiWrite - write AE Mii register
*
* RETURNS: N/A
*/
void
ae531x_MiiWrite(UINT32 phyBase, UINT32 phyAddr, UINT8 reg, UINT16 data)
{
    UINT32 addr;

    ae531x_WriteMiiReg(phyBase, MacMiiData, data );

    addr = ((phyAddr << MiiDevShift) & MiiDevMask) |
        ((reg << MiiRegShift) & MiiRegMask) | MiiWrite;
    ae531x_WriteMiiReg(phyBase, MacMiiAddr, addr );

    do {
        /* nop */
    } while ((ae531x_ReadMiiReg(phyBase, MacMiiAddr ) & MiiBusy) == MiiBusy);
}


/*******************************************************************************
* ae531x_BeginResetMode - enter a special "reset mode" in which
*    -no interrupts are expected from the device
*    -the device will not transmit nor receive
*    -attempts to send or receive will return with an error and
*    -the device will be reset at the next convenient opportunity.
*/
void
ae531x_BeginResetMode(ae531x_MAC_t *MACInfo)
{
    /* Set the reset flag */
    MACInfo->aeProcessRst = 1;
}


/*******************************************************************************
* ae531x_EndResetMode - exit the special "reset mode" entered
* earlier via a call to ae531x_BeginResetMode.
*/
void
ae531x_EndResetMode(ae531x_MAC_t *MACInfo)
{
    MACInfo->aeProcessRst = 0;
}


/*******************************************************************************
* ae531x_IsInResetMode - determine whether or not the device is
* currently in "reset mode" (i.e. that a device reset is pending)
*/
BOOL
ae531x_IsInResetMode(ae531x_MAC_t *MACInfo)
{
    return MACInfo->aeProcessRst;
}


/******************************************************************************
*
* ae531x_DmaRxStart - Start Rx
*
* RETURNS: N/A
*/
static void
ae531x_DmaRxStart(ae531x_MAC_t *MACInfo)
{
    ae531x_SetDmaReg(MACInfo, DmaControl, DmaRxStart);
    sysWbFlush();
}


/******************************************************************************
*
* ae531x_DmaRxStop - Stop Rx
*
* RETURNS: N/A
*/
void
ae531x_DmaRxStop(ae531x_MAC_t *MACInfo)
{
    ae531x_ClearDmaReg(MACInfo, DmaControl, DmaRxStart);
    sysWbFlush();
}


/******************************************************************************
*
* ae531x_DmaTxStart - Start Tx
*
* RETURNS: N/A
*/
void
ae531x_DmaTxStart(ae531x_MAC_t *MACInfo)
{
    ae531x_SetDmaReg(MACInfo, DmaControl, DmaTxStart);
    sysWbFlush();
}


/******************************************************************************
*
* ae531x_DmaTxStop - Stop Tx
*
* RETURNS: N/A
*/
void
ae531x_DmaTxStop(ae531x_MAC_t *MACInfo)
{
    ae531x_ClearDmaReg(MACInfo, DmaControl, DmaTxStart);
    sysWbFlush();
}


/******************************************************************************
*
* ae531x_DmaIntEnable - Enable DMA interrupts
*
* RETURNS: N/A
*/
void
ae531x_DmaIntEnable(ae531x_MAC_t *MACInfo)
{
    ae531x_WriteDmaReg(MACInfo, DmaIntrEnb, DmaIntEnable);
}


/******************************************************************************
*
* ae531x_DmaIntDisable - Disable DMA interrupts
*
* RETURNS: N/A
*/
void
ae531x_DmaIntDisable(ae531x_MAC_t *MACInfo)
{
    ae531x_WriteDmaReg(MACInfo, DmaIntrEnb, DmaIntDisable);
}


/******************************************************************************
*
* ae531x_DmaIntClear - Clear DMA interrupts
*
* RETURNS: N/A
*/
static void
ae531x_DmaIntClear(ae531x_MAC_t *MACInfo)
{
    /* clear all interrupt requests */
    ae531x_WriteDmaReg(MACInfo, DmaStatus,
                      ae531x_ReadDmaReg(MACInfo, DmaStatus));  
}


/******************************************************************************
* Initialize generic queue data
*/
void
ae531x_QueueInit(AE531X_QUEUE *q, char *pMem, int count)
{
    ARRIVE();
    q->firstDescAddr = pMem;
    q->lastDescAddr = (VIRT_ADDR)((UINT32)q->firstDescAddr +
                                  (count - 1) * AE531X_QUEUE_ELE_SIZE);
    q->curDescAddr = q->firstDescAddr;
    q->count = count;
    LEAVE();
}


/******************************************************************************
* ae531x_TxQueueCreate - create a circular queue of descriptors for Transmit
*/
static int
ae531x_TxQueueCreate(ae531x_MAC_t *MACInfo,
                  AE531X_QUEUE *q,
                  char *pMem,
                  int count)
{
    int         i;
    VIRT_ADDR   descAddr;

    ARRIVE();

    ae531x_QueueInit(q, pMem, count);
    q->reapDescAddr = q->lastDescAddr;

    /* Initialize Tx buffer descriptors.  */
    for (i=0, descAddr=q->firstDescAddr;
         i<count;
         i++, descAddr=(VIRT_ADDR)((UINT32)descAddr + AE531X_QUEUE_ELE_SIZE))
    {
        /* Update the size, BUFPTR, and SWPTR fields */

        AE531X_DESC_STATUS_SET(descAddr, 0);
        AE531X_DESC_CTRLEN_SET(descAddr, 0);

        AE531X_DESC_BUFPTR_SET(descAddr, (UINT32)0);
        AE531X_DESC_LNKBUF_SET(descAddr, (UINT32)0);
        AE531X_DESC_SWPTR_SET(descAddr, (void *)0);
    } /* for each desc */

    /* Make the queue circular */
    AE531X_DESC_CTRLEN_SET(q->lastDescAddr,
                       DescEndOfRing|AE531X_DESC_CTRLEN_GET(q->lastDescAddr));

    AE531X_PRINT(AE531X_DEBUG_RESET,
            ("ethmac%d Txbuf begin = %x, end = %x\n",
            MACInfo->unit,
            (UINT32)q->firstDescAddr,
            (UINT32)q->lastDescAddr));

    LEAVE();
    return 0;
}


/******************************************************************************
* ae531x_RxQueueCreate - create a circular queue of Rx descriptors
*/
int
ae531x_RxQueueCreate(ae531x_MAC_t *MACInfo,
                  AE531X_QUEUE *q,
                  char *pMem,
                  int count)
{
    int               i;
    VIRT_ADDR         descAddr;

    ARRIVE();

    ae531x_QueueInit(q, pMem, count);
    q->reapDescAddr = NULL;