ae531xreg.h

atheros ar531x ethernet driver

#define DmaRxBufferOverflowCnt  0x0000ffff  /* cleared on read */
#define DmaMissedFrameCountMask 0x0000ffff

/**********************************************************/
/* DMA Engine descriptor layout                           */
/**********************************************************/
/* status word of DMA descriptor */
#define DescOwnByDma         0x80000000 /* Descriptor is owned by DMA engine */
#define DescFrameLengthMask  0x3FFF0000 /* Receive descriptor frame length */
#define DescFrameLengthShift         16
#define DescError            0x00008000 /* Error summary bit OR of following bits */
#define DescRxTruncated      0x00004000 /* Rx - no more descs for receive frame */
#define DescRxLengthError    0x00001000 /* Rx - frame size not matching with length field */
#define DescRxRunt           0x00000800 /* Rx - runt frame, damaged by a
                                           collision or term before 64 bytes */
#define DescRxMulticast      0x00000400 /* Rx - received frame is multicast */
#define DescRxFirst          0x00000200 /* Rx - first descriptor of the frame */
#define DescRxLast           0x00000100 /* Rx - last descriptor of the frame */
#define DescRxLongFrame      0x00000080 /* Rx - frame is longer than 1518 bytes */
#define DescRxLateColl       0x00000040 /* Rx - frame was damaged by a late collision */
#define DescRxFrameEther     0x00000020 /* Rx - Frame type Ethernet 802.3*/ 
#define DescRxMiiError       0x00000008 /* Rx - error reported by MII interface */
#define DescRxDribbling      0x00000004 /* Rx - frame contains noninteger multiple of 8 bits */
#define DescRxCrc            0x00000002 /* Rx - CRC error */
#define DescTxTimeout        0x00004000 /* Tx - Transmit jabber timeout */
#define DescTxLostCarrier    0x00000800 /* Tx - carrier lost during tramsmission */
#define DescTxNoCarrier      0x00000400 /* Tx - no carrier signal from tranceiver */
#define DescTxLateCollision  0x00000200 /* Tx - transmission aborted due to collision */
#define DescTxExcCollisions  0x00000100 /* Tx - transmission aborted after 16 collisions */
#define DescTxHeartbeatFail  0x00000080 /* Tx - heartbeat collision check failure */
#define DescTxCollMask       0x00000078 /* Tx - Collision count */
#define DescTxCollShift               3
#define DescTxExcDeferral    0x00000004 /* Tx - excessive deferral */
#define DescTxUnderflow      0x00000002 /* Tx - late data arrival from memory */
#define DescTxDeferred       0x00000001 /* Tx - frame transmision deferred */

/* length word of DMA descriptor */
#define DescTxIntEnable      0x80000000 /* Tx - interrupt on completion */
#define DescTxLast           0x40000000 /* Tx - Last segment of the frame */
#define DescTxFirst          0x20000000 /* Tx - First segment of the frame */
#define DescTxDisableCrc     0x04000000 /* Tx - Add CRC disabled (first segment only) */
#define DescEndOfRing        0x02000000 /* End of descriptors ring */
#define DescChain            0x01000000 /* Second buffer address is chain address */
#define DescTxDisablePadd    0x00800000 /* disable padding */
#define DescSize2Mask        0x003FF800 /* Buffer 2 size */
#define DescSize2Shift               11
#define DescSize1Mask        0x000007FF /* Buffer 1 size */
#define DescSize1Shift                0

/**********************************************************/
/* Initial register values                                */
/**********************************************************/
/* Full-duplex mode with perfect filter on */
#define MacControlInitFdx \
       ( MacFilterOn \
       | MacLittleEndian \
       | MacHeartBeatOn \
       | MacSelectMii \
       | MacEnableRxOwn \
       | MacLoopbackOff \
       | MacFullDuplex \
       | MacMulticastFilterOn \
       | MacPromiscuousModeOff \
       | MacFilterNormal \
       | MacBadFramesDisable \
       | MacPerfectFilterOn \
       | MacHashFilterOff \
       | MacLateCollisionOff \
       | MacBroadcastEnable \
       | MacRetryEnable \
       | MacPadStripDisable \
       | MacDeferralCheckDisable \
       | MacTxEnable \
       | MacRxEnable)

/* Full-duplex mode */
#define MacFlowControlInitFdx \
        ( MacControlFrameDisable \
        | MacFlowControlEnable)

/* Half-duplex mode with perfect filter on */
#define MacControlInitHdx \
       ( MacFilterOn \
       | MacLittleEndian \
       | MacHeartBeatOn \
       | MacSelectMii \
       | MacDisableRxOwn \
       | MacLoopbackOff \
       | MacHalfDuplex \
       | MacMulticastFilterOn \
       | MacPromiscuousModeOff \
       | MacFilterNormal \
       | MacBadFramesDisable \
       | MacPerfectFilterOn \
       | MacHashFilterOff \
       | MacLateCollisionOff \
       | MacBroadcastEnable \
       | MacRetryEnable \
       | MacPadStripDisable \
       | MacDeferralCheckDisable \
       | MacTxEnable \
       | MacRxEnable)

/* Half-duplex mode */
#define MacFlowControlInitHdx \
        ( MacControlFrameDisable \
        | MacFlowControlDisable)

/* Bus Mode Rx odd half word align */
#define DmaBusModeInit  \
       ( DmaLittleEndianDesc \
       | DmaRxAlign16 \
       | DmaBurstLength32 \
       | DmaBigEndianData \
       | DmaDescriptorSkip1 \
       | DmaReceivePriorityOn \
       | DmaResetOff)

#define DmaControlInit (DmaStoreAndForward)

/* Interrupt groups */
#define DmaIntEnable \
     ( DmaIeNormal \
     | DmaIeAbnormal \
     | DmaIntBusError \
     | DmaIntRxStopped \
     | DmaIntRxNoBuffer \
     | DmaIntRxCompleted \
     | DmaIntTxUnderflow \
     | DmaIntTxStopped)

#define DmaIntDisable 0

#define DmaAllIntCauseMask \
      ( DmaIeNormal  \
      | DmaIeAbnormal  \
      | DmaIntEarlyRx  \
      | DmaIntBusError \
      | DmaIntEarlyTx  \
      | DmaIntRxStopped \
      | DmaIntRxNoBuffer \
      | DmaIntRxCompleted \
      | DmaIntTxUnderflow \
      | DmaIntTxJabber \
      | DmaIntTxNoBuffer \
      | DmaIntTxStopped \
      | DmaIntTxCompleted)

#define UnhandledIntrMask    \
       (DmaAllIntCauseMask   \
       & ~(DmaIntRxNoBuffer  \
         | DmaIntTxStopped   \
         | DmaIntTxJabber    \
         | DmaIntTxUnderflow \
         | DmaIntBusError    \
         | DmaIntRxCompleted ))

#define DescRxErrors    \
      (DescRxTruncated  \
     | DescRxRunt       \
     | DescRxLateColl   \
     | DescRxMiiError   \
     | DescRxCrc)

#define DescTxErrors        \
     ( DescTxTimeout        \
     | DescTxLateCollision  \
     | DescTxExcCollisions  \
     | DescTxExcDeferral    \
     | DescTxUnderflow)

/**********************************************************/
/* Descriptor Layout                                      */
/**********************************************************/
#define AE531X_DESC_STATUS     0x00 /* Status offset */
#define AE531X_DESC_CTRLEN     0x04 /* Control and Length offset */ 
#define AE531X_DESC_BUFPTR     0x08 /* Buffer pointer offset */
#define AE531X_DESC_LNKBUF     0x0c /* Link field offset, or ptr to 2nd buf */
#define AE531X_DESC_SWPTR      0x10 /* OS-Dependent software pointer */

#define AE531X_DESC_SIZE       0x10 /* 4 words, 16 bytes */
#define AE531X_QUEUE_ELE_SIZE  0x14 /* with software pointer extension */

/* Accessors to the dma descriptor fields */
#define AE531X_DESC_STATUS_GET(ptr) \
    *(volatile UINT32 *)((UINT32)(ptr) + AE531X_DESC_STATUS)

#define AE531X_DESC_STATUS_SET(ptr, val)  \
    AE531X_DESC_STATUS_GET(ptr) = (val)

#define AE531X_DESC_CTRLEN_GET(ptr) \
    *(volatile UINT32 *)((UINT32)ptr + AE531X_DESC_CTRLEN)

#define AE531X_DESC_CTRLEN_SET(ptr, val)  \
    AE531X_DESC_CTRLEN_GET(ptr) = (val)

#define AE531X_DESC_BUFPTR_GET(ptr) \
    *(volatile UINT32 *)((UINT32)ptr + AE531X_DESC_BUFPTR)

#define AE531X_DESC_BUFPTR_SET(ptr,val)  \
    AE531X_DESC_BUFPTR_GET(ptr) = (UINT32)(val)

#define AE531X_DESC_LNKBUF_GET(ptr)  \
    *(volatile UINT32 *)((UINT32)ptr + AE531X_DESC_LNKBUF)

#define AE531X_DESC_LNKBUF_SET(ptr, val)  \
    AE531X_DESC_LNKBUF_GET(ptr) = (val)

#define AE531X_DESC_SWPTR_GET(ptr) \
    (void *)(*(volatile UINT32 *) ((UINT32)ptr + AE531X_DESC_SWPTR))

#define AE531X_DESC_SWPTR_SET(ptr,val)   \
    AE531X_DESC_SWPTR_GET(ptr) = (void *)(val)

/* Get size of Rx data from desc, in bytes */
#define AE531X_DESC_STATUS_RX_SIZE(x) \
        (((x) & DescFrameLengthMask) >> DescFrameLengthShift)

#endif /* _AE531XREG_H_ */