📄 new.txt
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Block {
BlockType BusCreator
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType BusSelector
MuxedOutput off
}
Block {
BlockType Clock
DisplayTime off
}
Block {
BlockType CombinatorialLogic
TruthTable "[0 0;0 1;0 1;1 0;0 1;1 0;1 0;1 1]"
SampleTime "-1"
}
Block {
BlockType Constant
Value "1"
VectorParams1D on
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
SampleTime "inf"
}
Block {
BlockType DataTypeConversion
OutDataTypeMode "Inherit via back propagation"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
ConvertRealWorld "Real World Value (RWV)"
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Demux
Outputs "4"
DisplayOption "none"
BusSelectionMode off
}
Block {
BlockType Derivative
LinearizePole "inf"
}
Block {
BlockType DiscreteIntegrator
IntegratorMethod "Integration: Forward Euler"
gainval "1.0"
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
InitialConditionMode "State and output"
SampleTime "1"
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow off
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
IgnoreLimit off
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType DiscreteStateSpace
A "1"
B "1"
C "1"
D "1"
X0 "0"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
Realization "auto"
}
Block {
BlockType DiscreteTransferFcn
Numerator "[1]"
Denominator "[1 0.5]"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
Realization "auto"
}
Block {
BlockType EnablePort
StatesWhenEnabling "held"
ShowOutputPort off
ZeroCross on
}
Block {
BlockType From
IconDisplay "Tag"
}
Block {
BlockType Fcn
Expr "sin(u[1])"
SampleTime "-1"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParameterDataTypeMode "Same as input"
ParameterDataType "sfix(16)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "2^0"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Goto
IconDisplay "Tag"
}
Block {
BlockType Ground
}
Block {
BlockType HitCross
HitCrossingOffset "0"
HitCrossingDirection "either"
ShowOutputPort on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType InitialCondition
Value "1"
SampleTime "-1"
}
Block {
BlockType Inport
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
Interpolate on
}
Block {
BlockType Logic
Operator "AND"
Inputs "2"
AllPortsSameDT on
OutDataTypeMode "Logical (see Configuration Parameters: Optimiza"
"tion)"
LogicDataType "uint(8)"
SampleTime "-1"
}
Block {
BlockType Lookup
InputValues "[-4:5]"
OutputValues " rand(1,10)-0.5"
LookUpMeth "Interpolation-Extrapolation"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
LUTDesignTableMode "Redesign Table"
LUTDesignDataSource "Block Dialog"
LUTDesignFunctionName "sqrt(x)"
LUTDesignUseExistingBP on
LUTDesignRelError "0.01"
LUTDesignAbsError "1e-6"
}
Block {
BlockType MultiPortSwitch
Inputs "4"
zeroidx off
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType PMComponent
SubClassName "unknown"
}
Block {
BlockType PMIOPort
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType RateTransition
Integrity on
Deterministic on
X0 "0"
OutPortSampleTime "-1"
}
Block {
BlockType RateLimiter
RisingSlewLimit "1"
FallingSlewLimit "-1"
SampleTimeMode "continuous"
InitialCondition "0"
LinearizeAsGain on
}
Block {
BlockType RelationalOperator
Operator ">="
InputSameDT on
LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimiza"
"tion)"
LogicDataType "uint(8)"
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Saturate
UpperLimit "0.5"
LowerLimit "-0.5"
LinearizeAsGain on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Scope
Floating off
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Selector
InputType "Vector"
IndexMode "One-based"
ElementSrc "Internal"
Elements "1"
RowSrc "Internal"
Rows "1"
ColumnSrc "Internal"
Columns "1"
InputPortWidth "-1"
IndexIsStartValue off
OutputPortSize "1"
}
Block {
BlockType Signum
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Sin
SineType "Time based"
TimeSource "Use simulation time"
Amplitude "1"
Bias "0"
Frequency "1"
Phase "0"
Samples "10"
Offset "0"
SampleTime "-1"
VectorParams1D on
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Terminator
}
Block {
BlockType ToWorkspace
VariableName "simulink_output"
MaxDataPoints "1000"
Decimation "1"
SampleTime "0"
FixptAsFi off
}
Block {
BlockType Trigonometry
Operator "sin"
OutputSignalType "auto"
SampleTime "-1"
}
Block {
BlockType UnitDelay
X0 "0"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType ZeroOrderHold
SampleTime "1"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "dc3_example"
Location [51, 82, 792, 466]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "460 V 60 Hz"
Ports [0, 0, 0, 0, 0, 1, 3]
Position [95, 89, 195, 161]
FontName "Arial"
FontSize 12
SourceBlock "powerlib/Electrical\nSources/Three-Phase Source"
SourceType "Three-Phase Source"
ShowPortLabels on
Voltage "460"
PhaseAngle "0"
Frequency "60"
InternalConnection "Yn"
SpecifyImpedance off
Resistance "0.01"
Inductance "0.1e-3"
ShortCircuitLevel "0"
BaseVoltage "0"
XRratio "0"
}
Block {
BlockType Reference
Name "Converter\nsignals"
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