📄 drivers.c
字号:
*/
AssertCE(); /* Enables MC13192 SPI */
SPISendChar((u8Addr & 0x3f) | 0x80); /* Mask address, 6bit addr, Set
* read bit.
*/
SPIWaitTransferDone(); /* For this bit to be set, SPTED MUST be set */
SPIClearRecieveDataReg(); /*
* Clear receive data register. SPI
* entirely ready for read or write
*/
SPISendChar(u8Addr ); /*
* Dummy write. Receive register of SPI
* will contain MSB
*/
SPIWaitTransferDone(); /*
* For this bit to be set, SPTED MUST be
* set. Get MSB
*/
((UINT8*)&u16Data)[0] = SPIRead(); /* MSB */
SPISendChar(u8Addr); /*
* Dummy write. Waiting until after
* reading received data insures no
* overrun
*/
SPIWaitTransferDone(); /*
* For this bit to be set, SPTED MUST be
* set. Get LSB
*/
((UINT8*)&u16Data)[1] = SPIRead(); /* LSB */
DeAssertCE(); /* Disables MC13192 SPI */
RestoreStatusReg();
return u16Data;
}
/************************************************************
Function: void RAMDrvWriteTxFifo(UINT8 *psdu, UINT8 psduLength)
Parameter: psdu pointer to the packet
Return: psduLength length of the packet
Description: write the packet to the Tx fifo to transmit
************************************************************/
void RAMDrvWriteTxFifo(UINT8 *psdu, UINT8 psduLength)
{
UINT8 i, u8TempByte, u8TempValue; /* Temporary counters */
UINT16 u16Reg; /* TX packet length register value */
u16Reg = SPIDrvRead(TX_PKT_LEN); /*
* Read the TX packet length register
* contents
*/
u16Reg = (0xFF80 & u16Reg) | (psduLength + 2); /*
* Mask out old
* length setting and
* update. Add 2 for
* CRC
*/
SPIDrvWrite(TX_PKT_LEN, u16Reg); /* Update the TX packet length field */
SPIClearRecieveStatReg(); /* Clear status register
* (possible SPRF, SPTEF)
*/
SPIClearRecieveDataReg(); /*
* Clear receive data register. SPI entirely
* ready for read or write
*/
SaveStatusReg(); /* Necessary to prevent double SPI access */
AssertCE(); /* Enables MC13192 SPI */
SPISendChar(TX_PKT); /* SPI TX ram data register */
SPIWaitTransferDone(); /*
* For this bit to be set, SPTED MUST be set.
* Now write content MSB
*/
SPIClearRecieveDataReg(); /* Clear receive data register. SPI entirely
* ready for read or write
*/
u8TempByte = 0; /* Byte counter for *contents */
/* Word loop. Round up. */
for (i = 0; i < ((psduLength + 1) >> 1); i ++)
{
CLRWDT();
SPISendChar(psdu[u8TempByte + 1]); /* Write MSB */
SPIWaitTransferDone(); /*
* For this bit to be set, SPTED MUST be set.
* Now write content LSB
*/
SPIClearRecieveDataReg();/*
* Clear receive data register. SPI entirely
* ready for read or write
*/
SPISendChar(psdu[u8TempByte]); /* Write LSB */
u8TempByte = u8TempByte + 2; /* Increment byte counter */
SPIWaitTransferDone(); /* For this bit to be set, SPTED MUST be set.*/
SPIClearRecieveDataReg();/*
* Clear receive data register. SPI entirely
* ready for read or write
*/
}
DeAssertCE(); /* Disables MC13192 SPI */
RestoreStatusReg();
}
/************************************************************
Function: void RAMDrvWriteTxFifo(UINT8 *psdu, UINT8 psduLength)
Parameter: psdu pointer to the packet
psduLength length of the packet
Return: data length
Description: Read the packet from the Rxx fifo
************************************************************/
UINT8 RAMDrvReadRxFifo(UINT8 *psdu, UINT16 BufferSize)
{
UINT8 i, u8TempByte; /* Temporary counters. */
UINT8 u8TempValue; /*
* Used by SPIClearRecieveDataReg to
* flush SPI1D register during read
*/
UINT8 psduLength;
psduLength = SPIDrvRead(RX_PKT_LEN) & 0x7f; /* Get the RX packet length
* from the register
*/
if(psduLength < 3) return 0;
psduLength = psduLength - 2;
if(psduLength > BufferSize) return 0;
SaveStatusReg();
SPIClearRecieveStatReg(); /* Clear status register (SPRF, SPTEF) */
SPIClearRecieveDataReg(); /*
* Clear receive data register.
* SPI entirely ready for read or write
*/
AssertCE(); /* Enables MC13192 SPI */
SPISendChar(RX_PKT | 0x80); /* SPI RX ram data register */
SPIWaitTransferDone(); /* For this bit to be set, SPTED
* MUST be set.
*/
SPIClearRecieveDataReg(); /*
* Clear receive data register.
* SPI entirely ready for read or write
*/
SPISendChar(u8TempValue); /*
* Dummy write. Receive register of SPI will
* contain MSB garbage for first read
*/
SPIWaitTransferDone(); /* For this bit to be set, SPTED MUST be set.*/
SPIClearRecieveDataReg(); /*
* Clear receive data register.
* SPI entirely ready for read or write
*/
SPISendChar(u8TempValue); /*
* Dummy write. Receive register of SPI will
* contain LSB garbage for first read
*/
SPIWaitTransferDone(); /* For this bit to be set, SPTED MUST be set.*/
SPIClearRecieveDataReg(); /*
* Clear receive data register.
* SPI entirely ready for read or write
*/
/* Byte codes */
u8TempByte = 0; /* Byte counter for *contents */
/* Word loop. Round up. */
for (i = 0; i < ((psduLength + 1) >> 1); i ++)
{
CLRWDT();
SPISendChar(u8TempValue);/*
* Dummy write. Receive register of SPI
* will contain MSB
*/
SPIWaitTransferDone(); /*
* For this bit to be set, SPTED MUST be
* set. Get MSB
*/
/* For a trailing garbage byte, just read and discard */
if ((u8TempByte + 1) == psduLength)
{
SPIClearRecieveDataReg(); /* Discard */
}
else
{
psdu[u8TempByte + 1] = SPIRead(); /* Read MSB */
}
SPISendChar(u8TempValue);/*
* Dummy write. Receive register of SPI
* will contain LSB
*/
SPIWaitTransferDone(); /*
* For this bit to be set, SPTED MUST be
* set. Get LSB
*/
psdu[u8TempByte] = SPIRead(); /* Read LSB */
u8TempByte = u8TempByte + 2; /* Increment byte counter */
}
DeAssertCE(); /* Disables MC13192 SPI */
RestoreStatusReg();
return psduLength;
}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -