isl12028.c

使用C8051F040单片机,用IO口(P0.3,P0.4)模拟I2C总线,控制实时时钟芯片ISL12028代码程序

//ISL12028.c
#include <INTRINS.H>
#include <C8051F040.H>	// Register definition file.
#include "C8051F040CPU.H"
#include "YC8051F040.H"
#include "ISL12028.h"

#define  ISL12028_SCL     P04
#define  ISL12028_SDA     P03
#define  SomeNOP();	_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
#define  SENDSTART	ISL12028_SDA=1;SomeNOP();ISL12028_SCL=1;SomeNOP();ISL12028_SDA=0;SomeNOP();ISL12028_SCL=0;SomeNOP()
#define  SENDSTOP	ISL12028_SDA=0;SomeNOP();ISL12028_SCL=1;SomeNOP();ISL12028_SDA=1;SomeNOP();ISL12028_SDA=0;SomeNOP();ISL12028_SCL=0
#define	 SENDAck	ISL12028_SDA=0;ISL12028_SCL=0;SomeNOP();ISL12028_SCL=1;SomeNOP();ISL12028_SCL=0;SomeNOP()
#define  SENDNOAck	ISL12028_SDA=1;ISL12028_SCL=0;SomeNOP();ISL12028_SCL=1;SomeNOP();ISL12028_SCL=0;SomeNOP()



//define RTC reg name
#define RTCStatus	0x003F
#define RTCY2K		0x0037
#define RTCDW		0x0036
#define RTCYR		0x0035
#define RTCMO		0x0034
#define RTCDT		0x0033
#define RTCHR		0x0032
#define RTCMN		0x0031
#define RTCSC		0x0030
#define RTCPWR		0x0014
#define RTCDTR		0x0013
#define RTCBL		0x0010
#define RTCWRITEADDRESS	0xDE
#define RTCREADADDRESS	0xDF

unsigned char RTCError=0x00;
unsigned char bdata ucRTCBitBuf;
sbit RTCBitBuf0 = ucRTCBitBuf^0;
sbit RTCBitBuf1 = ucRTCBitBuf^1;
sbit RTCBitBuf2 = ucRTCBitBuf^2;
sbit RTCBitBuf3 = ucRTCBitBuf^3;
sbit RTCBitBuf4 = ucRTCBitBuf^4;
sbit RTCBitBuf5 = ucRTCBitBuf^5;
sbit RTCBitBuf6 = ucRTCBitBuf^6;
sbit RTCBitBuf7 = ucRTCBitBuf^7;



void    _writeRTCbyte(  )
{
    ISL12028_SDA = RTCBitBuf7;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
    ISL12028_SDA = RTCBitBuf6;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
	ISL12028_SDA = RTCBitBuf5;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
	ISL12028_SDA = RTCBitBuf4;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
	ISL12028_SDA = RTCBitBuf3;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
	ISL12028_SDA = RTCBitBuf2;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
	ISL12028_SDA = RTCBitBuf1;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
	ISL12028_SDA = RTCBitBuf0;  SomeNOP(); ISL12028_SCL = 1;  SomeNOP();  ISL12028_SCL = 0; SomeNOP();
/*	ISL12028_SCL = 0;  SomeNOP(); ISL12028_SDA = RTCBitBuf6;  SomeNOP(); ISL12028_SCL = 1; SomeNOP();
    ISL12028_SCL = 0;  SomeNOP(); ISL12028_SDA = RTCBitBuf5;  SomeNOP(); ISL12028_SCL = 1; SomeNOP();
    ISL12028_SCL = 0;  SomeNOP(); ISL12028_SDA = RTCBitBuf4;  SomeNOP(); ISL12028_SCL = 1; SomeNOP();
    ISL12028_SCL = 0;  SomeNOP(); ISL12028_SDA = RTCBitBuf3;  SomeNOP(); ISL12028_SCL = 1; SomeNOP();
    ISL12028_SCL = 0;  SomeNOP(); ISL12028_SDA = RTCBitBuf2;  SomeNOP(); ISL12028_SCL = 1; SomeNOP();
    ISL12028_SCL = 0;  SomeNOP(); ISL12028_SDA = RTCBitBuf1;  SomeNOP(); ISL12028_SCL = 1; SomeNOP();
    ISL12028_SCL = 0;  SomeNOP(); ISL12028_SDA = RTCBitBuf0;  SomeNOP(); ISL12028_SCL = 1; SomeNOP();
	ISL12028_SCL = 0;*/
}
/*
Data is always clocked into the device on the rising edge of ISL12028_SCL and clocked out of
the device on the falling edge of ISL12028_SCL.
*/
void   _readRTCbyte( )
{
/*  ISL12028_SDA = 1;
    ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf7  = ISL12028_SDA; 
    ISL12028_SDA = 1;
	ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf6  = ISL12028_SDA;
    ISL12028_SDA = 1;
	ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf5  = ISL12028_SDA; 
    ISL12028_SDA = 1;
	ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf4  = ISL12028_SDA;
    ISL12028_SDA = 1;
	ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf3  = ISL12028_SDA; 
    ISL12028_SDA = 1;
	ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf2  = ISL12028_SDA;
    ISL12028_SDA = 1;
	ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf1  = ISL12028_SDA; 
    ISL12028_SDA = 1;
	ISL12028_SCL = 0; SomeNOP(); ISL12028_SCL = 1; SomeNOP(); RTCBitBuf0  = ISL12028_SDA;
	ISL12028_SCL = 0;
*/	

	ISL12028_SDA = 1;
    ISL12028_SCL = 1; SomeNOP(); RTCBitBuf7  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP();
    ISL12028_SDA = 1;
	ISL12028_SCL = 1; SomeNOP(); RTCBitBuf6  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP();
    ISL12028_SDA = 1;
	ISL12028_SCL = 1; SomeNOP(); RTCBitBuf5  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP(); 
    ISL12028_SDA = 1;
	ISL12028_SCL = 1; SomeNOP(); RTCBitBuf4  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP();
    ISL12028_SDA = 1;
	ISL12028_SCL = 1; SomeNOP(); RTCBitBuf3  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP();
    ISL12028_SDA = 1;
	ISL12028_SCL = 1; SomeNOP(); RTCBitBuf2  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP();
    ISL12028_SDA = 1;
	ISL12028_SCL = 1; SomeNOP(); RTCBitBuf1  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP(); 
    ISL12028_SDA = 1;
	ISL12028_SCL = 1; SomeNOP(); RTCBitBuf0  = ISL12028_SDA; ISL12028_SCL = 0; SomeNOP();
}

bit CheckAck(void)
{
	unsigned int errtime=0xffff;
	ISL12028_SDA=1;
	SomeNOP();
	ISL12028_SCL=1;
	SomeNOP();
	while(ISL12028_SDA) 
	{
		errtime--; 
		if (!errtime) 
		{
			SENDSTOP;
			RTCError=0x11;
			return 0;
		}
	}
	ISL12028_SCL=0;
	return 1;
}


void RTCRegPageWrite(unsigned char *pBuffer)
{//RTC Register should be written ONLY with Page Write.
	unsigned char *pIndex;
    unsigned char unCount = 8;
	
	pIndex = pBuffer;

	RTCRegWriteEnable();
	SENDSTART;
	ucRTCBitBuf = RTCWRITEADDRESS;//RTC Reg Address: 0x0030~0x0037
	_writeRTCbyte(  );	
	//Check ACK
	CheckAck();
	//received ACK	
	ucRTCBitBuf = (0x0030>>8)&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();
	ucRTCBitBuf = 0x0030&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();

	while(unCount)
	{
		ucRTCBitBuf = *pIndex;
		_writeRTCbyte(  );
		pIndex++;
		unCount--;
		CheckAck();
	}
	
	SENDSTOP;
	
}

void RTCRegPageRead(	unsigned int RegAddress,
					unsigned char *pBuffer,
    				unsigned char num)
{
	unsigned char *pIndex;
    unsigned int unCount;	

	unCount = num;
	pIndex = pBuffer;
	SENDSTART;
	ucRTCBitBuf = RTCWRITEADDRESS;	
	_writeRTCbyte(  );	
	//Check ACK
	CheckAck();

	//received ACK	
	ucRTCBitBuf = (RegAddress>>8)&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();
	ucRTCBitBuf = RegAddress&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();

	SENDSTART;
	ucRTCBitBuf = RTCREADADDRESS;
	_writeRTCbyte(  );
	CheckAck();
	
	while(unCount)
	{
		_readRTCbyte( );
		*pIndex = ucRTCBitBuf;		
		if( unCount > 1)
		{		
			SENDAck;
		}
		pIndex++;
		unCount--;
	}
	SENDNOAck;
	SENDSTOP;
}

void RTCRegWriteByte(unsigned int RegAddress, unsigned char WriteByte)
{
	
	SENDSTART;		
	ucRTCBitBuf = RTCWRITEADDRESS;
	_writeRTCbyte(  );	
	//Check ACK
	CheckAck();
	//received ACK	
	ucRTCBitBuf = (RegAddress>>8)&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();
	ucRTCBitBuf = RegAddress&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();
	ucRTCBitBuf = WriteByte;	
	_writeRTCbyte(  );
	CheckAck();
	SENDSTOP;
}

unsigned char RTCRegReadByte(unsigned int RegAddress)
{
	SENDSTART;
	ucRTCBitBuf = RTCWRITEADDRESS;	
	_writeRTCbyte(  );	
	//Check ACK
	CheckAck();

	//received ACK	
	ucRTCBitBuf = (RegAddress>>8)&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();
	ucRTCBitBuf = RegAddress&0x00FF;	
	_writeRTCbyte(  );
	CheckAck();

	SENDSTART;
	ucRTCBitBuf = RTCREADADDRESS;
	_writeRTCbyte(  );
	CheckAck();
	_readRTCbyte( );
	return ucRTCBitBuf;
}

void RTCRegWriteDisable()
{
	RTCRegWriteByte(RTCStatus, 0x00);

}
void RTCRegWriteEnable()
{
	RTCRegWriteByte(RTCStatus, 0x02);
	RTCRegWriteByte(RTCStatus, 0x06);
}

void SetPWR(unsigned char PWR)
{//set Vreset 2.63V;disable serial bus in battery backup mode;
//Set LEGACY POWER CONTROL MODE 
	RTCRegWriteByte(RTCPWR, PWR);

}

void SetDTR(unsigned char DTR)
{
/*
DTR Register - DTR2, DTR1, DTR0: Digital Trimming Register
The digital trimming Bits DTR2, DTR1 and DTR0 adjust the number of counts per second and average the ppm error to
achieve better accuracy.
DTR2 is a sign bit. DTR2 = 0 means frequency compensation is > 0. DTR2 = 1 means frequency
compensation is < 0.
DTR1 and DTR0 are scale bits. DTR1 gives 10 ppm adjustment and DTR0 gives 20 ppm adjustment.
*/
	RTCRegWriteByte(RTCDTR, DTR);	

}

void WatchDogDisable()
{
	unsigned char WDDisable;
	
	WDDisable =0x18;
	RTCRegWriteEnable();
	RTCRegWriteByte(RTCBL, WDDisable);
}


void os_init(void)
{
    int i = 0;
    SFRPAGE   = CONFIG_PAGE;
    OSCXCN    = 0x77;									//16M
    for (i = 0; i < 3000; i++);                         
    while ((OSCXCN & 0x80) == 0);
    CLKSEL    = 0x01;									
}
void port_init(void) //使用P0.3作为SDA,P0.4作为SCL
{
	SFRPAGE = CONFIG_PAGE;
	P0MDOUT	|= 0x10;
	P0 |= 0x10;

	XBR2|=0x40;
}