📄 usb1_.str
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<?xml version="1.0"?>
<!-- This strategy holds the translation of all the SECTIONS commands -->
<!-- reachable from the command line held in F:\DSP\usb_last\usb_last\usb1.arg MODULE GBL MODULE CLK MODULE PRD MODULE HWI MODULE SWI MODULE IDL -->
<strategy
version="6"
host="windows"
name="usb1_"
full_path="F:\\DSP\\usb_last\\usb_last\\usb1_.str"
comment="This strategy holds the translation of all the SECTIONS commands \nreachable from the command line held in F:\\DSP\\usb_last\\usb_last\\usb1.arg MODULE GBL MODULE CLK MODULE PRD MODULE HWI MODULE SWI MODULE IDL "
tracking=".\\usb1.arg"
dont_expand_iterators="1"
size_warnings="8"
>
<!-- CHANGE stack size OF c54x TO 0100h -->
<instr
op="4c"
s0="Memory Maps\\c54x"
s1="stack"
u3="100"
/>
<!-- NEW child output file OF Output Files WITH full_path=.\Debug\usb1.out HOLDING map c54x -->
<instr
op="27"
s0="Output Files"
s1=".\\Debug\\usb1.out"
s2="Memory Maps\\c54x"
u3="efe928"
/>
<!-- CHANGE make map file OF Output Files\usb1.out TO TRUE -->
<instr
op="3b"
s0="Output Files\\usb1.out"
u1="1"
/>
<!-- CHANGE map file name OF Output Files\usb1.out TO ".\Debug\usb1.map" -->
<instr
op="3a"
s0="Output Files\\usb1.out"
s1=".\\Debug\\usb1.map"
/>
<!-- REQUIRE biosi.a54\clk_run.o54\.bios:.norptb BE IN run_view -->
<instr
dont_undo="1"
op="25"
s0="Memory Maps\\c54x\\run_view"
s1="All Input Files\\iority\\biosi.a54\\clk_run.o54\\.bios:.norptb"
u2="1"
/>
<!-- REQUIRE biosi.a54\knl_swit_inst.o\.bios:.near BE IN run_view -->
<instr
dont_undo="1"
op="25"
s0="Memory Maps\\c54x\\run_view"
s1="All Input Files\\iority\\biosi.a54\\knl_swit_inst.o\\.bios:.near"
u2="1"
/>
<!-- REQUIRE biosi.a54\idl_stub_inst.o\.bios:.near BE IN run_view -->
<instr
dont_undo="1"
op="25"
s0="Memory Maps\\c54x\\run_view"
s1="All Input Files\\iority\\biosi.a54\\idl_stub_inst.o\\.bios:.near"
u2="1"
/>
<!-- REQUIRE biosi.a54\clk_start54.o54\.bios BE IN run_view -->
<instr
dont_undo="1"
op="25"
s0="Memory Maps\\c54x\\run_view"
s1="All Input Files\\iority\\biosi.a54\\clk_start54.o54\\.bios"
u2="1"
/>
<!-- REQUIRE biosi.a54\clk_isr.o54\.bios:.norptb BE IN run_view -->
<instr
dont_undo="1"
op="25"
s0="Memory Maps\\c54x\\run_view"
s1="All Input Files\\iority\\biosi.a54\\clk_isr.o54\\.bios:.norptb"
u2="1"
/>
<!-- REQUIRE biosi.a54\gbl_chip.o54\.bios:.near BE IN run_view -->
<instr
dont_undo="1"
op="25"
s0="Memory Maps\\c54x\\run_view"
s1="All Input Files\\iority\\biosi.a54\\gbl_chip.o54\\.bios:.near"
u2="1"
/>
<!-- NEW child output section OF run_view\Need Not Place WITH name=.vers, data_kind=hole, specl_kind=copy -->
<instr
op="45"
s0="Memory Maps\\c54x\\run_view\\Need Not Place"
s1=".vers"
u3="8"
u4="5"
/>
<!-- CHANGE dont inherit fill OF run_view\Need Not Place\.vers TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\Need Not Place\\.vers"
u1="1"
/>
<!-- CHANGE comment OF run_view\Need Not Place\.vers TO " version information " -->
<instr
op="46"
s0="Memory Maps\\c54x\\run_view\\Need Not Place\\.vers"
s1=" version information "
/>
<!-- NEW child output section OF run_view\data_memory\IDATA WITH name=.clk, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
s1=".clk"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\IDATA\.clk TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.clk"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\data_memory\IDATA\.clk TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.clk"
u1="1"
/>
<!-- ADD children of run_view\Not Yet Placed WITH kind=any section, base name=.clk TO run_view\data_memory\IDATA\.clk -->
<instr
op="8"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.clk"
s1="Memory Maps\\c54x\\run_view\\Not Yet Placed"
u2="4"
u3="40000054"
u4="1"
s5="TEMPLATE"
s6=".clk"
u8="1014"
u17="0"
/>
<!-- CHANGE alloc_kind OF run_view\data_memory\IDATA TO legacy_region -->
<instr
op="23"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
u1="f"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA WITH name=.prd, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
s1=".prd"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\IDATA\.prd TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.prd"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\data_memory\IDATA\.prd TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.prd"
u1="1"
/>
<!-- NEW child output section OF run_view\program_memory\VECT WITH name=.hwi_vec, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\program_memory\\VECT"
s1=".hwi_vec"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\program_memory\VECT\.hwi_vec TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\program_memory\\VECT\\.hwi_vec"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\program_memory\VECT\.hwi_vec TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\program_memory\\VECT\\.hwi_vec"
u1="1"
/>
<!-- NEW child output section OF run_view\program_memory\IPROG WITH name=.hwi, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\program_memory\\IPROG"
s1=".hwi"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\program_memory\IPROG\.hwi TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\program_memory\\IPROG\\.hwi"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\program_memory\IPROG\.hwi TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\program_memory\\IPROG\\.hwi"
u1="1"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA WITH name=.swi, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
s1=".swi"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\IDATA\.swi TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.swi"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\data_memory\IDATA\.swi TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.swi"
u1="1"
/>
<!-- ADD children of run_view\Not Yet Placed WITH kind=any section, base name=.swi TO run_view\data_memory\IDATA\.swi -->
<instr
op="8"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.swi"
s1="Memory Maps\\c54x\\run_view\\Not Yet Placed"
u2="4"
u3="40000054"
u4="1"
s5="TEMPLATE"
s6=".swi"
u8="1014"
u17="0"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA WITH name=.idl, data_kind=hole, alloc_kind=struct -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
s1=".idl"
u3="a"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\IDATA\.idl TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.idl"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\data_memory\IDATA\.idl TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.idl"
u1="1"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA\.idl WITH name=FROM_ALL_FILES_3, data_kind=hole -->
<instr
op="a"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.idl"
s1="FROM_ALL_FILES_3"
u3="8"
/>
<!-- ADD children of run_view\Not Yet Placed WITH kind=any section, base name=.idl TO run_view\data_memory\IDATA\.idl\FROM_ALL_FILES_3 -->
<instr
op="8"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.idl\\FROM_ALL_FILES_3"
s1="Memory Maps\\c54x\\run_view\\Not Yet Placed"
u2="4"
u3="40000054"
u4="1"
s5="TEMPLATE"
s6=".idl"
u8="1014"
u17="0"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA\.idl WITH name=FROM_ALL_FILES_4, data_kind=hole -->
<instr
op="a"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.idl"
s1="FROM_ALL_FILES_4"
u3="8"
/>
<!-- ADD children of run_view\Not Yet Placed WITH kind=any section, base name=.idlcal TO run_view\data_memory\IDATA\.idl\FROM_ALL_FILES_4 -->
<instr
op="8"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.idl\\FROM_ALL_FILES_4"
s1="Memory Maps\\c54x\\run_view\\Not Yet Placed"
u2="4"
u3="40000054"
u4="1"
s5="TEMPLATE"
s6=".idlcal"
u8="1014"
u17="0"
/>
<!-- NEW child output section OF run_view\data_memory\BIOSREGS WITH name=.sysregs, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\BIOSREGS"
s1=".sysregs"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\BIOSREGS\.sysregs TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\BIOSREGS\\.sysregs"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\data_memory\BIOSREGS\.sysregs TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\BIOSREGS\\.sysregs"
u1="1"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA WITH name=.bss, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
s1=".bss"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\IDATA\.bss TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.bss"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\data_memory\IDATA\.bss TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.bss"
u1="1"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA WITH name=.far, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
s1=".far"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\IDATA\.far TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.far"
u1="1"
/>
<!-- CHANGE force load placement OF run_view\data_memory\IDATA\.far TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.far"
u1="1"
/>
<!-- NEW child output section OF run_view\data_memory\IDATA WITH name=.sysdata, data_kind=hole -->
<instr
op="22"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA"
s1=".sysdata"
u3="8"
/>
<!-- CHANGE dont inherit fill OF run_view\data_memory\IDATA\.sysdata TO TRUE -->
<instr
op="3c"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.sysdata"
u1="1"
/>
<!-- ALIGN run address of run_view\data_memory\IDATA\.sysdata TO an address with 7 0's in the LSBs -->
<instr
op="2f"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.sysdata"
u2="7f"
/>
<!-- CHANGE force load placement OF run_view\data_memory\IDATA\.sysdata TO TRUE -->
<instr
op="55"
s0="Memory Maps\\c54x\\run_view\\data_memory\\IDATA\\.sysdata"
u1="1"
/>
<!-- ALIGN load address of run_view\data_memory\IDATA\.sysdata TO an address with 7 0's in the LSBs -->
<instr
op="30"
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