📄 read_reg.lst
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312 1 _nop_();
313 1 _nop_();
314 1 _nop_();
315 1 _nop_();
316 1
317 1 MCU_WR=1;
318 1 _nop_();
319 1 MCU_A0=1;
320 1 MCU_CS=1;
321 1
322 1 _nop_();
323 1 _nop_();
324 1 _nop_();
325 1 _nop_();
326 1 _nop_();
327 1 _nop_();
328 1
329 1 P0=0xFF; /////
330 1 _nop_();
331 1
332 1
333 1 MCU_CS=0;
334 1 MCU_RD=0;
335 1 _nop_();
336 1 _nop_();
337 1 _nop_();
338 1
339 1 regdata=P0;
340 1 _nop_();
341 1 _nop_();
342 1 _nop_();
343 1
344 1 MCU_RD=1;
345 1 _nop_();
346 1 MCU_CS=1;
347 1
348 1 _nop_();
349 1 _nop_();
350 1 _nop_();
351 1 _nop_();
352 1 _nop_();
353 1 _nop_();
354 1
355 1 return regdata;
356 1 }
357
358 void DEV_WriteRegMulti(U8 addr, U16 cnt, U8* buf)
359 {
360 1 U16 i;
361 1 U8 *dptr;
362 1 dptr=buf;
363 1
364 1
365 1 if(cnt<512)
C51 COMPILER V6.12 READ_REG 03/13/2007 09:54:33 PAGE 7
366 1 {
367 2 for(i=0;i<cnt;i++)
368 2 {
369 3 DEV_WriteReg(addr,*dptr++);
370 3 }
371 2 }
372 1 else
373 1 {
374 2 for(i=0;i<cnt;i++)
375 2 {
376 3 DEV_WriteReg(addr,i);
377 3 if((i%0x40) ==0)
378 3 RISC_sleep_cycles(100);
379 3 }
380 2
381 2 }
382 1 }
383
384
385 U8 DEV_ReadRegMulti(U8 addr, U16 cnt, register U8* buf)
386 {
387 1 U16 i;
388 1 register U8 regdata;
389 1
390 1 if(cnt<64)
391 1 {
392 2 if(buf!=TxNULL){
393 3 for(i=0x0;i<cnt;i++) {
394 4 *buf++ =DEV_ReadReg(addr);
395 4 }
396 3 }
397 2 else{
398 3 for(i=0x0;i<cnt;i++) {
399 4 regdata =DEV_ReadReg(addr);
400 4 }
401 3 }
402 2 return regdata;
403 2 }
404 1 else
405 1 {
406 2 if(buf!=TxNULL){
407 3 for(i=0x0;i<cnt;i++) {
408 4 *buf =DEV_ReadReg(addr);
409 4 }
410 3 }
411 2 else{
412 3 for(i=0x0;i<cnt;i++) {
413 4 regdata =DEV_ReadReg(addr);
414 4 }
415 3 }
416 2 }
417 1 }
418
419
420
421
422
423
424 /******************************************************************************
425 * check if device is connected
426 ******************************************************************************/
427
C51 COMPILER V6.12 READ_REG 03/13/2007 09:54:33 PAGE 8
428 U8 DEV_CheckDeviceConnection(void)
429 {
430 1 register U8 devAddr;
431 1
432 1 if(!UH_DEV_IS_PLUGGEDIN()) return RES_ERR;
433 1
434 1 devAddr = DEV_ReadReg(RH_DEV_ADDR);
435 1 if(devAddr==0){
436 2 DEV_WriteReg(RH_MASS_ADDR1,0x5A);
437 2 if(DEV_ReadReg(RH_MASS_ADDR1)!=0x5A) return RES_ERR;
438 2 DEV_WriteReg(RH_MASS_ADDR1,0);
439 2 return RES_OK;
440 2 }
441 1
442 1 return (gDevAddr==devAddr)?RES_OK:RES_ERR;
443 1 }
444
445 /******************************************************************************
446 * Wait (?)MSec
447 *
448 * INPUT: - msec: mili-sec intervals to measure
449 * RETURN:
450 * RES_OK
451 * RES_ERR
452 * NOTE:
453 * before this routine .. SOF must be enabled: "DEV_WriteReg(RH_CHIP_CTR2,0x10);"
454 * this timer may has maximum 1msec deviation !!!
455 ******************************************************************************/
456
457 U8 DEV_WaitMS(U16 msec)
458 {
459 1 U16 ms, res=RES_OK;
460 1
461 1 if(!UH_DEV_IS_PLUGGEDIN()) {return RES_ERR;}
462 1
463 1 DEV_WriteReg(RH_INT_EN,UH_IRQ_SOF);
464 1 DEV_ReadReg(0x08);
465 1 DEV_TimerStart(2);
466 1
467 1 for(ms=0;ms<msec&&gUsbTimeOver==0; )
468 1 {
469 2
470 2 if(UBi9021_IRQ_PENDING()){
471 3 if((DEV_ReadReg(RH_INT_STS)&UH_IRQ_SOF)>0){
472 4 DEV_TimerStart(2);
473 4 ms++;
474 4 }
475 3 //printf("IRQ PENDING....................................\n");
476 3 }
477 2 //printf("IRQ PENDING:%02x\n",UBi9021_IRQ_PENDING());
478 2 if(UBi9021_IRQ_PENDING()==0)
479 2 if(ISERR(DEV_CheckDeviceConnection())){res=RES_ERR; break; }
480 2 RISC_sleep_nsec(WFIRQ_SLEEP_TIME);
481 2 }
482 1 DEV_WriteReg(RH_INT_EN,0);
483 1 return res;
484 1 }
485
486 /******************************************************************************
487 * DSESCRIPION:
488 * wait for UBi9021 Host interrupt.
489 * If time-out occurs, reset UBi9021 chip.
C51 COMPILER V6.12 READ_REG 03/13/2007 09:54:33 PAGE 9
490 *
491 * INPUT:
492 * - bIRQ: anticipated IRQ bits (OR-ing)
493 *
494 * RETURN:
495 * - interrupt status: if enabled interrupt status occurs.
496 * - 0: if time-out
497 * - 4: if stall.
498 *
499 * EXAMPLE:
500 * UH_IRQ_EN(UH_IRQ_USB_PKT_DONE);
501 * UH_Trigger(gEPIN);
502 * if(DEV_WaitForIrq(UH_IRQ_USB_PKT_DONE)==0) return RES_ERR;
503 *
504 ******************************************************************************/
505
506 U8 DEV_WaitForIrq(U8 bIRQ)
507 {
508 1 U32 ticks=0;
509 1 DEV_TimerStart(gWaitUsbPktMsec);
510 1
511 1 while(gUsbTimeOver==0)
512 1 {
513 2 gUsbIrq = 0;
514 2 if(UBi9021_IRQ_PENDING())
515 2 {
516 3 GET_UBi9021_IRQ_STS(gUsbIrq);
517 3 if( (!(0x80&gEP)||(0xD0==gEP)) &&
518 3 (DEV_ReadReg(RH_LAST_PKT_STS)&UH_LST_PKT_STS_NAK) ){
519 4 DEV_WriteReg(RH_EP_ADDR_N_PID,gEP);
520 4 // printf(("DEV_WaitForIrq: NAK -> retry\n"));
521 4 continue;
522 4 }
523 3 if(gUsbIrq&bIRQ){
524 4 DEV_WriteReg(RH_INT_EN,0);
525 4 return gUsbIrq;
526 4 }
527 3 }
528 2 if((0xD0!=gEP) && DEV_ReadReg(RH_LAST_PKT_STS)==UH_LST_PKT_STS_STALL){
529 3 USB_ResetPipe(gEP&~0x10);
530 3 //printf(("DEV_WaitForIrq: stalled\n"));
531 3 return UH_IRQ_FAKE_STALL;//STALL mark
532 3 }
533 2 if(gDevAddr!=DEV_ReadReg(RH_DEV_ADDR)||0x5A!=DEV_ReadReg(RH_MASS_ADDR2)){
534 3 //printf(("DEV_WaitForIrq: addr error %x\n",DEV_ReadReg(RH_DEV_ADDR)));
535 3 break;
536 3 }
537 2 }
538 1 //printf(("DEV_WaitForIrq: timeout error, gSecCnt=%x\n",gSecCnt));
539 1 DEV_ResetChip(RST9021_FULL_RESET);
540 1 return 0;
541 1 }
542
543
544 U8 DEV_WaitForIrqV(U8 bIRQ) //for video playing
545 {
546 1 U8 pktSts=0;
547 1
548 1 DEV_TimerStart(gWaitUsbPktMsec);
549 1 while(gUsbTimeOver==0)
550 1 {
551 2 if(UBi9021_IRQ_PENDING())
C51 COMPILER V6.12 READ_REG 03/13/2007 09:54:33 PAGE 10
552 2 {
553 3 GET_UBi9021_IRQ_STS(gUsbIrq);
554 3 if((!(0x80&gEP)||(0xD0==gEP)) &&
555 3 (DEV_ReadReg(RH_LAST_PKT_STS)&UH_LST_PKT_STS_NAK) ){
556 4 DEV_WriteReg(RH_EP_ADDR_N_PID,gEP);
557 4 //printf(("DEV_WaitForIrqV: NAK -> retry\n"));
558 4 continue;
559 4 }
560 3
561 3 if(gUsbIrq&bIRQ){
562 4 DEV_WriteReg(RH_INT_EN,0);
563 4 return gUsbIrq;
564 4 }
565 3 }
566 2 if((0xD0!=gEP) && DEV_ReadReg(RH_LAST_PKT_STS)==UH_LST_PKT_STS_STALL){
567 3 USB_ResetPipe(gEP&~0x10);
568 3 //printf(("DEV_WaitForIrqV: stalled\n"));
569 3 return UH_IRQ_FAKE_STALL;//STALL mark
570 3 }
571 2 if(gDevAddr!=DEV_ReadReg(RH_DEV_ADDR)||0x5A!=DEV_ReadReg(RH_MASS_ADDR2)){
572 3 //printf(("DEV_WaitForIrqV: addr error %x\n",DEV_ReadReg(RH_DEV_ADDR)));
573 3 break;
574 3 }
575 2 }
576 1
577 1 //printf(("DEV_WaitForIrqV: timeout error, gSecCnt=%x\n",gSecCnt));
578 1 DEV_ResetChip(RST9021_FULL_RESET);
579 1 return 0;
580 1 }
581
582
583
584
585
586 void ubi9021_hardreset()
587 {
588 1
589 1 gInitState=IS_NO_INIT;
590 1 //IO_BUS_RESET_READY;
591 1 IO_BUS_RESET_HIGH;//PW_RST_PORT_LOW;
592 1 RISC_sleep_cycles(UMO_RESET_IDLE_TICKS);
593 1 IO_BUS_RESET_LOW;//PW_RST_PORT_LOW;
594 1
595 1 RISC_sleep_cycles(UMO_RESET_IDLE_TICKS);
596 1 IO_BUS_RESET_HIGH;//PW_RST_PORT_LOW;
597 1
598 1 RISC_sleep_cycles(UMO_RESET_IDLE_TICKS);
599 1 IO_BUS_RESET_LOW;//PW_RST_PORT_LOW;
600 1
601 1 RISC_sleep_cycles(UMO_RESET_IDLE_TICKS);
602 1
603 1 IO_BUS_RESET_HIGH;//PW_RST_PORT_LOW;
604 1 MCU_SEL_OUT =0x01;
605 1 RISC_sleep_cycles(UMO_RESET_IDLE_TICKS);
606 1
607 1
608 1 DEV_WriteReg(RH_CHIP_CTR2,0x20);
609 1 //RISC_sleep_cycles(UMO_RESET_IDLE_TICKS);
610 1 UH_ENFORCE_HOST_MODE();
611 1 UH_ENFORCE_HOST_MODE();
612 1 //RISC_sleep_cycles(UMO_RESET_IDLE_TICKS);
613 1
C51 COMPILER V6.12 READ_REG 03/13/2007 09:54:33 PAGE 11
614 1 DEV_WriteReg(RH_CHIP_CTR2,0x10);
615 1
616 1 }
617
618 /******************************************************************************
619 * reset UBi9021 chip (not USB device reset)
620 *
621 * RETURN:
622 * RES_OK
623 * RES_ERR+1: device removed
624 ******************************************************************************/
625
626 U8 DEV_ResetChip(U8 mode)
627 {
628 1 gInitState=IS_NO_INIT;
629 1
630 1 if(mode&RST9021_FULL_RESET)
631 1 {
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