chuan9850.s

用avr调AD9850的DDS的资料！一个很稳定的信号源！

	.module chuan9850.c
	.area data(ram, con, rel)
_str::
	.blkb 2
	.area idata
	.byte 0,0
	.area data(ram, con, rel)
	.blkb 2
	.area idata
	.byte 'M,'p
	.area data(ram, con, rel)
	.blkb 2
	.area idata
	.byte 163,215
	.area data(ram, con, rel)
	.dbfile E:\mcu\avr\test\AD9850\chuan9850.c
	.dbsym e str _str A[6:6]c
	.area text(rom, con, rel)
	.dbfile E:\mcu\avr\test\AD9850\chuan9850.c
	.dbfunc e set_wclk _set_wclk fV
;              i -> R16
	.even
_set_wclk::
	.dbline -1
	.dbline 8
; /*RESET=pa0 WCLK=pa2 FQUD=pa1 D7=PA3 */
; #include<iom128v.h>
; #include<macros.h>
; //char str[]={0x00,0x00,0x3d,0x70,0xa3,0xd7};//30m
; //char str[]={0x00,0x00,0x05,0x62,0x4d,0xd2};//40m
; char str[]={0x00,0x00,0x4d,0x70,0xa3,0xd7};//30m
; void set_wclk(unsigned char i)
; {
	.dbline 9
;  if(i) PORTA|=0X04;
	tst R16
	breq L2
	.dbline 9
	sbi 0x1b,2
	xjmp L3
L2:
	.dbline 10
	in R24,0x1b
	andi R24,251
	out 0x1b,R24
L3:
	.dbline -2
L1:
	.dbline 0 ; func end
	ret
	.dbsym r i 16 c
	.dbend
	.dbfunc e set_fqud _set_fqud fV
;              i -> R16
	.even
_set_fqud::
	.dbline -1
	.dbline 13
;  else  PORTA&=0XFb;
; }
; void set_fqud(unsigned char i)
; {
	.dbline 14
;  if(i) PORTA|=0X02;
	tst R16
	breq L5
	.dbline 14
	sbi 0x1b,1
	xjmp L6
L5:
	.dbline 15
	in R24,0x1b
	andi R24,253
	out 0x1b,R24
L6:
	.dbline -2
L4:
	.dbline 0 ; func end
	ret
	.dbsym r i 16 c
	.dbend
	.dbfunc e set_reset _set_reset fV
;              i -> R16
	.even
_set_reset::
	.dbline -1
	.dbline 18
;  else  PORTA&=0XFd;
; }
; void set_reset(unsigned char i)
; {
	.dbline 19
;  if(i) PORTA|=0X01;
	tst R16
	breq L8
	.dbline 19
	sbi 0x1b,0
	xjmp L9
L8:
	.dbline 20
	in R24,0x1b
	andi R24,254
	out 0x1b,R24
L9:
	.dbline -2
L7:
	.dbline 0 ; func end
	ret
	.dbsym r i 16 c
	.dbend
	.dbfunc e set_d7 _set_d7 fV
;              i -> R16
	.even
_set_d7::
	.dbline -1
	.dbline 23
;  else  PORTA&=0XFE;
; }
; void set_d7(unsigned char i)
; {
	.dbline 24
;  if(i) PORTA|=0X08;
	tst R16
	breq L11
	.dbline 24
	sbi 0x1b,3
	xjmp L12
L11:
	.dbline 25
	in R24,0x1b
	andi R24,247
	out 0x1b,R24
L12:
	.dbline -2
L10:
	.dbline 0 ; func end
	ret
	.dbsym r i 16 c
	.dbend
	.dbfunc e chuli _chuli fV
;              i -> R20
;            com -> R22
	.even
_chuli::
	xcall push_gset2
	mov R22,R16
	.dbline -1
	.dbline 28
;  else  PORTA&=0XF7;
; }
; void chuli(unsigned char com)
; {
	.dbline 30
;  unsigned char i;
;  set_wclk(0);
	clr R16
	xcall _set_wclk
	.dbline 31
;  for(i=0;i<8;i++)
	clr R20
	xjmp L17
L14:
	.dbline 32
;   {
	.dbline 33
;    if(com|0xfe==0xff)//要移的位为低位
	tst R22
	breq L18
	.dbline 34
;     {set_d7(1);}
	.dbline 34
	ldi R16,1
	xcall _set_d7
	.dbline 34
	xjmp L19
L18:
	.dbline 36
;    else
;     {set_d7(0);}
	.dbline 36
	clr R16
	xcall _set_d7
	.dbline 36
L19:
	.dbline 37
	lsr R22
	.dbline 38
	ldi R16,1
	xcall _set_wclk
	.dbline 39
	clr R16
	xcall _set_wclk
	.dbline 40
L15:
	.dbline 31
	inc R20
L17:
	.dbline 31
	cpi R20,8
	brlo L14
	.dbline -2
L13:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.dbsym r i 20 c
	.dbsym r com 22 c
	.dbend
	.dbfunc e ad9850 _ad9850 fV
;              i -> R20
	.even
_ad9850::
	xcall push_gset1
	.dbline -1
	.dbline 43
;    com>>=1;
;    set_wclk(1);
;    set_wclk(0);	
;   }
; }  
; void ad9850()
; {
	.dbline 45
;  unsigned char i;
;  set_fqud(0);
	clr R16
	xcall _set_fqud
	.dbline 46
;  for(i=5;i>0;i--)
	ldi R20,5
	xjmp L24
L21:
	.dbline 47
	.dbline 47
	ldi R24,<_str
	ldi R25,>_str
	mov R30,R20
	clr R31
	add R30,R24
	adc R31,R25
	ldd R16,z+0
	xcall _chuli
	.dbline 47
L22:
	.dbline 46
	dec R20
L24:
	.dbline 46
	clr R2
	cp R2,R20
	brlo L21
	.dbline 48
;   {chuli(str[i]);}
;  set_fqud(1);
	ldi R16,1
	xcall _set_fqud
	.dbline 49
;  set_fqud(0); 
	clr R16
	xcall _set_fqud
	.dbline -2
L20:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
	.dbsym r i 20 c
	.dbend
	.dbfunc e setup _setup fV
	.even
_setup::
	.dbline -1
	.dbline 52
; }
; void setup()
; {
	.dbline 53
;   set_wclk(0);
	clr R16
	xcall _set_wclk
	.dbline 54
;   set_fqud(0);
	clr R16
	xcall _set_fqud
	.dbline 55
;   set_wclk(1);
	ldi R16,1
	xcall _set_wclk
	.dbline 56
;   set_wclk(0);
	clr R16
	xcall _set_wclk
	.dbline 57
;   set_fqud(1);
	ldi R16,1
	xcall _set_fqud
	.dbline 58
;   set_fqud(0);
	clr R16
	xcall _set_fqud
	.dbline -2
L25:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e m128_init _m128_init fV
	.even
_m128_init::
	.dbline -1
	.dbline 61
; }
; void m128_init()
; {
	.dbline 62
;  DDRA=0XFF;
	ldi R24,255
	out 0x1a,R24
	.dbline 63
;  PORTA=0XFF;
	out 0x1b,R24
	.dbline 64
;  DDRB=0X00;
	clr R2
	out 0x17,R2
	.dbline 65
;  PORTB=0XFF;
	out 0x18,R24
	.dbline 66
;  DDRC=0X00;
	out 0x14,R2
	.dbline 67
;  PORTC=0XFF;
	out 0x15,R24
	.dbline 68
;  DDRD=0X00;
	out 0x11,R2
	.dbline 69
;  PORTD=0XFF;
	out 0x12,R24
	.dbline 70
;  DDRE=0X00;
	out 0x2,R2
	.dbline 71
;  PORTE=0XFF;
	out 0x3,R24
	.dbline -2
L26:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e main _main fV
	.even
_main::
	.dbline -1
	.dbline 74
; }
; void main()
; {
	.dbline 75
;  m128_init();
	xcall _m128_init
	.dbline 76
;  set_reset(0);
	clr R16
	xcall _set_reset
	.dbline 77
;  setup();
	xcall _setup
	.dbline 78
;  ad9850();
	xcall _ad9850
L28:
	.dbline 79
L29:
	.dbline 79
	xjmp L28
X0:
	.dbline -2
L27:
	.dbline 0 ; func end
	ret
	.dbend