📄 co0511.lst
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03C0 B387 IN R24,0x17
03C1 6F89 ORI R24,0xF9
03C2 BB87 OUT 0x17,R24
(0431) DDRB&=0Xf9;
03C3 B387 IN R24,0x17
03C4 7F89 ANDI R24,0xF9
03C5 BB87 OUT 0x17,R24
(0432) DDRC=0Xff;
03C6 EF8F LDI R24,0xFF
03C7 BB84 OUT 0x14,R24
(0433) DDRD=0Xff;
03C8 BB81 OUT 0x11,R24
(0434) DDRE=0Xff;
03C9 B982 OUT 0x02,R24
(0435) DDRF=0Xff;
03CA 93800061 STS 0x61,R24
(0436) PORTA=0xff;
03CC BB8B OUT 0x1B,R24
(0437) //PORTB=0Xff;
(0438) PORTC=0xff;
03CD BB85 OUT 0x15,R24
(0439) PORTD=0xff;
03CE BB82 OUT 0x12,R24
(0440) PORTE=0xff;
03CF B983 OUT 0x03,R24
(0441) PORTF=0xff;
03D0 93800062 STS 0x62,R24
(0442)
(0443) }
03D2 9508 RET
(0444) /********max195初始化********/
(0445) void max195_inital(void)
(0446) {
(0447) set_cs_195(1);
_max195_inital:
03D3 E001 LDI R16,1
03D4 DF0D RCALL _set_cs_195
(0448) set_sclk_195(0);
03D5 2700 CLR R16
(0449) }
03D6 CEFB RJMP _set_sclk_195
(0450) /**********************
(0451) max195转换开始
(0452) **********************/
(0453) void max195_start(void)
(0454) {
(0455) set_conv(0);//，启动转换
_max195_start:
03D7 2700 CLR R16
03D8 DF01 RCALL _set_conv
(0456) delay_nus(10);
03D9 E00A LDI R16,0xA
03DA E010 LDI R17,0
03DB DECE RCALL _delay_nus
(0457) set_conv(1);
03DC E001 LDI R16,1
(0458) }
03DD CEFC RJMP _set_conv
_max195_read:
k --> R20
num1 --> R22
num2 --> R10
03DE 940E04B3 CALL push_gset3
(0459) /***********************/
(0460) void max195_read()
(0461) { uint num2=0;
03E0 24AA CLR R10
03E1 24BB CLR R11
(0462) uchar num1=0,k;
03E2 2766 CLR R22
(0463) while((PINB&0x02)==0x02);
03E3 B226 IN R2,0x16
03E4 2433 CLR R3
03E5 FC21 SBRC R2,1
03E6 CFFC RJMP 0x03E3
(0464) set_cs_195(0);
03E7 2700 CLR R16
03E8 DEF9 RCALL _set_cs_195
(0465) for(k=0;k<16;k++)
03E9 2744 CLR R20
03EA C01A RJMP 0x0405
(0466) {
(0467) set_sclk_195(1);
03EB E001 LDI R16,1
03EC DEE5 RCALL _set_sclk_195
(0468) delay_1us();
03ED DEBA RCALL _delay_1us
(0469) if((PINB&0x04)==0x04)//判断pa1是否为1
03EE B386 IN R24,0x16
03EF 7084 ANDI R24,4
03F0 3084 CPI R24,4
03F1 F411 BNE 0x03F4
(0470) {
(0471) num1=1;
03F2 E061 LDI R22,1
(0472) //PORTA|=0x20;
(0473) }
03F3 C001 RJMP 0x03F5
(0474) else
(0475) {
(0476) num1=0;
03F4 2766 CLR R22
(0477) //PORTA&=0xdf;
(0478) }
(0479) num2=num2*2+num1;
03F5 E002 LDI R16,2
03F6 E010 LDI R17,0
03F7 0195 MOVW R18,R10
03F8 940E047F CALL empy16s
03FA 0158 MOVW R10,R16
03FB 2E26 MOV R2,R22
03FC 2433 CLR R3
03FD 0CA2 ADD R10,R2
03FE 1CB3 ADC R11,R3
(0480) set_sclk_195(0);//下降沿锁存下一位
03FF 2700 CLR R16
0400 DED1 RCALL _set_sclk_195
(0481) delay_nus(3);
0401 E003 LDI R16,3
0402 E010 LDI R17,0
0403 DEA6 RCALL _delay_nus
0404 9543 INC R20
0405 3140 CPI R20,0x10
0406 F320 BCS 0x03EB
(0482) }
(0483) turn[n++]=num2/1024;
0407 90200180 LDS R2,0x180
0409 2433 CLR R3
040A 2D82 MOV R24,R2
040B 5F8F SUBI R24,0xFF
040C 93800180 STS 0x180,R24
040E E02A LDI R18,0xA
040F E030 LDI R19,0
0410 0185 MOVW R16,R10
0411 940E04C1 CALL lsr16
0413 E080 LDI R24,0
0414 E091 LDI R25,1
0415 2DE2 MOV R30,R2
0416 27FF CLR R31
0417 0FE8 ADD R30,R24
0418 1FF9 ADC R31,R25
0419 8300 STD Z+0,R16
(0484) set_conv(0);//，启动转换
041A 2700 CLR R16
041B DEBE RCALL _set_conv
(0485) delay_nus(10);
041C E00A LDI R16,0xA
041D E010 LDI R17,0
041E DE8B RCALL _delay_nus
(0486) set_conv(1);
041F E001 LDI R16,1
0420 DEB9 RCALL _set_conv
(0487) }
0421 940E0492 CALL pop_gset3
0423 9508 RET
_display:
page --> R20
point --> R22
i --> R10
num --> R12
0424 940E04B7 CALL push_gset4
(0488) /*************************************/
(0489) display()
(0490) {uchar i,point,page,num;
(0491) clrram ();
0426 DF34 RCALL _clrram
(0492) w_com (0xaf);
0427 EA0F LDI R16,0xAF
0428 DF1A RCALL _w_com
(0493) w_com (0xc0);
0429 EC00 LDI R16,0xC0
042A DF18 RCALL _w_com
(0494) for(i=0;i<128;i++)
042B 24AA CLR R10
042C C020 RJMP 0x044D
(0495) {
(0496) point=turn[i];
042D E080 LDI R24,0
042E E091 LDI R25,1
042F 2DEA MOV R30,R10
0430 27FF CLR R31
0431 0FE8 ADD R30,R24
0432 1FF9 ADC R31,R25
0433 8160 LDD R22,Z+0
(0497) page=point/8;
0434 2F46 MOV R20,R22
0435 9546 LSR R20
0436 9546 LSR R20
0437 9546 LSR R20
(0498) num=point%8;
0438 E018 LDI R17,0x8
0439 2F06 MOV R16,R22
043A 940E0467 CALL mod8u
043C 2EC0 MOV R12,R16
(0499) w_com(0xb0+page);
043D 2F04 MOV R16,R20
043E 5500 SUBI R16,0x50
043F DF03 RCALL _w_com
(0500) // num=0x01<<(num);
(0501) // wr_dat(num);
(0502) if(num==0)
0440 20CC TST R12
0441 F419 BNE 0x0445
(0503) w_data(0x02);
0442 E002 LDI R16,2
0443 DF0B RCALL _w_data
0444 C005 RJMP 0x044A
(0504) else
(0505) num=0x03<<(num);
0445 E003 LDI R16,3
0446 2D1C MOV R17,R12
0447 940E04BB CALL lsl8
0449 2EC0 MOV R12,R16
(0506) w_data(num);
044A 2D0C MOV R16,R12
044B DF03 RCALL _w_data
044C 94A3 INC R10
044D 2D8A MOV R24,R10
044E 3880 CPI R24,0x80
044F F2E8 BCS 0x042D
(0507) }
(0508) //w_com(0xae);
(0509) }
0450 940E0495 CALL pop_gset4
0452 9508 RET
(0510) /***************主函数**************************/
(0511) void main()
(0512) {
(0513) uchar i,k;
(0514) uint m;
(0515) init_m16();
_main:
m --> Y+1
k --> Y+1
i --> Y+1
0453 DF6A RCALL _init_m16
(0516) set_c86(1);
0454 E001 LDI R16,1
0455 DEBC RCALL _set_c86
(0517) set_ps(0);
0456 2700 CLR R16
0457 DEC2 RCALL _set_ps
(0518) w_com(0xaf);
0458 EA0F LDI R16,0xAF
0459 DEE9 RCALL _w_com
(0519) clrram ();
045A DF00 RCALL _clrram
(0520) init_lcd ();
045B DF19 RCALL _init_lcd
(0521) max195_inital();
045C DF76 RCALL _max195_inital
(0522) /* for(i=64;i>0;i--)
(0523) {
(0524) w_com(0x40+i);
(0525) img_disp(tab5);
(0526) w_com(0xc0);
(0527) delay_nms(100);
(0528) }*/
(0529) max195_start();
045D DF79 RCALL _max195_start
045E C006 RJMP 0x0465
(0530) //delay_nms(1);
(0531) while (1)
(0532) {
(0533) //PORTC&=0xfe;
(0534) while(n<128)
(0535) max195_read();
045F DF7E RCALL _max195_read
0460 91800180 LDS R24,0x180
0462 3880 CPI R24,0x80
0463 F3D8 BCS 0x045F
(0536) //for(i=0;i<128;i++)
(0537) // FFT_Re[i]*=turn[i];
(0538) // FFT_Proc();
(0539) display();
0464 DFBF RCALL _display
0465 CFFA RJMP 0x0460
(0540) //w_com(0xc0);
(0541) //delay_nms(100);
(0542) }
(0543) }
FILE: <library>
0466 9508 RET
mod8u:
0467 9468 BSET 6
0468 C001 RJMP xdiv8u
div8u:
0469 94E8 BCLR 6
xdiv8u:
046A 932A ST R18,-Y
046B 92FA ST R15,-Y
046C 92EA ST R14,-Y
046D 24FF CLR R15
046E 24EE CLR R14
046F E120 LDI R18,0x10
0470 0F00 LSL R16
0471 1CFF ROL R15
0472 1CEE ROL R14
0473 16E1 CP R14,R17
0474 F010 BCS 0x0477
0475 1AE1 SUB R14,R17
0476 9503 INC R16
0477 952A DEC R18
0478 F7B9 BNE 0x0470
0479 F40E BRTC 0x047B
047A 2D0E MOV R16,R14
047B 90E9 LD R14,Y+
047C 90F9 LD R15,Y+
047D 9129 LD R18,Y+
047E 9508 RET
empy16s:
047F 920A ST R0,-Y
0480 921A ST R1,-Y
0481 938A ST R24,-Y
0482 939A ST R25,-Y
0483 9F02 MUL R16,R18
0484 01C0 MOVW R24,R0
0485 9F12 MUL R17,R18
0486 0D90 ADD R25,R0
0487 9F03 MUL R16,R19
0488 0D90 ADD R25,R0
0489 018C MOVW R16,R24
048A 9199 LD R25,Y+
048B 9189 LD R24,Y+
048C 9019 LD R1,Y+
048D 9009 LD R0,Y+
048E 9508 RET
pop_gset2:
048F E0E2 LDI R30,2
0490 940C049C JMP pop
pop_gset3:
0492 E0E4 LDI R30,4
0493 940C049C JMP pop
pop_gset4:
0495 E0E8 LDI R30,0x8
0496 940C049C JMP pop
push_gset1:
0498 935A ST R21,-Y
0499 934A ST R20,-Y
049A 9508 RET
pop_gset1:
049B E0E1 LDI R30,1
pop:
049C 9149 LD R20,Y+
049D 9159 LD R21,Y+
049E FDE0 SBRC R30,0
049F 9508 RET
04A0 9169 LD R22,Y+
04A1 9179 LD R23,Y+
04A2 FDE1 SBRC R30,1
04A3 9508 RET
04A4 90A9 LD R10,Y+
04A5 90B9 LD R11,Y+
04A6 FDE2 SBRC R30,2
04A7 9508 RET
04A8 90C9 LD R12,Y+
04A9 90D9 LD R13,Y+
04AA FDE3 SBRC R30,3
04AB 9508 RET
04AC 90E9 LD R14,Y+
04AD 90F9 LD R15,Y+
04AE 9508 RET
push_gset2:
04AF 937A ST R23,-Y
04B0 936A ST R22,-Y
04B1 940C0498 JMP push_gset1
push_gset3:
04B3 92BA ST R11,-Y
04B4 92AA ST R10,-Y
04B5 940C04AF JMP push_gset2
push_gset4:
04B7 92DA ST R13,-Y
04B8 92CA ST R12,-Y
04B9 940C04B3 JMP push_gset3
lsl8:
04BB 2311 TST R17
04BC F019 BEQ 0x04C0
04BD 0F00 LSL R16
04BE 951A DEC R17
04BF CFFB RJMP lsl8
04C0 9508 RET
lsr16:
04C1 2322 TST R18
04C2 F021 BEQ 0x04C7
04C3 9516 LSR R17
04C4 9507 ROR R16
04C5 952A DEC R18
04C6 CFFA RJMP lsr16
04C7 9508 RET
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