pccard.h

Windows CE操作系统中适用的蓝牙驱动程序

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
#ifndef __PCCARD__
#define __PCCARD__


///////////////////////////////////////////////////////////
// TYPES for compatibility
//////////////////////////////////////////////////////////

#ifndef U32INT
#define U32INT unsigned long
#endif

#ifndef U16INT
#define U16INT	unsigned short
#endif


#ifndef UINT8
#define UINT8 unsigned char
#endif

/////////////////////////////////////////////////////////////
// CONSTANTS
////////////////////////////////////////////////////////////

#define FIRST_TX_BUFFER			0
#define SECOND_TX_BUFFER		1

#define FIRST_RX_BUFFER			0
#define SECOND_RX_BUFFER		1


//Addresses to registers
#define FIRST_TX_BUFFER_LENGTH_OFFSET	0x00
#define FIRST_TX_BUFFER_DATA_OFFSET		0x01

#define SECOND_TX_BUFFER_LENGTH_OFFSET	0x10
#define SECOND_TX_BUFFER_DATA_OFFSET	0x11

#define FIRST_RX_BUFFER_LENGTH_OFFSET	0x00
#define FIRST_RX_BUFFER_FIRST_WINDOW_DATA_OFFSET	0x01
#define FIRST_RX_BUFFER_SECOND_WINDOW_DATA_OFFSET	0x00

#define SECOND_RX_BUFFER_LENGTH_OFFSET	0x10
#define SECOND_RX_BUFFER_FIRST_WINDOW_DATA_OFFSET	0x11
#define SECOND_RX_BUFFER_SECOND_WINDOW_DATA_OFFSET	0x10

#define CMD_REGISTER_OFFSET				0x20
#define INTERRUPT_REGISTER_OFFSET		0x21
#define CONTROL_REGISTER_OFFSET			0x22
#define NVRAM_REGISTER_OFFSET			0x23
#define RX_CTRL_REGISTER_OFFSET			0x24

#ifdef NVRAM
#define CARD_RESET_OFFSET				0x25
#define LED_CTRL_OFFSET					0x25
#else
#define CARD_RESET_OFFSET				0x30
#define LED_CTRL_OFFSET					0x30
#endif

//Constants
#define TXBUFFERSIZE					0x0F
#define RX_FIRST_WINDOW_SIZE			0x0F
#define RX_SECOND_WINDOW_SIZE			0x10
#define RXBUFFERSIZE					(RX_FIRST_WINDOW_SIZE + RX_SECOND_WINDOW_SIZE)

//Commands
#define START_FIRST_TX_BUFFER			0x01
#define START_SECOND_TX_BUFFER			0x02
#define START_FIRST_RX_BUFFER			0x04
#define START_SECOND_RX_BUFFER			0x08
#define SET_FIRST_RX_WINDOW				0x00
#define SET_SECOND_RX_WINDOW			0x10

//Interrupt reasons
#define FIRST_TX_BUFFER_EMPTY			0x01
#define SECOND_TX_BUFFER_EMPTY			0x02
#define INTERRUPT_REASON_TX				0x03
#define FIRST_RX_BUFFER_READY			0x04
#define SECOND_RX_BUFFER_READY			0x08
#define INTERRUPT_REASON_RX				0x0C
#define RX_BUFFER_OVERRUN				0x10

//Controls
#define BAUD_RATE_BITMASK				(UINT8)0x03
#define BAUD_RATE_57600_BITMASK			(UINT8)0x00
#define BAUD_RATE_115200_BITMASK		(UINT8)0x01
#define BAUD_RATE_230400_BITMASK		(UINT8)0x02
#define BAUD_RATE_460800_BITMASK		(UINT8)0x03

#define RTS_BIT_MASK					(UINT8)0x04
#define RTS_ON_FLAG						(UINT8)0
#define RTS_OFF_FLAG					(UINT8)1

#define BT_ON_MASK						(UINT8)0x08
#define BT_ON_FLAG						(UINT8)1
#define BT_OFF_FLAG						(UINT8)0

#define BT_RESET_MASK					(UINT8)0x10
#define BT_RESET_FLAG					(UINT8)1
#define BT_START_FLAG					(UINT8)0

#define BT_RES_PU_MASK					(UINT8)0x20
#define BT_RES_PU_ON					(UINT8)1
#define BT_RES_PU_OFF					(UINT8)0

#define INTERRUPT_ENABLE_MASK			(UINT8)0x40
#define INT_ENABLE						(UINT8)1
#define INT_DISABLE						(UINT8)0

#define CARD_RESET_MASK					(UINT8)128
#define CARD_RESET						(UINT8)1
#define CARD_ON							(UINT8)0

#define LED_ONE_ON						0x08
#define LED_TWO_ON						0x10
#define LED_ONE_IS_OUTPUT				0x20
#define LED_TWO_IS_OUTPUT				0x40

#define RTS_LEVEL_SHIFT_BITS			2

//Stop bits
#define STOP_BITS_ONE					0x00
#define STOP_BITS_TWO					0x01
#define STOP_BITS_THREE					0x02
#define STOP_BITS_FOUR					0x03




#define PCCARD_ID_MASK					(UINT8)0x0F

#ifndef NVRAM
	#define PCCARD_IDENTIFIER				(UINT8)0x02
#else // #ifndef NVRAM
	#define PCCARD_IDENTIFIER				(UINT8)0x0E

	#define NVRAM_START_HW_ID_ADDRESS		124
	#define NVRAM_END_HW_ID_ADDRESS			127
	#define NVRAM_HW_ID_STRING				"P5A"
#endif//#ifndef NVRAM

#define LED_CONFIG_MASK					0x30
#define LED_ONE_AND_TWO_EXISTS			0x30
#define LED_ONE_ONLY					0x10

//NVRAM pins
//Read
#define NVRAM_READ_RX_BIT				0x01
#define NVRAM_READ_CLK_BIT				0x02
#define NVRAM_READ_ENABLE_BIT			0x04
#define NVRAM_READ_AVAIL_BIT			0x80

//Write
#define NVRAM_WRITE_TX_BIT				0x01
#define NVRAM_WRITE_CLK_BIT				0x02
#define NVRAM_WRITE_ENABLE_BIT			0x04
#define NVRAM_WRITE_RX_TX_DIR			0x10
#define NVRAM_WRITE_CLK_DIR_BIT			0x20
#define NVRAM_WRITE_ENABLE_DIR_BIT		0x40


/*
//Offsets from base IO-address to specific ports
//FIX ME! Change these to correct values
#define TX_PORT_OFFSET			0x00
#define RX_PORT_OFFSET			0x00
#define INTERRUPT_ENABLE_OFFSET	0x06
#define INTERRUPT_ACK_OFFSET	0x06
#define PCCARD_ID_OFFSET		0x03
#define INTERRUPT_REASON_OFFSET 0x06
#define FIFO_CONTROL_OFFSET		0x02
#define LINE_CONTROL_OFFSET		0x03
#define BAUD_RATE_OFFSET LINE_CONTROL_OFFSET
#define MODEM_CONTROL_OFFSET	0x04
#define SET_RTS_OFFSET	MODEM_CONTROL_OFFSET
#define LINE_STATUS_OFFSET		0x05
//#define MODEM_STATUS_OFFSET		0x06
#define TX_COUNT_OFFSET			0x07

//#define STATUS_OFFSET			0x03



// Interrupt masks
#define INTERRUPT_ENABLE_MASK			(UINT8)0x0F
#define INTERRUPT_ENABLE_RX				(UINT8)0x01
#define INTERRUPT_ENABLE_TX				(UINT8)0x02
#define INTERRUPT_ENABLE_LINE_STATUS	(UINT8)0x04
#define INTERRUPT_ENABLE_MODEM_STATUS	(UINT8)0x08
#define INTERRUPT_ENABLE_ALL			(UINT8)0x0F

//Interrupt reasons
#define INTERRUPT_REASON_MASK			(UINT8)0xF0
#define INTERRUPT_REASON_RX				(UINT8)0x10
#define INTERRUPT_REASON_TX				(UINT8)0x20
#define INTERRUPT_REASON_LINE_STATUS	(UINT8)0x40
#define INTERRUPT_REASON_MODEM_STATUS	(UINT8)0x80

//Line status flags
#define DATA_READY_FLAG					(UINT8)0x01
#define OVERRUN_ERROR_FLAG				(UINT8)0x02
#define BT_CTS_FLAG						(UINT8)0x04

//Modem control registers
#define RTS_BIT_MASK					(UINT8)0x02
#define RTS_ON_FLAG						(UINT8)0
#define RTS_OFF_FLAG					(UINT8)1

#define BT_ON_MASK						(UINT8)0x04
#define BT_ON_FLAG						(UINT8)1
#define BT_OFF_FLAG						(UINT8)0

#define BT_RESET_MASK					(UINT8)0x08
#define BT_RESET_FLAG					(UINT8)1
#define BT_START_FLAG					(UINT8)0

#define BT_RES_PU_MASK					(UINT8)0x10
#define BT_RES_PU_ON					(UINT8)1
#define BT_RES_PU_OFF					(UINT8)0



//FIFO Control register flags/masks
#define RXFIFO_RESET_MASK				(UINT8)0x02
#define RXFIFO_RESET_FLAG				(UINT8)1
#define RXFIFO_NO_RESET_FLAG			(UINT8)0

#define TXFIFO_RESET_MASK				(UINT8)0x04
#define TXFIFO_RESET_FLAG				(UINT8)1
#define TXFIFO_NO_RESET_FLAG			(UINT8)0


#define PCCARD_IDENTIFIER				(UINT8)0xA0
#define PCCARD_ID_MASK					(UINT8)0xF0

#define BAUD_RATE_BITMASK				(UINT8)0x03
#define BAUD_RATE_57600_BITMASK			(UINT8)0x00
#define BAUD_RATE_115200_BITMASK		(UINT8)0x01
#define BAUD_RATE_230400_BITMASK		(UINT8)0x02
#define BAUD_RATE_460800_BITMASK		(UINT8)0x03

#define RXFIFO_TRIGGER_LOWEST			((UINT8)0x00 << 6)
#define RXFIFO_TRIGGER_LOW				((UINT8)0x01 << 6)
#define RXFIFO_TRIGGER_MEDIUM			((UINT8)0x02 << 6)
#define RXFIFO_TRIGGER_HIGH				((UINT8)0x03 << 6)

#define TXFIFO_TRIGGER_LOWEST			((UINT8)0x00 << 4)
#define TXFIFO_TRIGGER_LOW				((UINT8)0x01 << 4)
#define TXFIFO_TRIGGER_MEDIUM			((UINT8)0x02 << 4)
#define TXFIFO_TRIGGER_HIGH				((UINT8)0x03 << 4)
  */

#define NOSENDTIMEOUT			5000000//<=> 0.5 secs

#endif