📄 video_test2.c
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/*****************************************************************
Copyright (C), 2004-2008, Wintech Digital System Co., Ltd.
FileName: video_test.c
Description: Video Loopback Test
******************************************************************/
#include "davincievm_i2c.h"
//#include <csl_resz.h>
#include "davincievm_vpss.h"
#define TVP5146_I2C_ADDR 0x5D
#define outsizeH 360
#define outsizeV 240
//CSL_ReszHandle ReszHandle; //handle of resizer
/* ------------------------------------------------------------------------ *
* *
* tvp5146_rset *
* *
* Set codec register regnum to value regval *
* *
* ------------------------------------------------------------------------ */
void tvp5146_rset( Uint8 regnum, Uint8 regval )
{
Uint8 cmd[2];
cmd[0] = regnum; // 8-bit Register Address
cmd[1] = regval; // 8-bit Register Data
DAVINCIEVM_I2C_write( TVP5146_I2C_ADDR, cmd, 2 );
}
/* ------------------------------------------------------------------------ *
* *
* tvp5146_rget *
* *
* Return value of codec register regnum *
* *
* ------------------------------------------------------------------------ */
Uint8 tvp5146_rget( Uint8 regnum )
{
Uint8 cmd[2];
cmd[0] = regnum; // 8-bit Register Address
cmd[1] = 0; // 8-bit Register Data
DAVINCIEVM_I2C_write( TVP5146_I2C_ADDR, cmd, 1 );
DAVINCIEVM_I2C_read ( TVP5146_I2C_ADDR, cmd, 1 );
return cmd[0];
}
/* ------------------------------------------------------------------------ *
* *
* tvp5146_init( ) *
* *
* Initialize the TVP5146 *
* *
* ------------------------------------------------------------------------ */
void tvp5146_init( )
{
DAVINCIEVM_waitusec( 1000 ); // wait 1 msec
tvp5146_rset( 0xE8, 0x02 ); // Initalize TVP5146, must do after power on
tvp5146_rset( 0xE9, 0x00 );
tvp5146_rset( 0xEA, 0x80 );
tvp5146_rset( 0xE0, 0x01 );
tvp5146_rset( 0xE8, 0x60 );
tvp5146_rset( 0xE9, 0x00 );
tvp5146_rset( 0xEA, 0xB0 );
tvp5146_rset( 0xE0, 0x01 );
tvp5146_rset( 0xE0, 0x00 );
DAVINCIEVM_waitusec( 1000 ); // wait 1 msec
#ifdef Svideo
tvp5146_rset( 0x00, 0x46 ); // Input Video: S-video: VI_2_C(Y) VI_1_C(C)
#else
tvp5146_rset( 0x00, 0x05 ); // Input Video: CVBS : VI_2_B
#endif
//tvp5146_rset( 0x02, 0x00 ); // PAL
tvp5146_rset( 0x02, 0x01 ); // NTSC
tvp5146_rset( 0x34, 0x11 ); // Enabling clock & Y/CB/CR input format
DAVINCIEVM_waitusec( 1000 ); // wait 1 msec
}
#define NTSC 1
#if NTSC
#define BASEP_X 0x7A // 122
#define BASEP_Y 0x12 // 18
#elif PAL
#define BASEP_X 0x84 // 132
#define BASEP_Y 0x16 // 22
#endif
/* ------------------------------------------------------------------------ *
* *
* vpfe_init( ) *
* *
* NTSC: *
* Width: 720 *
* Height: 480 *
* *
* *
* ------------------------------------------------------------------------ */
void vpfe_init( Uint32 buffer, Uint32 width, Uint32 height )
{
VPFE_SYN_MODE = 0x000b2F84;/*0x00032F84;*/ // interlaced, with VD pority as negative
VPFE_HD_VD_WID = 0;
VPFE_PIX_LINES = 0x02CF020D;
/*
* sph = 1, nph = 1440, according to page 32-33 of the CCDC spec
* for BT.656 mode, this setting captures only the 720x480 of the
* active NTSV video window
*/
VPFE_HORZ_INFO = width << 1; // Horizontal lines
VPFE_HSIZE_OFF = width << 1; // Horizontal line offset
VPFE_VERT_START = 0; // Vertical start line
VPFE_VERT_LINES = height >> 1; // Vertical lines
VPFE_CULLING = 0xFFFF00FF; // Disable cullng
/*
* Interleave the two fields
*/
VPFE_SDOFST = 0x00000249;
VPFE_SDR_ADDR = buffer;
VPFE_CLAMP = 0;
VPFE_DCSUB = 0;
VPFE_COLPTN = 0xEE44EE44;
VPFE_BLKCMP = 0;
VPFE_FPC_ADDR = 0x86800000;
VPFE_FPC = 0;
VPFE_VDINT = 0;
VPFE_ALAW = 0;
VPFE_REC656IF = 0x00000003;
/*
* Input format is Cb:Y:Cr:Y, w/ Y in odd-pixel position
*/
VPFE_CCDCFG = 0x00000800;
VPFE_FMTCFG = 0;
VPFE_FMT_HORZ = 0x000002D0;
VPFE_FMT_VERT = 0x0000020E;
VPFE_FMT_ADDR0 = 0;
VPFE_FMT_ADDR1 = 0;
VPFE_FMT_ADDR2 = 0;
VPFE_FMT_ADDR3 = 0;
VPFE_FMT_ADDR4 = 0;
VPFE_FMT_ADDR5 = 0;
VPFE_FMT_ADDR6 = 0;
VPFE_FMT_ADDR7 = 0;
VPFE_PRGEVEN_0 = 0;
VPFE_PRGEVEN_1 = 0;
VPFE_PRGODD_0 = 0;
VPFE_PRGODD_1 = 0;
VPFE_VP_OUT = 0x041A2D00;
VPFE_PCR = 0x00000001; // Enable CCDC
}
/* ------------------------------------------------------------------------ *
* *
* vpbe_init( ) *
* *
* NTSC: *
* Width: 720 *
* Height: 480 *
* *
* *
* ------------------------------------------------------------------------ */
void vpbe_init( Uint32 buffer, Uint32 width, Uint32 height, Uint32 cb_enable )
{
/*
* Setup VPBE
*/
VPSS_CLK_CTRL = 0x00000018; // Enable DAC and VENC clock, both at 27 MHz
VPBE_PCR = 0; // No clock div, clock enable
/*
* Setup OSD
*/
OSD_MODE = 0x000000fc; // Blackground color blue using clut in ROM0
OSD_OSDWIN0MD = 0; // Disable both osd windows and cursor window
OSD_OSDWIN1MD = 0;
OSD_RECTCUR = 0;
OSD_VIDWIN0OFST = 352>>4;//width >> 4;
OSD_VIDWIN0ADR = buffer;
OSD_BASEPX = BASEP_X;
OSD_BASEPY = BASEP_Y;
OSD_VIDWIN0XP = 0;
OSD_VIDWIN0YP = 0;
OSD_VIDWIN0XL = 352;//width;
OSD_VIDWIN0YL = 232>>1;//height >> 1;
OSD_MISCCTL = 0;
OSD_VIDWINMD = 0x00000003; // Disable vwindow 1 and enable vwindow 0
// Frame mode with no up-scaling
/*
* Setup VENC
*/
VENC_VMOD = 0x00000003; // Standard NTSC interlaced output
VENC_VDPRO = cb_enable << 8;
#ifdef Svideo
VENC_DACSEL = 0x00004210;
#else
VENC_CMPNT = 0x00008700;
VENC_DACSEL = 0x00005430;
#endif
VENC_DACTST = 0;
}
void Resize_init( Uint32 DisplayBuf )
{
RESIZER_RSZ_CNT = 0x21b80601;//0x80200;//0x20080201
RESIZER_OUT_SIZE = 0x00e80160;//352*232
RESIZER_IN_START = 0x0;//0x100010; //16 pixels and 16 lines offset
RESIZER_IN_SIZE = 0x01d002c0;//704*464
RESIZER_SDR_INADD = 0;//0x82000000;
RESIZER_SDR_INOFF = 0;//0x580;
RESIZER_SDR_OUTADD = DisplayBuf;
RESIZER_SDR_OUTOFF = 0x2c0;
RESIZER_HFILT10 = 0x01000100;
RESIZER_HFILT32 = 0x01000100;
RESIZER_HFILT54 = 0x01000100;
RESIZER_HFILT76 = 0x01000100;
RESIZER_HFILT98 = 0x01000100;
RESIZER_HFILT1110 = 0x01000100;
RESIZER_HFILT1312 = 0x01000100;
RESIZER_HFILT1514 = 0x01000100;
RESIZER_HFILT1716 = 0x01000100;
RESIZER_HFILT1918 = 0x01000100;
RESIZER_HFILT2120 = 0x01000100;
RESIZER_HFILT2322 = 0x01000100;
RESIZER_HFILT2524 = 0x01000100;
RESIZER_HFILT2726 = 0x01000100;
RESIZER_HFILT2928 = 0x01000100;
RESIZER_HFILT3130 = 0x01000100;
RESIZER_VFILT10 = 0x01000100;
RESIZER_VFILT32 = 0x01000100;
RESIZER_VFILT54 = 0x01000100;
RESIZER_VFILT76 = 0x01000100;
RESIZER_VFILT98 = 0x01000100;
RESIZER_VFILT1110 = 0x01000100;
RESIZER_VFILT1312 = 0x01000100;
RESIZER_VFILT1514 = 0x01000100;
RESIZER_VFILT1716 = 0x01000100;
RESIZER_VFILT1918 = 0x01000100;
RESIZER_VFILT2120 = 0x01000100;
RESIZER_VFILT2322 = 0x01000100;
RESIZER_VFILT2524 = 0x01000100;
RESIZER_VFILT2726 = 0x01000100;
RESIZER_VFILT2928 = 0x01000100;
RESIZER_VFILT3130 = 0x01000100;
RESIZER_YENH = 0x00024400;
RESIZER_PCR = 0x1;
}
/* ------------------------------------------------------------------------ *
* *
* video_loopback_test( ) *
* *
* *
* *
* ------------------------------------------------------------------------ */
Int16 video_loopback_test( )
{
Uint32 BufferPtr , width , height, DisplayBuf;
CSL_Status status;
void * backstruct;
BufferPtr = 0x81000000;
DisplayBuf= 0x82000000;
width = 720;
height = 480;
tvp5146_init( );
Resize_init( DisplayBuf);
DAVINCIEVM_wait(3000);
vpfe_init( BufferPtr, width, height ); // Setup Front-End
vpbe_init( DisplayBuf, width, height, 0 ); // Setup Back-End
/*Get status of resizer now*/
while(1)
{
if (RESIZER_PCR == 0)
RESIZER_PCR = 0x1;
}
return 0;
}
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