📄 编码发送.asm
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******************************************************************
* 乌克兰4控 程序
* 苏哲军 3/17/2008
*
*
*******************************************************************
;$Include 'gpgtregs.inc'
EE_FlashPage: equ 64 ; Flash Erase Page size
EE_FlashRow: equ 32 ; Flash Program Row size
EE_FlashErased: equ $FF ; Flash erased state
EE_StartAddr: equ $c000 ; starting address of 1st FlashEE
EE_BlockSize: equ 3 ; data block size for 1st FlashEE
SHIJIAN: equ $30
PTA EQU $0000 ; Ports and data direction
PORTA EQU $0000
PTB EQU $0001
PORTB EQU $0001
PTC EQU $0002
PORTC EQU $0002
PTD EQU $0003
PORTD EQU $0003
DDRA EQU $0004
DDRB EQU $0005
DDRC EQU $0006
DDRD EQU $0007
PTE EQU $0008
PORTE EQU $0008
SCPSC EQU $0009 ;GT16 Only - Enhanced SCI
SCIACTL EQU $000A ;GT16 Only
SCIADAT EQU $000B ;GT16 Only
DDRE EQU $000C ; Ports and data direction
PTAPUE EQU $000D ; Port pull-up enables
PTCPUE EQU $000E
PTDPUE EQU $000F
SPCR EQU $0010 ; SPI (Syncronous communications)
SPSCR EQU $0011
SPDR EQU $0012
SCC1 EQU $0013 ; SCI (Asyncronous communications)
SCC2 EQU $0014
SCC3 EQU $0015
SCS1 EQU $0016
SCS2 EQU $0017
SCDR EQU $0018
SCBR EQU $0019
INTKBSCR EQU $001a ; Keyboard interrupt control/status
INTKBIER EQU $001b
TBCR EQU $001c ; Time base module
INTSCR EQU $001d ; IRQ status/control
CONFIG2 EQU $001e ; System configuration
CONFIG1 EQU $001f
T1SC EQU $0020 ; Timer 1
T1CNTH EQU $0021
T1CNTL EQU $0022
T1MODH EQU $0023
T1MODL EQU $0024
T1SC0 EQU $0025
T1CH0H EQU $0026
T1CH0L EQU $0027
T1SC1 EQU $0028
T1CH1H EQU $0029
T1CH1L EQU $002a
T2SC EQU $002b ; Timer 2
T2CNTH EQU $002c
T2CNTL EQU $002d
T2MODH EQU $002e
T2MODL EQU $002f
T2SC0 EQU $0030
T2CH0H EQU $0031
T2CH0L EQU $0032
T2SC1 EQU $0033
T2CH1H EQU $0034
T2CH1L EQU $0035
PCTL EQU $0036 ; GP32 Only - Phase lock loop (for crystals)
PBWC EQU $0037 ; GP32 Only
PMSH EQU $0038 ; GP32 Only
PMSL EQU $0039 ; GP32 Only
PMRS EQU $003A ; GP32 Only
PMDS EQU $003B ; GP32 Only
ICGCR EQU $0036 ; GT16 Only - Internal Clock Generator
ICGMR EQU $0037 ; GT16 Only
ICGTR EQU $0038 ; GT16 Only
ICGDVR EQU $0039 ; GT16 Only
ICGDSR EQU $003A ; GT16 Only
ICGTR5 EQU $FF80 ; GT16 Only
ICGTR3 EQU $FF81 ; GT16 Only
ADSCR EQU $003C ; A to D converter
ADR EQU $003D
ADCLK EQU $003E
SBSR EQU $fe00 ; System integration
SRSR EQU $fe01
SUBAR EQU $fe02
SBFCR EQU $fe03
INT1 EQU $fe04 ; Interrupt status
INT2 EQU $fe05
INT3 EQU $fe06
FLTCR EQU $fe07 ; Flash test/programming
FLCR EQU $fe08
HVEN: equ %00001000 ; high-voltage enable bit mask
MASS: equ %00000100 ; mass erase control bit mask
ERASE: equ %00000010 ; erase control bit mask
PGM: equ %00000001 ; program control bit mask
BRKH EQU $fe09 ; Hardware breakpoint
BRKL EQU $fe0a
BRKSCR EQU $fe0b
LVISR EQU $fe0c ; Low voltage detect
FLBPR EQU $ff7e ; Flash boot protect
COPCTL EQU $ffff ; COP (Computer operating properly) control
*---------------------------------------------------------------------------------------
RAMStart EQU $0060
ram_last: EQU $023F ; last RAM location
init_stack: EQU ram_last ; initialize stack pointer to last RAM location
RomStart EQU $E100 ; This is valid ROM on the GP32, GT16, and GT8
VectorStart EQU $FFDC
ZHOUQI EQU $08
GOTIME EQU $FF
org RamStart
M5COUNTH ds 1
M5COUNTL ds 1
COMTIME256L DS 1
COMTIME256H DS 1
COMTIME12 DS 1
M1_4 ds 1
M1_5 ds 1
M1_44 ds 1
M1_55 ds 1
M1_66 ds 1
M11_55 DS 1
HALLCOU DS 1
HALLST DS 1
M5DRCT DS 1
KS1COU DS 1
KS2COU DS 1
KS3COU DS 1
KS4COU DS 1
KS5COU DS 1
KS6COU DS 1
KS7COU DS 1
KS8COU DS 1
KS21COU DS 1
KS22COU DS 1
KS23COU DS 1
KS24COU DS 1
KS25COU DS 1
KS26COU DS 1
KS27COU DS 1
KS28COU DS 1
KEYST DS 1
KEYST1 DS 1
KEYST2 DS 1
SYSSTU DS 1
SYSSTU1 DS 1
SYSSTU2 DS 1
t11 DS 1
t22 DS 1
t33 DS 1
t44 DS 1
t55 DS 1
t111 DS 1
t222 DS 1
t333 DS 1
t444 DS 1
t555 DS 1
M5UPDL0 DS 1
M5UPDL2 DS 1
M5UPDL3 ds 1
M5DNDL0 DS 1
M5DNDL2 DS 1
M5DNDL3 DS 1
KEEPSTU DS 1
SECDSTU DS 1
M5CHANG DS 1
S256STU DS 1
S278STU DS 1
M34CURRENTL DS 1
M34CURRENTH DS 1
M12CURRENTL DS 1
M12CURRENTH DS 1
ADCOUNT34 DS 1
ADCOUNT34A DS 1
ADCOUNT12 DS 1
ADCOUNT12A DS 1
FILTCONTL DS 1
FILTCONTH DS 1
FILTCONT1 DS 1
FILTCONT2 DS 1
FILTCONT3 DS 1
FILTCONT4 DS 1
BATTSTU DS 1
MBATL DS 1
MBATH DS 1
ADCOUNT_BT DS 1
ADABAOT DS 1
OPENCHAR ds 1
cutCHAR ds 1
M1DRCT ds 1
M2DRCT ds 1
M3DRCT ds 1
M4DRCT ds 1
M1COUNTH ds 1
M1COUNTL DS 1
M2COUNTH ds 1
M2COUNTL DS 1
M3COUNTH ds 1
M3COUNTL DS 1
M4COUNTH ds 1
M4COUNTL DS 1
HALL1COU DS 1
HALL1ST DS 1
HALL2COU DS 1
HALL2ST DS 1
HALL3COU DS 1
HALL3ST DS 1
HALL4COU DS 1
HALL4ST DS 1
FUSTU DS 1
M11COUNTH DS 1
M11COUNTL DS 1
M22COUNTH DS 1
M22COUNTL DS 1
M33COUNTH DS 1
M33COUNTL DS 1
M44COUNTH DS 1
M44COUNTL DS 1
M123STU DS 1
MEMERSTU DS 1
MEMERTM0 DS 1
MEMERTM2 DS 1
M1CYCLEL DS 1
REMOTSTU DS 1
CODECOUNT DS 1
M1_M DS 1
M2_M DS 1
M3_M DS 1
org RomStart
;* Equates for ROM Subroutines and start of RAM
EraRnge equ $1B56 ;FLASH erase routine in ROM
PgrRnge equ $1B59 ;FLASH programming routine in ROM
CtrlByt equ $48 ;control byte for ROM subroutines
CPUSpd equ $49 ;CPU speed in units of 0.25MHz
LstAddr equ $4A ;last FLASH address to be programmed
DATA equ $4c
**************************************************************
* Init_SCI - Turns on the asyncronous communications port *
* for "transmitting only" at 9600 baud N81. *
**************************************************************
Init_SCI:
mov #$04,SCBR ; Baud Rate = 9600
mov #$00,SCC1 ; disable the SCI peripheral
mov #$00,SCC2 ; disable the SCI transmitter
mov #$00,SCC3
rts
**************************************************************
* Init_AtoD - Sets up the AtoD clock + turns it on *
**************************************************************
Init_AtoD:
mov #$60,ADCLK ; Bus Clock / 8
mov #$1F,ADSCR ; Enable the ADC peripheral
rts
**************************************************************
* Init_Timer - Turns on timer 1 channel 0 for an Output *
* Compare in approximately 2ms. The timer *
* interrupt service routine continually sets *
* the next interrupt to occur 2ms later. *
**************************************************************
Init_Timer:
lda T1SC
mov #$30,T1SC ; Timer 1 - Cleared + Stopped.
; Clicks once every 2 BUS Cycles
mov #$07,T1MODH
mov #$A8,T1MODL ;800Us overflow cycle
lda T1SC0
mov #$10,T1SC0 ; Timer 1 Channel 0
; Set for Output Compare operation.
lda T1SC1
mov #$10,T1SC1 ; Timer 1 Channel 1
; Set for input Capture operation.
bclr 5,T1SC ; Start the timer 1
rts
**************************************************************
* Main_Init - This is the point where code starts executing *
* after a RESET. *
**************************************************************
Main_Init:
STA COPCTL
sei
ldhx #init_stack+1 ; initialize
txs ; the stack pointer
clra ; Initialize A,X so that interrupt
;Jsr Init_SCI ; Initialize peripherals
clr SPCR ; disable SPI MODULE
clr INTKBIER ; PTAx pin not enabled as keyboard interrupt pin
bset 1,INTSCR ; IRQ interrupt requests disabled
Jsr Init_AtoD
Jsr Init_Timer
clr PTA
mov #%10011001,DDRA
mov #$00,PTAPUE
clr PTB
mov #%01000010,DDRB
clr PTC
mov #%00000111,DDRC
clr PTCPUE
clr PTD
mov #%11110111,DDRD
clr PTDPUE
mov #$00,PTE
mov #$07,DDRE
CLRH
LDX #RAMSTART
CRM_LOOP:
CLR ,X
INCX
BNE CRM_LOOP
mov #$08,config2 ; For GT16 - turn on external clock(PTE4)
MOV #$39,CONFIG1
LDA #$13 ; For GT16 - enable external clock
LOOP: NOP
STA ICGCR
CMP ICGCR
BNE LOOP
CLi ; not Allow interrupts to happen
********************************************************************
main_loop:
fixcop:
sta copctl ; Clear COP to prevent watchdog reset
********************************************************************
KBDSCAN:
KBDST:
SCANPD0: BSET 0,PTD
BSET 0,DDRD
NOP
NOP
NOP
NOP
PD0_PA5: BRCLR 5,PTA,PD0_PA5LOW
PD0_PA5HIGH: LDA KS21COU
SUB #$40
BLO PD0_PA5HIGH2
MOV #$40,KS21COU
BRSET 0,KEYST2,PD0_PA5END
BSET 0,KEYST2
BSET 0,SYSSTU2
BRA PD0_PA5END
PD0_PA5HIGH2: INC KS21COU
BRA PD0_PA5END
PD0_PA5LOW: LDA KS21COU
BEQ PD0_PA5LOW2
DEC KS21COU
BRA PD0_PA5END
PD0_PA5LOW2: BRCLR 0,KEYST2,PD0_PA5END
BCLR 0,KEYST2
BCLR 0,SYSSTU2
PD0_PA5END:
PD0_PA6: BRCLR 6,PTA,PD0_PA6LOW
PD0_PA6HIGH: LDA KS22COU
SUB #$40
BLO PD0_PA6HIGH2
MOV #$40,KS22COU
BRSET 1,KEYST2,PD0_PA6END
BSET 1,KEYST2
BSET 1,SYSSTU2
BRA PD0_PA6END
PD0_PA6HIGH2: INC KS22COU
BRA PD0_PA6END
PD0_PA6LOW: LDA KS22COU
BEQ PD0_PA6LOW2
DEC KS22COU
BRA PD0_PA6END
PD0_PA6LOW2: BRCLR 1,KEYST2,PD0_PA6END
BCLR 1,KEYST2
BCLR 1,SYSSTU2
PD0_PA6END:
SCANPD0END: BCLR 0,PTD
BCLR 0,DDRD
NOP
NOP
NOP
NOP
SCANPD1: BSET 1,PTD
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