📄 comp.sim.rpt
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; |comp|frequence:inst|r_4[1] ; |comp|frequence:inst|r_4[1] ; regout ;
; |comp|frequence:inst|r_1[1] ; |comp|frequence:inst|r_1[1] ; regout ;
; |comp|frequence:inst|r_2[2] ; |comp|frequence:inst|r_2[2] ; regout ;
; |comp|frequence:inst|r_3[2] ; |comp|frequence:inst|r_3[2] ; regout ;
; |comp|frequence:inst|r_4[2] ; |comp|frequence:inst|r_4[2] ; regout ;
; |comp|frequence:inst|r_1[2] ; |comp|frequence:inst|r_1[2] ; regout ;
; |comp|frequence:inst|r_3[3] ; |comp|frequence:inst|r_3[3] ; regout ;
; |comp|frequence:inst|r_2[3] ; |comp|frequence:inst|r_2[3] ; regout ;
; |comp|frequence:inst|r_4[3] ; |comp|frequence:inst|r_4[3] ; regout ;
; |comp|frequence:inst|r_1[3] ; |comp|frequence:inst|r_1[3] ; regout ;
; |comp|frequence:inst|r_2[4] ; |comp|frequence:inst|r_2[4] ; regout ;
; |comp|frequence:inst|r_3[4] ; |comp|frequence:inst|r_3[4] ; regout ;
; |comp|frequence:inst|r_4[4] ; |comp|frequence:inst|r_4[4] ; regout ;
; |comp|frequence:inst|r_1[4] ; |comp|frequence:inst|r_1[4] ; regout ;
; |comp|frequence:inst|r_2[0] ; |comp|frequence:inst|r_2[0] ; regout ;
; |comp|frequence:inst|r_3[0] ; |comp|frequence:inst|r_3[0] ; regout ;
; |comp|frequence:inst|r_4[0] ; |comp|frequence:inst|r_4[0] ; regout ;
; |comp|frequence:inst|r_1[0] ; |comp|frequence:inst|r_1[0] ; regout ;
; |comp|frequence:inst|LessThan2~59 ; |comp|frequence:inst|LessThan2~59 ; combout ;
; |comp|frequence:inst|LessThan4~53 ; |comp|frequence:inst|LessThan4~53 ; combout ;
; |comp|frequence:inst|LessThan1~59 ; |comp|frequence:inst|LessThan1~59 ; combout ;
; |comp|frequence:inst|LessThan3~59 ; |comp|frequence:inst|LessThan3~59 ; combout ;
; |comp|frequence:inst|LessThan0~59 ; |comp|frequence:inst|LessThan0~59 ; combout ;
; |comp|frequence:inst|r_4[4]~228 ; |comp|frequence:inst|r_4[4]~228 ; combout ;
; |comp|~GND ; |comp|~GND ; combout ;
; |comp|clk_1Hz ; |comp|clk_1Hz ; padio ;
; |comp|dout[7] ; |comp|dout[7] ; padio ;
; |comp|dout[6] ; |comp|dout[6] ; padio ;
; |comp|dout[5] ; |comp|dout[5] ; padio ;
; |comp|dout[4] ; |comp|dout[4] ; padio ;
; |comp|dout[3] ; |comp|dout[3] ; padio ;
; |comp|dout[2] ; |comp|dout[2] ; padio ;
; |comp|dout[1] ; |comp|dout[1] ; padio ;
; |comp|dout[0] ; |comp|dout[0] ; padio ;
; |comp|scale[7] ; |comp|scale[7] ; padio ;
; |comp|scale[6] ; |comp|scale[6] ; padio ;
; |comp|scale[5] ; |comp|scale[5] ; padio ;
; |comp|scale[4] ; |comp|scale[4] ; padio ;
; |comp|scale[3] ; |comp|scale[3] ; padio ;
; |comp|scale[2] ; |comp|scale[2] ; padio ;
; |comp|scale[1] ; |comp|scale[1] ; padio ;
; |comp|fin ; |comp|fin~corein ; combout ;
+---------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+---------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+---------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------+------------------+
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|cout_bit ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|modulus_trigger ; combout ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella2 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella2~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella3 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella3~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella4 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella4~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella5 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella5~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella6 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella6~COUT ; cout ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella7 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella7~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella7 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella7~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella8 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella8~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella8 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella8~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella9 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella9~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella9 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella9~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella10 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella10~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella10 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella10~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella11 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella11~COUT ; cout ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella14 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella14~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella14 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella14~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella12 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella12~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella12 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella12~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella13 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella13~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella13 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella13~COUTCOUT1 ; cout1 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella15 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella15~COUT ; cout0 ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:a
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