comp.sim.rpt

输入为八位十进制数

; Generate VCD File for PowerPlay Power Analyzer                                             ; Off        ; Off           ;
; Group bus channels in simulation results                                                   ; Off        ; Off           ;
; Preserve fewer signal transitions to reduce memory requirements                            ; On         ; On            ;
; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off        ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; Off        ;               ;
; Perform Glitch Filtering in Timing Simulation                                              ; Auto       ; Auto          ;
+--------------------------------------------------------------------------------------------+------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;       9.09 % ;
; Total nodes checked                                 ; 164          ;
; Total output ports checked                          ; 220          ;
; Total output ports with complete 1/0-value coverage ; 20           ;
; Total output ports with no 1/0-value coverage       ; 197          ;
; Total output ports with no 1-value coverage         ; 197          ;
; Total output ports with no 0-value coverage         ; 200          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                     ;
+---------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                         ; Output Port Name                                                                                         ; Output Port Type ;
+---------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+------------------+
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella0    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella0~COUT      ; cout0            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella0    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella0~COUTCOUT1 ; cout1            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella1    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella1~COUT      ; cout             ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella2    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella2~COUT      ; cout0            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella3    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella3~COUT      ; cout0            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella4    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella4~COUT      ; cout0            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella5    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella5~COUT      ; cout0            ;
; |comp|display:inst1|clk_counter[4]                                                                ; |comp|display:inst1|clk_counter[4]~28                                                                    ; cout0            ;
; |comp|display:inst1|clk_counter[4]                                                                ; |comp|display:inst1|clk_counter[4]~28COUT1                                                               ; cout1            ;
; |comp|display:inst1|clk_counter[1]                                                                ; |comp|display:inst1|clk_counter[1]~32                                                                    ; cout0            ;
; |comp|display:inst1|clk_counter[1]                                                                ; |comp|display:inst1|clk_counter[1]~32COUT1                                                               ; cout1            ;
; |comp|display:inst1|clk_counter[2]                                                                ; |comp|display:inst1|clk_counter[2]~34                                                                    ; cout0            ;
; |comp|display:inst1|clk_counter[2]                                                                ; |comp|display:inst1|clk_counter[2]~34COUT1                                                               ; cout1            ;
; |comp|display:inst1|clk_counter[3]                                                                ; |comp|display:inst1|clk_counter[3]~36                                                                    ; cout0            ;
; |comp|display:inst1|clk_counter[3]                                                                ; |comp|display:inst1|clk_counter[3]~36COUT1                                                               ; cout1            ;
; |comp|display:inst1|clk_d                                                                         ; |comp|display:inst1|clk_d                                                                                ; regout           ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|cmpr1_aeb_int~191 ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|cmpr1_aeb_int~191        ; combout          ;
; |comp|display:inst1|clk_counter[0]                                                                ; |comp|display:inst1|clk_counter[0]                                                                       ; regout           ;
; |comp|display:inst1|Equal0~50                                                                     ; |comp|display:inst1|Equal0~50                                                                            ; combout          ;
; |comp|clk                                                                                         ; |comp|clk~corein                                                                                         ; combout          ;
+---------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                                                                                                         ;
+---------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                         ; Output Port Name                                                                                          ; Output Port Type ;
+---------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------+------------------+
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|cout_bit          ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|modulus_trigger           ; combout          ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella2    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella2~COUTCOUT1  ; cout1            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella3    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella3~COUTCOUT1  ; cout1            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella4    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella4~COUTCOUT1  ; cout1            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella5    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella5~COUTCOUT1  ; cout1            ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella6    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella6~COUT       ; cout             ;
; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella7    ; |comp|counter24:inst5|lpm_counter:lpm_counter_component|cntr_kgj:auto_generated|counter_cella7~COUT       ; cout0            ;